xref: /openbmc/u-boot/include/configs/omap4_panda.h (revision 8ca78f2c89cd058e498fa438f57accc2e810bb98)
1 /*
2  * (C) Copyright 2010
3  * Texas Instruments Incorporated.
4  * Steve Sakoman  <steve@sakoman.com>
5  *
6  * Configuration settings for the TI OMAP4 Panda board.
7  *
8  * See file CREDITS for list of people who contributed to this
9  * project.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License as
13  * published by the Free Software Foundation; either version 2 of
14  * the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24  * MA 02111-1307 USA
25  */
26 
27 #ifndef __CONFIG_H
28 #define __CONFIG_H
29 
30 /*
31  * High Level Configuration Options
32  */
33 #define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
34 #define CONFIG_OMAP		1	/* in a TI OMAP core */
35 #define CONFIG_OMAP44XX		1	/* which is a 44XX */
36 #define CONFIG_OMAP4430		1	/* which is in a 4430 */
37 #define CONFIG_PANDA		1	/* working with Panda */
38 #define CONFIG_ARCH_CPU_INIT
39 
40 /* Get CPU defs */
41 #include <asm/arch/cpu.h>
42 #include <asm/arch/omap4.h>
43 
44 /* Display CPU and Board Info */
45 #define CONFIG_DISPLAY_CPUINFO		1
46 #define CONFIG_DISPLAY_BOARDINFO	1
47 
48 /* Keep L2 Cache Disabled */
49 #define CONFIG_L2_OFF			1
50 
51 /* Clock Defines */
52 #define V_OSCK			38400000	/* Clock output from T2 */
53 #define V_SCLK                   V_OSCK
54 
55 #undef CONFIG_USE_IRQ				/* no support for IRQs */
56 #define CONFIG_MISC_INIT_R
57 
58 #define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
59 #define CONFIG_SETUP_MEMORY_TAGS	1
60 #define CONFIG_INITRD_TAG		1
61 #define CONFIG_REVISION_TAG		1
62 
63 /*
64  * Size of malloc() pool
65  * Total Size Environment - 256k
66  * Malloc - add 256k
67  */
68 #define CONFIG_ENV_SIZE			(256 << 10)
69 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (256 << 10))
70 						/* initial data */
71 /* Vector Base */
72 #define CONFIG_SYS_CA9_VECTOR_BASE	SRAM_ROM_VECT_BASE
73 
74 /*
75  * Hardware drivers
76  */
77 
78 /*
79  * serial port - NS16550 compatible
80  */
81 #define V_NS16550_CLK			48000000
82 
83 #define CONFIG_SYS_NS16550
84 #define CONFIG_SYS_NS16550_SERIAL
85 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
86 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
87 #define CONFIG_CONS_INDEX		3
88 #define CONFIG_SYS_NS16550_COM3		UART3_BASE
89 
90 #define CONFIG_ENV_IS_NOWHERE
91 #define CONFIG_BAUDRATE			115200
92 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
93 					115200}
94 
95 /* I2C  */
96 #define CONFIG_HARD_I2C			1
97 #define CONFIG_SYS_I2C_SPEED		100000
98 #define CONFIG_SYS_I2C_SLAVE		1
99 #define CONFIG_SYS_I2C_BUS		0
100 #define CONFIG_SYS_I2C_BUS_SELECT	1
101 #define CONFIG_DRIVER_OMAP34XX_I2C	1
102 #define CONFIG_I2C_MULTI_BUS		1
103 
104 /* TWL6030 */
105 #define CONFIG_TWL6030_POWER		1
106 
107 /* MMC */
108 #define CONFIG_GENERIC_MMC		1
109 #define CONFIG_MMC			1
110 #define CONFIG_OMAP_HSMMC		1
111 #define CONFIG_SYS_MMC_SET_DEV		1
112 #define CONFIG_DOS_PARTITION		1
113 
114 /* USB */
115 #define CONFIG_MUSB_UDC			1
116 #define CONFIG_USB_OMAP3		1
117 
118 /* USB device configuration */
119 #define CONFIG_USB_DEVICE		1
120 #define CONFIG_USB_TTY			1
121 #define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
122 
123 /* Flash */
124 #define CONFIG_SYS_NO_FLASH	1
125 
126 /* commands to include */
127 #include <config_cmd_default.h>
128 
129 /* Enabled commands */
130 #define CONFIG_CMD_EXT2		/* EXT2 Support                 */
131 #define CONFIG_CMD_FAT		/* FAT support                  */
132 #define CONFIG_CMD_I2C		/* I2C serial bus support	*/
133 #define CONFIG_CMD_MMC		/* MMC support                  */
134 
135 /* Disabled commands */
136 #undef CONFIG_CMD_NET
137 #undef CONFIG_CMD_FPGA		/* FPGA configuration Support   */
138 #undef CONFIG_CMD_IMLS		/* List all found images        */
139 
140 /*
141  * Environment setup
142  */
143 
144 #define CONFIG_BOOTDELAY	3
145 
146 #define CONFIG_ENV_OVERWRITE
147 
148 #define CONFIG_EXTRA_ENV_SETTINGS \
149 	"loadaddr=0x82000000\0" \
150 	"console=ttyS2,115200n8\0" \
151 	"usbtty=cdc_acm\0" \
152 	"vram=16M\0" \
153 	"mmcdev=0\0" \
154 	"mmcroot=/dev/mmcblk0p2 rw\0" \
155 	"mmcrootfstype=ext3 rootwait\0" \
156 	"mmcargs=setenv bootargs console=${console} " \
157 		"vram=${vram} " \
158 		"root=${mmcroot} " \
159 		"rootfstype=${mmcrootfstype}\0" \
160 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
161 	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
162 		"source ${loadaddr}\0" \
163 	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
164 	"mmcboot=echo Booting from mmc${mmcdev} ...; " \
165 		"run mmcargs; " \
166 		"bootm ${loadaddr}\0" \
167 
168 #define CONFIG_BOOTCOMMAND \
169 	"if mmc rescan ${mmcdev}; then " \
170 		"if run loadbootscript; then " \
171 			"run bootscript; " \
172 		"else " \
173 			"if run loaduimage; then " \
174 				"run mmcboot; " \
175 			"fi; " \
176 		"fi; " \
177 	"fi"
178 
179 #define CONFIG_AUTO_COMPLETE		1
180 
181 /*
182  * Miscellaneous configurable options
183  */
184 
185 #define CONFIG_SYS_LONGHELP	/* undef to save memory */
186 #define CONFIG_SYS_HUSH_PARSER	/* use "hush" command parser */
187 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
188 #define CONFIG_SYS_PROMPT		"Panda # "
189 #define CONFIG_SYS_CBSIZE		256
190 /* Print Buffer Size */
191 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
192 					sizeof(CONFIG_SYS_PROMPT) + 16)
193 #define CONFIG_SYS_MAXARGS		16
194 /* Boot Argument Buffer Size */
195 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
196 
197 /*
198  * memtest setup
199  */
200 #define CONFIG_SYS_MEMTEST_START	0x80000000
201 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (32 << 20))
202 
203 /* Default load address */
204 #define CONFIG_SYS_LOAD_ADDR		0x80000000
205 
206 /* Use General purpose timer 1 */
207 #define CONFIG_SYS_TIMERBASE		GPT2_BASE
208 #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
209 #define CONFIG_SYS_HZ			1000
210 
211 /*
212  * Stack sizes
213  *
214  * The stack sizes are set up in start.S using the settings below
215  */
216 #define CONFIG_STACKSIZE	(128 << 10)	/* Regular stack */
217 #ifdef CONFIG_USE_IRQ
218 #define CONFIG_STACKSIZE_IRQ	(4 << 10)	/* IRQ stack */
219 #define CONFIG_STACKSIZE_FIQ	(4 << 10)	/* FIQ stack */
220 #endif
221 
222 /*
223  * SDRAM Memory Map
224  * Even though we use two CS all the memory
225  * is mapped to one contiguous block
226  */
227 #define CONFIG_NR_DRAM_BANKS	1
228 
229 #define CONFIG_SYS_SDRAM_BASE		0x80000000
230 #define CONFIG_SYS_INIT_SP_ADDR		(LOW_LEVEL_SRAM_STACK - GENERATED_GBL_DATA_SIZE)
231 
232 #endif /* __CONFIG_H */
233