xref: /openbmc/u-boot/include/configs/omap3_evm.h (revision 741de2661823a504b7e8c293e148bc2fd509c1fd)
1ad9bc8e5SDirk Behme /*
2*741de266SSanjeev Premi  * Configuration settings for the TI OMAP3 EVM board.
3*741de266SSanjeev Premi  *
4*741de266SSanjeev Premi  * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
5*741de266SSanjeev Premi  *
6ad9bc8e5SDirk Behme  * Author :
7ad9bc8e5SDirk Behme  *	Manikandan Pillai <mani.pillai@ti.com>
8ad9bc8e5SDirk Behme  * Derived from Beagle Board and 3430 SDP code by
9ad9bc8e5SDirk Behme  *	Richard Woodruff <r-woodruff2@ti.com>
10ad9bc8e5SDirk Behme  *	Syed Mohammed Khasim <khasim@ti.com>
11ad9bc8e5SDirk Behme  *
12ad9bc8e5SDirk Behme  * Manikandan Pillai <mani.pillai@ti.com>
13ad9bc8e5SDirk Behme  *
14ad9bc8e5SDirk Behme  * See file CREDITS for list of people who contributed to this
15ad9bc8e5SDirk Behme  * project.
16ad9bc8e5SDirk Behme  *
17ad9bc8e5SDirk Behme  * This program is free software; you can redistribute it and/or
18ad9bc8e5SDirk Behme  * modify it under the terms of the GNU General Public License as
19ad9bc8e5SDirk Behme  * published by the Free Software Foundation; either version 2 of
20ad9bc8e5SDirk Behme  * the License, or (at your option) any later version.
21ad9bc8e5SDirk Behme  *
22ad9bc8e5SDirk Behme  * This program is distributed in the hope that it will be useful,
23ad9bc8e5SDirk Behme  * but WITHOUT ANY WARRANTY; without even the implied warranty of
24ad9bc8e5SDirk Behme  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
25ad9bc8e5SDirk Behme  * GNU General Public License for more details.
26ad9bc8e5SDirk Behme  *
27ad9bc8e5SDirk Behme  * You should have received a copy of the GNU General Public License
28ad9bc8e5SDirk Behme  * along with this program; if not, write to the Free Software
29ad9bc8e5SDirk Behme  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30ad9bc8e5SDirk Behme  * MA 02111-1307 USA
31ad9bc8e5SDirk Behme  */
32ad9bc8e5SDirk Behme 
33*741de266SSanjeev Premi #ifndef __OMAP3EVM_CONFIG_H
34*741de266SSanjeev Premi #define __OMAP3EVM_CONFIG_H
35*741de266SSanjeev Premi 
36*741de266SSanjeev Premi #include <asm/arch/cpu.h>
37*741de266SSanjeev Premi #include <asm/arch/omap3.h>
38*741de266SSanjeev Premi 
39*741de266SSanjeev Premi /* =============================================================================
40*741de266SSanjeev Premi  * This section holds the common definitions that correspond to the
41*741de266SSanjeev Premi  * current default configuration - omap3_evm_config
42*741de266SSanjeev Premi  * =============================================================================
43*741de266SSanjeev Premi  */
44*741de266SSanjeev Premi 
45*741de266SSanjeev Premi /* ----------------------------------------------------------------------------
46*741de266SSanjeev Premi  * Supported U-boot commands
47*741de266SSanjeev Premi  * ----------------------------------------------------------------------------
48*741de266SSanjeev Premi  */
49*741de266SSanjeev Premi 
50*741de266SSanjeev Premi /* Default commands to include */
51*741de266SSanjeev Premi #include <config_cmd_default.h>
52*741de266SSanjeev Premi 
53*741de266SSanjeev Premi #define CONFIG_CMD_EXT2		/* EXT2 Support			*/
54*741de266SSanjeev Premi #define CONFIG_CMD_FAT		/* FAT support			*/
55*741de266SSanjeev Premi #define CONFIG_CMD_JFFS2	/* JFFS2 Support		*/
56*741de266SSanjeev Premi 
57*741de266SSanjeev Premi #define CONFIG_CMD_I2C		/* I2C serial bus support	*/
58*741de266SSanjeev Premi #define CONFIG_CMD_MMC		/* MMC support			*/
59*741de266SSanjeev Premi #define CONFIG_CMD_NAND		/* NAND support			*/
60*741de266SSanjeev Premi #define CONFIG_CMD_DHCP
61*741de266SSanjeev Premi #define CONFIG_CMD_PING
62*741de266SSanjeev Premi 
63*741de266SSanjeev Premi #undef CONFIG_CMD_FLASH		/* flinfo, erase, protect	*/
64*741de266SSanjeev Premi #undef CONFIG_CMD_FPGA		/* FPGA configuration Support	*/
65*741de266SSanjeev Premi #undef CONFIG_CMD_IMI		/* iminfo			*/
66*741de266SSanjeev Premi #undef CONFIG_CMD_IMLS		/* List all found images	*/
67*741de266SSanjeev Premi 
68*741de266SSanjeev Premi /* ----------------------------------------------------------------------------
69*741de266SSanjeev Premi  * Supported U-boot features
70*741de266SSanjeev Premi  * ----------------------------------------------------------------------------
71*741de266SSanjeev Premi  */
72*741de266SSanjeev Premi #define CONFIG_SYS_LONGHELP
73*741de266SSanjeev Premi #define CONFIG_SYS_HUSH_PARSER
74*741de266SSanjeev Premi 
75*741de266SSanjeev Premi /* Display CPU and Board information */
76*741de266SSanjeev Premi #define CONFIG_DISPLAY_CPUINFO
77*741de266SSanjeev Premi #define CONFIG_DISPLAY_BOARDINFO
78*741de266SSanjeev Premi 
79*741de266SSanjeev Premi /* Allow to overwrite serial and ethaddr */
80*741de266SSanjeev Premi #define CONFIG_ENV_OVERWRITE
81*741de266SSanjeev Premi 
82*741de266SSanjeev Premi /* Add auto-completion support */
83*741de266SSanjeev Premi #define CONFIG_AUTO_COMPLETE
84*741de266SSanjeev Premi 
85*741de266SSanjeev Premi /* ----------------------------------------------------------------------------
86*741de266SSanjeev Premi  * Supported hardware
87*741de266SSanjeev Premi  * ----------------------------------------------------------------------------
88*741de266SSanjeev Premi  */
89*741de266SSanjeev Premi 
90*741de266SSanjeev Premi /* MMC */
91*741de266SSanjeev Premi #define CONFIG_MMC
92*741de266SSanjeev Premi #define CONFIG_GENERIC_MMC
93*741de266SSanjeev Premi #define CONFIG_OMAP_HSMMC
94*741de266SSanjeev Premi #define CONFIG_DOS_PARTITION
95*741de266SSanjeev Premi 
96*741de266SSanjeev Premi /* USB
97*741de266SSanjeev Premi  *
98*741de266SSanjeev Premi  * Enable CONFIG_MUSB_HCD for Host functionalities MSC, keyboard
99*741de266SSanjeev Premi  * Enable CONFIG_MUSB_UDD for Device functionalities.
100*741de266SSanjeev Premi  */
101*741de266SSanjeev Premi #define CONFIG_USB_OMAP3
102*741de266SSanjeev Premi #define CONFIG_MUSB_HCD
103*741de266SSanjeev Premi /* #define CONFIG_MUSB_UDC */
104*741de266SSanjeev Premi 
105*741de266SSanjeev Premi /* -----------------------------------------------------------------------------
106*741de266SSanjeev Premi  * Default environment
107*741de266SSanjeev Premi  * -----------------------------------------------------------------------------
108*741de266SSanjeev Premi  */
109*741de266SSanjeev Premi #define CONFIG_BOOTDELAY	10
110*741de266SSanjeev Premi 
111*741de266SSanjeev Premi #define CONFIG_EXTRA_ENV_SETTINGS \
112*741de266SSanjeev Premi 	"loadaddr=0x82000000\0" \
113*741de266SSanjeev Premi 	"usbtty=cdc_acm\0" \
114*741de266SSanjeev Premi 	"mmcdev=0\0" \
115*741de266SSanjeev Premi 	"memsize=128M\0" \
116*741de266SSanjeev Premi 	"console=ttyO0,115200n8\0" \
117*741de266SSanjeev Premi 	"mmcargs=setenv bootargs console=${console} " \
118*741de266SSanjeev Premi 		"mem=${memsize}\0 " \
119*741de266SSanjeev Premi 		"root=/dev/mmcblk0p2 rw " \
120*741de266SSanjeev Premi 		"rootfstype=ext3 rootwait\0" \
121*741de266SSanjeev Premi 	"nandargs=setenv bootargs console=${console} " \
122*741de266SSanjeev Premi 		"mem=${memsize}\0 " \
123*741de266SSanjeev Premi 		"root=/dev/mtdblock4 rw " \
124*741de266SSanjeev Premi 		"rootfstype=jffs2\0" \
125*741de266SSanjeev Premi 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
126*741de266SSanjeev Premi 	"bootscript=echo Running bootscript from mmc ...; " \
127*741de266SSanjeev Premi 		"source ${loadaddr}\0" \
128*741de266SSanjeev Premi 	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
129*741de266SSanjeev Premi 	"mmcboot=echo Booting from mmc ...; " \
130*741de266SSanjeev Premi 		"run mmcargs; " \
131*741de266SSanjeev Premi 		"bootm ${loadaddr}\0" \
132*741de266SSanjeev Premi 	"nandboot=echo Booting from nand ...; " \
133*741de266SSanjeev Premi 		"run nandargs; " \
134*741de266SSanjeev Premi 		"onenand read ${loadaddr} 280000 400000; " \
135*741de266SSanjeev Premi 		"bootm ${loadaddr}\0" \
136*741de266SSanjeev Premi 
137*741de266SSanjeev Premi #define CONFIG_BOOTCOMMAND \
138*741de266SSanjeev Premi 	"if mmc rescan ${mmcdev}; then " \
139*741de266SSanjeev Premi 		"if run loadbootscript; then " \
140*741de266SSanjeev Premi 			"run bootscript; " \
141*741de266SSanjeev Premi 		"else " \
142*741de266SSanjeev Premi 			"if run loaduimage; then " \
143*741de266SSanjeev Premi 				"run mmcboot; " \
144*741de266SSanjeev Premi 			"else run nandboot; " \
145*741de266SSanjeev Premi 			"fi; " \
146*741de266SSanjeev Premi 		"fi; " \
147*741de266SSanjeev Premi 	"else run nandboot; fi"
148*741de266SSanjeev Premi 
149*741de266SSanjeev Premi /* =============================================================================
150*741de266SSanjeev Premi  * This section holds the common definitions that can be used by
151*741de266SSanjeev Premi  * all OMAP3EVM based configurations.
152*741de266SSanjeev Premi  * =============================================================================
153*741de266SSanjeev Premi  */
154ad9bc8e5SDirk Behme 
155ad9bc8e5SDirk Behme /*
156*741de266SSanjeev Premi  * High level configuration options
157ad9bc8e5SDirk Behme  */
158ee8e2254SSanjeev Premi #define CONFIG_OMAP			/* This is TI OMAP core */
159ee8e2254SSanjeev Premi #define CONFIG_OMAP34XX			/* belonging to 34XX family */
160ee8e2254SSanjeev Premi #define CONFIG_OMAP3430			/* which is in a 3430 */
161ad9bc8e5SDirk Behme 
162cae377b5SVaibhav Hiremath #define CONFIG_SDRC			/* The chip has SDRC controller */
163cae377b5SVaibhav Hiremath 
164ee8e2254SSanjeev Premi #define CONFIG_OMAP3_EVM		/* This is a OMAP3 EVM */
165ee8e2254SSanjeev Premi #define CONFIG_OMAP3_MICRON_DDR		/* with MICRON DDR part */
166ee8e2254SSanjeev Premi #define CONFIG_TWL4030_POWER		/* with TWL4030 PMIC */
167ad9bc8e5SDirk Behme 
168ee8e2254SSanjeev Premi #undef CONFIG_USE_IRQ			/* no support for IRQs */
169ee8e2254SSanjeev Premi 
170ee8e2254SSanjeev Premi /*
171ee8e2254SSanjeev Premi  * Clock related definitions
172ee8e2254SSanjeev Premi  */
173ad9bc8e5SDirk Behme #define V_OSCK			26000000	/* Clock output from T2 */
174ad9bc8e5SDirk Behme #define V_SCLK			(V_OSCK >> 1)
175ad9bc8e5SDirk Behme 
176ad9bc8e5SDirk Behme /*
177ee8e2254SSanjeev Premi  * OMAP3 has 12 GP timers, they can be driven by the system clock
178ee8e2254SSanjeev Premi  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
179ee8e2254SSanjeev Premi  * This rate is divided by a local divisor.
180ad9bc8e5SDirk Behme  */
181ee8e2254SSanjeev Premi #define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
182ee8e2254SSanjeev Premi #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
183ee8e2254SSanjeev Premi #define CONFIG_SYS_HZ			1000
184ee8e2254SSanjeev Premi 
185ee8e2254SSanjeev Premi /* Size of environment - 128KB */
186ee8e2254SSanjeev Premi #define CONFIG_ENV_SIZE			(128 << 10)
187ee8e2254SSanjeev Premi 
188ee8e2254SSanjeev Premi /* Size of malloc pool */
1899c44ddccSSandeep Paulraj #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10))
190ee8e2254SSanjeev Premi 
191ad9bc8e5SDirk Behme /*
192ee8e2254SSanjeev Premi  * Stack sizes
193*741de266SSanjeev Premi  * These values are used in start.S
194ee8e2254SSanjeev Premi  */
195ee8e2254SSanjeev Premi #define CONFIG_STACKSIZE	(128 << 10)	/* regular stack 128 KiB */
196*741de266SSanjeev Premi 
197ee8e2254SSanjeev Premi #ifdef CONFIG_USE_IRQ
198ee8e2254SSanjeev Premi #define CONFIG_STACKSIZE_IRQ	(4 << 10)	/* IRQ stack 4 KiB */
199ee8e2254SSanjeev Premi #define CONFIG_STACKSIZE_FIQ	(4 << 10)	/* FIQ stack 4 KiB */
200ee8e2254SSanjeev Premi #endif
201ee8e2254SSanjeev Premi 
202ee8e2254SSanjeev Premi /*
203ee8e2254SSanjeev Premi  * Physical Memory Map
204ee8e2254SSanjeev Premi  * Note 1: CS1 may or may not be populated
205ee8e2254SSanjeev Premi  * Note 2: SDRAM size is expected to be at least 32MB
206ee8e2254SSanjeev Premi  */
207ee8e2254SSanjeev Premi #define CONFIG_NR_DRAM_BANKS		2
208ee8e2254SSanjeev Premi #define PHYS_SDRAM_1			OMAP34XX_SDRC_CS0
209ee8e2254SSanjeev Premi #define PHYS_SDRAM_1_SIZE		(32 << 20)
210ee8e2254SSanjeev Premi #define PHYS_SDRAM_2			OMAP34XX_SDRC_CS1
211ee8e2254SSanjeev Premi 
212ee8e2254SSanjeev Premi /* SDRAM Bank Allocation method */
213ee8e2254SSanjeev Premi #define SDRC_R_B_C
214ee8e2254SSanjeev Premi 
215ee8e2254SSanjeev Premi /* Limits for memtest */
216ee8e2254SSanjeev Premi #define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
217ee8e2254SSanjeev Premi #define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
218ee8e2254SSanjeev Premi 						0x01F00000) /* 31MB */
219ee8e2254SSanjeev Premi 
220ee8e2254SSanjeev Premi /* Default load address */
221ee8e2254SSanjeev Premi #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0)
222ee8e2254SSanjeev Premi 
223ee8e2254SSanjeev Premi /* -----------------------------------------------------------------------------
224ad9bc8e5SDirk Behme  * Hardware drivers
225ee8e2254SSanjeev Premi  * -----------------------------------------------------------------------------
226ad9bc8e5SDirk Behme  */
227ad9bc8e5SDirk Behme 
228ad9bc8e5SDirk Behme /*
229ad9bc8e5SDirk Behme  * NS16550 Configuration
230ad9bc8e5SDirk Behme  */
231ad9bc8e5SDirk Behme #define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */
232ad9bc8e5SDirk Behme 
233ad9bc8e5SDirk Behme #define CONFIG_SYS_NS16550
234ad9bc8e5SDirk Behme #define CONFIG_SYS_NS16550_SERIAL
235ad9bc8e5SDirk Behme #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
236ad9bc8e5SDirk Behme #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
237ad9bc8e5SDirk Behme 
238ad9bc8e5SDirk Behme /*
239ad9bc8e5SDirk Behme  * select serial console configuration
240ad9bc8e5SDirk Behme  */
241ad9bc8e5SDirk Behme #define CONFIG_CONS_INDEX		1
242ad9bc8e5SDirk Behme #define CONFIG_SERIAL1			1	/* UART1 on OMAP3 EVM */
243ee8e2254SSanjeev Premi #define CONFIG_SYS_NS16550_COM1		OMAP34XX_UART1
244ad9bc8e5SDirk Behme #define CONFIG_BAUDRATE			115200
245ad9bc8e5SDirk Behme #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
246ad9bc8e5SDirk Behme 					115200}
247ad9bc8e5SDirk Behme 
248ee8e2254SSanjeev Premi /*
249ee8e2254SSanjeev Premi  * I2C
250ee8e2254SSanjeev Premi  */
251ee8e2254SSanjeev Premi #define CONFIG_HARD_I2C
252ee8e2254SSanjeev Premi #define CONFIG_DRIVER_OMAP34XX_I2C
253ee8e2254SSanjeev Premi 
254ee8e2254SSanjeev Premi #define CONFIG_SYS_I2C_SPEED		100000
255ee8e2254SSanjeev Premi #define CONFIG_SYS_I2C_SLAVE		1
256ee8e2254SSanjeev Premi #define CONFIG_SYS_I2C_BUS		0
257ee8e2254SSanjeev Premi #define CONFIG_SYS_I2C_BUS_SELECT	1
258ee8e2254SSanjeev Premi 
259ee8e2254SSanjeev Premi /*
260ee8e2254SSanjeev Premi  * PISMO support
261ee8e2254SSanjeev Premi  */
262ee8e2254SSanjeev Premi #define PISMO1_NAND_SIZE		GPMC_SIZE_128M
263ee8e2254SSanjeev Premi #define PISMO1_ONEN_SIZE		GPMC_SIZE_128M
264ee8e2254SSanjeev Premi 
265ee8e2254SSanjeev Premi /* Monitor at start of flash - Reserve 2 sectors */
266ee8e2254SSanjeev Premi #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
267ee8e2254SSanjeev Premi 
268ee8e2254SSanjeev Premi #define CONFIG_SYS_MONITOR_LEN		(256 << 10)
269ee8e2254SSanjeev Premi 
270ee8e2254SSanjeev Premi /* Start location & size of environment */
271ee8e2254SSanjeev Premi #define ONENAND_ENV_OFFSET		0x260000
272ee8e2254SSanjeev Premi #define SMNAND_ENV_OFFSET		0x260000
273ee8e2254SSanjeev Premi 
274ee8e2254SSanjeev Premi #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
275ee8e2254SSanjeev Premi 
276ee8e2254SSanjeev Premi /*
277ee8e2254SSanjeev Premi  * NAND
278ee8e2254SSanjeev Premi  */
279ee8e2254SSanjeev Premi /* Physical address to access NAND */
280ee8e2254SSanjeev Premi #define CONFIG_SYS_NAND_ADDR		NAND_BASE
281ee8e2254SSanjeev Premi 
282ee8e2254SSanjeev Premi /* Physical address to access NAND at CS0 */
283ee8e2254SSanjeev Premi #define CONFIG_SYS_NAND_BASE		NAND_BASE
284ee8e2254SSanjeev Premi 
285ee8e2254SSanjeev Premi /* Max number of NAND devices */
286ee8e2254SSanjeev Premi #define CONFIG_SYS_MAX_NAND_DEVICE	1
287ee8e2254SSanjeev Premi 
288ee8e2254SSanjeev Premi /* Timeout values (in ticks) */
289ee8e2254SSanjeev Premi #define CONFIG_SYS_FLASH_ERASE_TOUT	(100 * CONFIG_SYS_HZ)
290ee8e2254SSanjeev Premi #define CONFIG_SYS_FLASH_WRITE_TOUT	(100 * CONFIG_SYS_HZ)
291ee8e2254SSanjeev Premi 
292ee8e2254SSanjeev Premi /* Flash banks JFFS2 should use */
293ee8e2254SSanjeev Premi #define CONFIG_SYS_MAX_MTD_BANKS	(CONFIG_SYS_MAX_FLASH_BANKS + \
294ee8e2254SSanjeev Premi 						CONFIG_SYS_MAX_NAND_DEVICE)
295ee8e2254SSanjeev Premi 
296ee8e2254SSanjeev Premi #define CONFIG_SYS_JFFS2_MEM_NAND
297ee8e2254SSanjeev Premi #define CONFIG_SYS_JFFS2_FIRST_BANK	CONFIG_SYS_MAX_FLASH_BANKS
298ee8e2254SSanjeev Premi #define CONFIG_SYS_JFFS2_NUM_BANKS	1
299ee8e2254SSanjeev Premi 
300ee8e2254SSanjeev Premi #define CONFIG_JFFS2_NAND
301ee8e2254SSanjeev Premi /* nand device jffs2 lives on */
302ee8e2254SSanjeev Premi #define CONFIG_JFFS2_DEV		"nand0"
303ee8e2254SSanjeev Premi /* Start of jffs2 partition */
304ee8e2254SSanjeev Premi #define CONFIG_JFFS2_PART_OFFSET	0x680000
305ee8e2254SSanjeev Premi /* Size of jffs2 partition */
306ee8e2254SSanjeev Premi #define CONFIG_JFFS2_PART_SIZE		0xf980000
307ee8e2254SSanjeev Premi 
308ee8e2254SSanjeev Premi /*
309*741de266SSanjeev Premi  * USB
310ee8e2254SSanjeev Premi  */
31173c8640eSAjay Kumar Gupta #ifdef CONFIG_USB_OMAP3
31273c8640eSAjay Kumar Gupta 
31373c8640eSAjay Kumar Gupta #ifdef CONFIG_MUSB_HCD
31473c8640eSAjay Kumar Gupta #define CONFIG_CMD_USB
31573c8640eSAjay Kumar Gupta 
31673c8640eSAjay Kumar Gupta #define CONFIG_USB_STORAGE
31773c8640eSAjay Kumar Gupta #define CONGIG_CMD_STORAGE
31873c8640eSAjay Kumar Gupta #define CONFIG_CMD_FAT
31973c8640eSAjay Kumar Gupta 
32073c8640eSAjay Kumar Gupta #ifdef CONFIG_USB_KEYBOARD
32173c8640eSAjay Kumar Gupta #define CONFIG_SYS_USB_EVENT_POLL
32273c8640eSAjay Kumar Gupta #define CONFIG_PREBOOT			"usb start"
32373c8640eSAjay Kumar Gupta #endif /* CONFIG_USB_KEYBOARD */
32473c8640eSAjay Kumar Gupta 
32573c8640eSAjay Kumar Gupta #endif /* CONFIG_MUSB_HCD */
32673c8640eSAjay Kumar Gupta 
32773c8640eSAjay Kumar Gupta #ifdef CONFIG_MUSB_UDC
32873c8640eSAjay Kumar Gupta /* USB device configuration */
329ee8e2254SSanjeev Premi #define CONFIG_USB_DEVICE
330ee8e2254SSanjeev Premi #define CONFIG_USB_TTY
331ee8e2254SSanjeev Premi #define CONFIG_SYS_CONSOLE_IS_IN_ENV
332ee8e2254SSanjeev Premi 
33373c8640eSAjay Kumar Gupta /* Change these to suit your needs */
33473c8640eSAjay Kumar Gupta #define CONFIG_USBD_VENDORID		0x0451
33573c8640eSAjay Kumar Gupta #define CONFIG_USBD_PRODUCTID		0x5678
33673c8640eSAjay Kumar Gupta #define CONFIG_USBD_MANUFACTURER	"Texas Instruments"
33773c8640eSAjay Kumar Gupta #define CONFIG_USBD_PRODUCT_NAME	"EVM"
33873c8640eSAjay Kumar Gupta #endif /* CONFIG_MUSB_UDC */
33973c8640eSAjay Kumar Gupta 
34073c8640eSAjay Kumar Gupta #endif /* CONFIG_USB_OMAP3 */
34173c8640eSAjay Kumar Gupta 
342ee8e2254SSanjeev Premi /* ----------------------------------------------------------------------------
343ee8e2254SSanjeev Premi  * U-boot features
344ee8e2254SSanjeev Premi  * ----------------------------------------------------------------------------
345ee8e2254SSanjeev Premi  */
346ee8e2254SSanjeev Premi #define CONFIG_SYS_PROMPT		"OMAP3_EVM # "
347ee8e2254SSanjeev Premi #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
348ee8e2254SSanjeev Premi #define CONFIG_SYS_MAXARGS		16	/* max args for a command */
349ee8e2254SSanjeev Premi 
350ee8e2254SSanjeev Premi #define CONFIG_MISC_INIT_R
351ee8e2254SSanjeev Premi 
352ee8e2254SSanjeev Premi #define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
353ee8e2254SSanjeev Premi #define CONFIG_SETUP_MEMORY_TAGS
354ee8e2254SSanjeev Premi #define CONFIG_INITRD_TAG
355ee8e2254SSanjeev Premi #define CONFIG_REVISION_TAG
356ee8e2254SSanjeev Premi 
357ee8e2254SSanjeev Premi /* Size of Console IO buffer */
358ee8e2254SSanjeev Premi #define CONFIG_SYS_CBSIZE		512
359ee8e2254SSanjeev Premi 
360ee8e2254SSanjeev Premi /* Size of print buffer */
361ee8e2254SSanjeev Premi #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
362ee8e2254SSanjeev Premi 						sizeof(CONFIG_SYS_PROMPT) + 16)
363ee8e2254SSanjeev Premi 
364ee8e2254SSanjeev Premi /* Size of bootarg buffer */
365ee8e2254SSanjeev Premi #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
366ee8e2254SSanjeev Premi 
367*741de266SSanjeev Premi #define CONFIG_BOOTFILE			uImage
368ad9bc8e5SDirk Behme 
369ee8e2254SSanjeev Premi /*
370*741de266SSanjeev Premi  * NAND / OneNAND
371ee8e2254SSanjeev Premi  */
372ee8e2254SSanjeev Premi #if defined(CONFIG_CMD_NAND)
373ee8e2254SSanjeev Premi #define CONFIG_SYS_FLASH_BASE		PISMO1_NAND_BASE
374ee8e2254SSanjeev Premi 
375ee8e2254SSanjeev Premi #define CONFIG_NAND_OMAP_GPMC
376ee8e2254SSanjeev Premi #define GPMC_NAND_ECC_LP_x16_LAYOUT
377ee8e2254SSanjeev Premi #define CONFIG_ENV_IS_IN_NAND
378ee8e2254SSanjeev Premi #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
379ee8e2254SSanjeev Premi #elif defined(CONFIG_CMD_ONENAND)
380ee8e2254SSanjeev Premi #define CONFIG_SYS_FLASH_BASE		PISMO1_ONEN_BASE
381ee8e2254SSanjeev Premi #define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
382ee8e2254SSanjeev Premi 
383ee8e2254SSanjeev Premi #define CONFIG_ENV_IS_IN_ONENAND
384ee8e2254SSanjeev Premi #define CONFIG_ENV_OFFSET		ONENAND_ENV_OFFSET
385ee8e2254SSanjeev Premi #endif
386ee8e2254SSanjeev Premi 
387ee8e2254SSanjeev Premi #define CONFIG_ENV_ADDR			CONFIG_ENV_OFFSET
388ee8e2254SSanjeev Premi 
389ee8e2254SSanjeev Premi #if defined(CONFIG_CMD_NET)
390ee8e2254SSanjeev Premi 
391ee8e2254SSanjeev Premi /* Ethernet (SMSC9115 from SMSC9118 family) */
392ee8e2254SSanjeev Premi #define CONFIG_SMC911X
393ee8e2254SSanjeev Premi #define CONFIG_SMC911X_32_BIT
394ee8e2254SSanjeev Premi #define CONFIG_SMC911X_BASE		0x2C000000
395ee8e2254SSanjeev Premi 
396ee8e2254SSanjeev Premi /* BOOTP fields */
397ee8e2254SSanjeev Premi #define CONFIG_BOOTP_SUBNETMASK		0x00000001
398ee8e2254SSanjeev Premi #define CONFIG_BOOTP_GATEWAY		0x00000002
399ee8e2254SSanjeev Premi #define CONFIG_BOOTP_HOSTNAME		0x00000004
400ee8e2254SSanjeev Premi #define CONFIG_BOOTP_BOOTPATH		0x00000010
401ee8e2254SSanjeev Premi 
402ee8e2254SSanjeev Premi #endif /* CONFIG_CMD_NET */
403ee8e2254SSanjeev Premi 
404ee8e2254SSanjeev Premi /* Support for relocation */
405ee8e2254SSanjeev Premi #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
406ee8e2254SSanjeev Premi #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
407ee8e2254SSanjeev Premi #define CONFIG_SYS_INIT_RAM_SIZE	0x800
408ee8e2254SSanjeev Premi #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
409ee8e2254SSanjeev Premi 					 CONFIG_SYS_INIT_RAM_SIZE - \
410ee8e2254SSanjeev Premi 					 GENERATED_GBL_DATA_SIZE)
411ee8e2254SSanjeev Premi 
412ee8e2254SSanjeev Premi /* -----------------------------------------------------------------------------
413ee8e2254SSanjeev Premi  * Board specific
414ee8e2254SSanjeev Premi  * -----------------------------------------------------------------------------
415ee8e2254SSanjeev Premi  */
416ad9bc8e5SDirk Behme #define CONFIG_SYS_NO_FLASH
417ad9bc8e5SDirk Behme 
418ee8e2254SSanjeev Premi /* Uncomment to define the board revision statically */
419ee8e2254SSanjeev Premi /* #define CONFIG_STATIC_BOARD_REV	OMAP3EVM_BOARD_GEN_2 */
420ee8e2254SSanjeev Premi 
421ee8e2254SSanjeev Premi /* -----------------------------------------------------------------------------
422ee8e2254SSanjeev Premi  * Default environment
423ee8e2254SSanjeev Premi  * -----------------------------------------------------------------------------
424fccc0fcaSTom Rix  */
425ad9bc8e5SDirk Behme #define CONFIG_BOOTDELAY	10
426b3f44c21SJoe Hershberger #define CONFIG_BOOTFILE		"uImage"
427136cf92dSSanjeev Premi 
428ad9bc8e5SDirk Behme #define CONFIG_EXTRA_ENV_SETTINGS \
429ad9bc8e5SDirk Behme 	"loadaddr=0x82000000\0" \
43073c8640eSAjay Kumar Gupta 	"usbtty=cdc_acm\0" \
431dcc4f38bSVaibhav Hiremath 	"mmcdev=0\0" \
432effeda55SSanjeev Premi 	"console=ttyO0,115200n8\0" \
433ad9bc8e5SDirk Behme 	"mmcargs=setenv bootargs console=${console} " \
434ad9bc8e5SDirk Behme 		"root=/dev/mmcblk0p2 rw " \
435ad9bc8e5SDirk Behme 		"rootfstype=ext3 rootwait\0" \
436ad9bc8e5SDirk Behme 	"nandargs=setenv bootargs console=${console} " \
437ad9bc8e5SDirk Behme 		"root=/dev/mtdblock4 rw " \
438ad9bc8e5SDirk Behme 		"rootfstype=jffs2\0" \
439dcc4f38bSVaibhav Hiremath 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
440ad9bc8e5SDirk Behme 	"bootscript=echo Running bootscript from mmc ...; " \
44174de7aefSWolfgang Denk 		"source ${loadaddr}\0" \
442dcc4f38bSVaibhav Hiremath 	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
443ad9bc8e5SDirk Behme 	"mmcboot=echo Booting from mmc ...; " \
444ad9bc8e5SDirk Behme 		"run mmcargs; " \
445ad9bc8e5SDirk Behme 		"bootm ${loadaddr}\0" \
446ad9bc8e5SDirk Behme 	"nandboot=echo Booting from nand ...; " \
447ad9bc8e5SDirk Behme 		"run nandargs; " \
448ad9bc8e5SDirk Behme 		"onenand read ${loadaddr} 280000 400000; " \
449ad9bc8e5SDirk Behme 		"bootm ${loadaddr}\0" \
450ad9bc8e5SDirk Behme 
451ad9bc8e5SDirk Behme #define CONFIG_BOOTCOMMAND \
452dcc4f38bSVaibhav Hiremath 	"if mmc rescan ${mmcdev}; then " \
453ad9bc8e5SDirk Behme 		"if run loadbootscript; then " \
454ad9bc8e5SDirk Behme 			"run bootscript; " \
455ad9bc8e5SDirk Behme 		"else " \
456ad9bc8e5SDirk Behme 			"if run loaduimage; then " \
457ad9bc8e5SDirk Behme 				"run mmcboot; " \
458ad9bc8e5SDirk Behme 			"else run nandboot; " \
459ad9bc8e5SDirk Behme 			"fi; " \
460ad9bc8e5SDirk Behme 		"fi; " \
461ad9bc8e5SDirk Behme 	"else run nandboot; fi"
462ad9bc8e5SDirk Behme 
463*741de266SSanjeev Premi #endif /* __OMAP3EVM_CONFIG_H */
464