1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * 7 * Configuration settings for the TI OMAP3530 Beagle board. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __CONFIG_H 13 #define __CONFIG_H 14 15 /* 16 * High Level Configuration Options 17 */ 18 #define CONFIG_OMAP 1 /* in a TI OMAP core */ 19 #define CONFIG_OMAP34XX 1 /* which is a 34XX */ 20 #define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */ 21 #define CONFIG_OMAP_GPIO 22 #define CONFIG_OMAP_COMMON 23 24 #define CONFIG_SDRC /* The chip has SDRC controller */ 25 26 #include <asm/arch/cpu.h> /* get chip and board defs */ 27 #include <asm/arch/omap3.h> 28 29 /* 30 * Display CPU and Board information 31 */ 32 #define CONFIG_DISPLAY_CPUINFO 1 33 #define CONFIG_DISPLAY_BOARDINFO 1 34 35 /* Clock Defines */ 36 #define V_OSCK 26000000 /* Clock output from T2 */ 37 #define V_SCLK (V_OSCK >> 1) 38 39 #define CONFIG_MISC_INIT_R 40 41 #define CONFIG_OF_LIBFDT 42 #define CONFIG_CMD_BOOTZ 43 44 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 45 #define CONFIG_SETUP_MEMORY_TAGS 1 46 #define CONFIG_INITRD_TAG 1 47 #define CONFIG_REVISION_TAG 1 48 49 /* 50 * Size of malloc() pool 51 */ 52 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 53 /* Sector */ 54 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 55 56 /* 57 * Hardware drivers 58 */ 59 60 /* 61 * NS16550 Configuration 62 */ 63 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 64 65 #define CONFIG_SYS_NS16550 66 #define CONFIG_SYS_NS16550_SERIAL 67 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 68 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 69 70 /* 71 * select serial console configuration 72 */ 73 #define CONFIG_CONS_INDEX 3 74 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 75 #define CONFIG_SERIAL3 3 /* UART3 on Beagle Rev 2 */ 76 77 /* allow to overwrite serial and ethaddr */ 78 #define CONFIG_ENV_OVERWRITE 79 #define CONFIG_BAUDRATE 115200 80 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 81 115200} 82 #define CONFIG_GENERIC_MMC 1 83 #define CONFIG_MMC 1 84 #define CONFIG_OMAP_HSMMC 1 85 #define CONFIG_DOS_PARTITION 1 86 87 /* Status LED */ 88 #define CONFIG_STATUS_LED 1 89 #define CONFIG_BOARD_SPECIFIC_LED 1 90 #define STATUS_LED_BIT 0x01 91 #define STATUS_LED_STATE STATUS_LED_ON 92 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 93 #define STATUS_LED_BIT1 0x02 94 #define STATUS_LED_STATE1 STATUS_LED_ON 95 #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) 96 #define STATUS_LED_BOOT STATUS_LED_BIT 97 #define STATUS_LED_GREEN STATUS_LED_BIT1 98 99 /* Enable Multi Bus support for I2C */ 100 #define CONFIG_I2C_MULTI_BUS 1 101 102 /* Probe all devices */ 103 #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}} 104 105 /* USB */ 106 #define CONFIG_MUSB_GADGET 107 #define CONFIG_USB_MUSB_OMAP2PLUS 108 #define CONFIG_MUSB_PIO_ONLY 109 #define CONFIG_USB_GADGET_DUALSPEED 110 #define CONFIG_TWL4030_USB 1 111 #define CONFIG_USB_ETHER 112 #define CONFIG_USB_ETHER_RNDIS 113 114 /* USB EHCI */ 115 #define CONFIG_CMD_USB 116 #define CONFIG_USB_EHCI 117 118 #define CONFIG_USB_EHCI_OMAP 119 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147 120 121 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 122 #define CONFIG_USB_HOST_ETHER 123 #define CONFIG_USB_ETHER_SMSC95XX 124 #define CONFIG_USB_ETHER_ASIX 125 126 127 /* commands to include */ 128 #include <config_cmd_default.h> 129 130 #define CONFIG_CMD_ASKENV 131 132 #define CONFIG_CMD_CACHE 133 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 134 #define CONFIG_CMD_FAT /* FAT support */ 135 #define CONFIG_CMD_FS_GENERIC /* Generic FS support */ 136 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 137 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 138 #define MTDIDS_DEFAULT "nand0=nand" 139 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 140 "1920k(u-boot),128k(u-boot-env),"\ 141 "4m(kernel),-(fs)" 142 143 #define CONFIG_CMD_I2C /* I2C serial bus support */ 144 #define CONFIG_CMD_MMC /* MMC support */ 145 #define CONFIG_USB_STORAGE /* USB storage support */ 146 #define CONFIG_CMD_NAND /* NAND support */ 147 #define CONFIG_CMD_LED /* LED support */ 148 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ 149 #define CONFIG_CMD_NFS /* NFS support */ 150 #define CONFIG_CMD_PING 151 #define CONFIG_CMD_DHCP 152 #define CONFIG_CMD_SETEXPR /* Evaluate expressions */ 153 #define CONFIG_CMD_GPIO /* Enable gpio command */ 154 155 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 156 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 157 #undef CONFIG_CMD_IMI /* iminfo */ 158 #undef CONFIG_CMD_IMLS /* List all found images */ 159 160 #define CONFIG_SYS_NO_FLASH 161 #define CONFIG_SYS_I2C 162 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 163 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 164 #define CONFIG_SYS_I2C_OMAP34XX 165 #define CONFIG_VIDEO_OMAP3 /* DSS Support */ 166 167 /* 168 * TWL4030 169 */ 170 #define CONFIG_TWL4030_POWER 1 171 #define CONFIG_TWL4030_LED 1 172 173 /* 174 * Board NAND Info. 175 */ 176 #define CONFIG_SYS_NAND_QUIET_TEST 1 177 #define CONFIG_NAND_OMAP_GPMC 178 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 179 /* to access nand */ 180 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 181 /* to access nand at */ 182 /* CS0 */ 183 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 184 185 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 186 /* devices */ 187 188 /* Environment information */ 189 #define CONFIG_BOOTDELAY 3 190 191 #define CONFIG_EXTRA_ENV_SETTINGS \ 192 "loadaddr=0x80200000\0" \ 193 "rdaddr=0x81000000\0" \ 194 "fdt_high=0xffffffff\0" \ 195 "fdtaddr=0x80f80000\0" \ 196 "usbtty=cdc_acm\0" \ 197 "bootfile=uImage\0" \ 198 "ramdisk=ramdisk.gz\0" \ 199 "bootdir=/boot\0" \ 200 "bootpart=0:2\0" \ 201 "console=ttyO2,115200n8\0" \ 202 "mpurate=auto\0" \ 203 "buddy=none\0" \ 204 "optargs=\0" \ 205 "camera=none\0" \ 206 "vram=12M\0" \ 207 "dvimode=640x480MR-16@60\0" \ 208 "defaultdisplay=dvi\0" \ 209 "mmcdev=0\0" \ 210 "mmcroot=/dev/mmcblk0p2 rw\0" \ 211 "mmcrootfstype=ext3 rootwait\0" \ 212 "nandroot=ubi0:rootfs ubi.mtd=4\0" \ 213 "nandrootfstype=ubifs\0" \ 214 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \ 215 "ramrootfstype=ext2\0" \ 216 "mmcargs=setenv bootargs console=${console} " \ 217 "${optargs} " \ 218 "mpurate=${mpurate} " \ 219 "buddy=${buddy} "\ 220 "camera=${camera} "\ 221 "vram=${vram} " \ 222 "omapfb.mode=dvi:${dvimode} " \ 223 "omapdss.def_disp=${defaultdisplay} " \ 224 "root=${mmcroot} " \ 225 "rootfstype=${mmcrootfstype}\0" \ 226 "nandargs=setenv bootargs console=${console} " \ 227 "${optargs} " \ 228 "mpurate=${mpurate} " \ 229 "buddy=${buddy} "\ 230 "camera=${camera} "\ 231 "vram=${vram} " \ 232 "omapfb.mode=dvi:${dvimode} " \ 233 "omapdss.def_disp=${defaultdisplay} " \ 234 "root=${nandroot} " \ 235 "rootfstype=${nandrootfstype}\0" \ 236 "findfdt=" \ 237 "if test $beaglerev = AxBx; then " \ 238 "setenv fdtfile omap3-beagle.dtb; fi; " \ 239 "if test $beaglerev = Cx; then " \ 240 "setenv fdtfile omap3-beagle.dtb; fi; " \ 241 "if test $beaglerev = xMAB; then " \ 242 "setenv fdtfile omap3-beagle-xm.dtb; fi; " \ 243 "if test $beaglerev = xMC; then " \ 244 "setenv fdtfile omap3-beagle-xm.dtb; fi; " \ 245 "if test $fdtfile = undefined; then " \ 246 "echo WARNING: Could not determine device tree to use; fi; \0" \ 247 "bootenv=uEnv.txt\0" \ 248 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 249 "importbootenv=echo Importing environment from mmc ...; " \ 250 "env import -t $loadaddr $filesize\0" \ 251 "ramargs=setenv bootargs console=${console} " \ 252 "${optargs} " \ 253 "mpurate=${mpurate} " \ 254 "buddy=${buddy} "\ 255 "vram=${vram} " \ 256 "omapfb.mode=dvi:${dvimode} " \ 257 "omapdss.def_disp=${defaultdisplay} " \ 258 "root=${ramroot} " \ 259 "rootfstype=${ramrootfstype}\0" \ 260 "loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \ 261 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ 262 "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ 263 "mmcboot=echo Booting from mmc ...; " \ 264 "run mmcargs; " \ 265 "bootm ${loadaddr}\0" \ 266 "mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \ 267 "run mmcargs; " \ 268 "bootz ${loadaddr} - ${fdtaddr}\0" \ 269 "nandboot=echo Booting from nand ...; " \ 270 "run nandargs; " \ 271 "nand read ${loadaddr} 280000 400000; " \ 272 "bootm ${loadaddr}\0" \ 273 "ramboot=echo Booting from ramdisk ...; " \ 274 "run ramargs; " \ 275 "bootm ${loadaddr}\0" \ 276 "userbutton=if gpio input 173; then run userbutton_xm; " \ 277 "else run userbutton_nonxm; fi;\0" \ 278 "userbutton_xm=gpio input 4;\0" \ 279 "userbutton_nonxm=gpio input 7;\0" 280 /* "run userbutton" will return 1 (false) if pressed and 0 (true) if not */ 281 #define CONFIG_BOOTCOMMAND \ 282 "run findfdt; " \ 283 "mmc dev ${mmcdev}; if mmc rescan; then " \ 284 "if run userbutton; then " \ 285 "setenv bootenv uEnv.txt;" \ 286 "else " \ 287 "setenv bootenv user.txt;" \ 288 "fi;" \ 289 "echo SD/MMC found on device ${mmcdev};" \ 290 "if run loadbootenv; then " \ 291 "echo Loaded environment from ${bootenv};" \ 292 "run importbootenv;" \ 293 "fi;" \ 294 "if test -n $uenvcmd; then " \ 295 "echo Running uenvcmd ...;" \ 296 "run uenvcmd;" \ 297 "fi;" \ 298 "if run loadimage; then " \ 299 "run mmcboot;" \ 300 "fi;" \ 301 "fi;" \ 302 "run nandboot;" \ 303 "setenv bootfile zImage;" \ 304 "if run loadimage; then " \ 305 "run loadfdt;" \ 306 "run mmcbootz; " \ 307 "fi; " \ 308 309 #define CONFIG_AUTO_COMPLETE 1 310 /* 311 * Miscellaneous configurable options 312 */ 313 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 314 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 315 #define CONFIG_SYS_PROMPT "OMAP3 beagleboard.org # " 316 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 317 /* Print Buffer Size */ 318 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 319 sizeof(CONFIG_SYS_PROMPT) + 16) 320 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 321 /* Boot Argument Buffer Size */ 322 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 323 324 #define CONFIG_SYS_ALT_MEMTEST 1 325 #define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */ 326 /* defaults */ 327 #define CONFIG_SYS_MEMTEST_END (0x87FFFFFF) /* 128MB */ 328 #define CONFIG_SYS_MEMTEST_SCRATCH (0x81000000) /* dummy address */ 329 330 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ 331 /* load address */ 332 333 /* 334 * OMAP3 has 12 GP timers, they can be driven by the system clock 335 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 336 * This rate is divided by a local divisor. 337 */ 338 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 339 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 340 341 /*----------------------------------------------------------------------- 342 * Physical Memory Map 343 */ 344 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 345 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 346 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 347 348 /*----------------------------------------------------------------------- 349 * FLASH and environment organization 350 */ 351 352 /* **** PISMO SUPPORT *** */ 353 354 /* Configure the PISMO */ 355 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 356 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M 357 358 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 359 360 #if defined(CONFIG_CMD_NAND) 361 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE 362 #endif 363 364 /* Monitor at start of flash */ 365 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 366 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 367 368 #define CONFIG_ENV_IS_IN_NAND 1 369 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 370 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 371 372 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 373 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 374 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 375 376 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 377 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 378 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 379 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 380 CONFIG_SYS_INIT_RAM_SIZE - \ 381 GENERATED_GBL_DATA_SIZE) 382 383 #define CONFIG_OMAP3_SPI 384 385 #define CONFIG_SYS_CACHELINE_SIZE 64 386 387 /* Defines for SPL */ 388 #define CONFIG_SPL 389 #define CONFIG_SPL_FRAMEWORK 390 #define CONFIG_SPL_NAND_SIMPLE 391 #define CONFIG_SPL_TEXT_BASE 0x40200800 392 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ 393 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 394 395 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 396 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 397 398 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 399 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 400 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 401 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 402 403 #define CONFIG_SPL_BOARD_INIT 404 #define CONFIG_SPL_LIBCOMMON_SUPPORT 405 #define CONFIG_SPL_LIBDISK_SUPPORT 406 #define CONFIG_SPL_I2C_SUPPORT 407 #define CONFIG_SPL_LIBGENERIC_SUPPORT 408 #define CONFIG_SPL_MMC_SUPPORT 409 #define CONFIG_SPL_FAT_SUPPORT 410 #define CONFIG_SPL_SERIAL_SUPPORT 411 #define CONFIG_SPL_NAND_SUPPORT 412 #define CONFIG_SPL_NAND_BASE 413 #define CONFIG_SPL_NAND_DRIVERS 414 #define CONFIG_SPL_NAND_ECC 415 #define CONFIG_SPL_GPIO_SUPPORT 416 #define CONFIG_SPL_POWER_SUPPORT 417 #define CONFIG_SPL_OMAP3_ID_NAND 418 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 419 420 /* NAND boot config */ 421 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 422 #define CONFIG_SYS_NAND_PAGE_COUNT 64 423 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 424 #define CONFIG_SYS_NAND_OOBSIZE 64 425 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 426 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 427 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 428 10, 11, 12, 13} 429 #define CONFIG_SYS_NAND_ECCSIZE 512 430 #define CONFIG_SYS_NAND_ECCBYTES 3 431 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 432 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 433 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 434 435 /* 436 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 437 * 64 bytes before this address should be set aside for u-boot.img's 438 * header. That is 0x800FFFC0--0x80100000 should not be used for any 439 * other needs. 440 */ 441 #define CONFIG_SYS_TEXT_BASE 0x80100000 442 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 443 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 444 445 #endif /* __CONFIG_H */ 446