xref: /openbmc/u-boot/include/configs/mx7_common.h (revision 1a8150d4b16fbafa6f1d207ddb85eda7dc399e2d)
1*1a8150d4SAdrian Alonso /*
2*1a8150d4SAdrian Alonso  * Copyright (C) 2015 Freescale Semiconductor, Inc.
3*1a8150d4SAdrian Alonso  *
4*1a8150d4SAdrian Alonso  * Configuration settings for the Freescale i.MX7.
5*1a8150d4SAdrian Alonso  *
6*1a8150d4SAdrian Alonso  * SPDX-License-Identifier:	GPL-2.0+
7*1a8150d4SAdrian Alonso  */
8*1a8150d4SAdrian Alonso 
9*1a8150d4SAdrian Alonso #ifndef __MX7_COMMON_H
10*1a8150d4SAdrian Alonso #define __MX7_COMMON_H
11*1a8150d4SAdrian Alonso 
12*1a8150d4SAdrian Alonso #include <linux/sizes.h>
13*1a8150d4SAdrian Alonso #include <asm/arch/imx-regs.h>
14*1a8150d4SAdrian Alonso #include <asm/imx-common/gpio.h>
15*1a8150d4SAdrian Alonso 
16*1a8150d4SAdrian Alonso #ifndef CONFIG_MX7
17*1a8150d4SAdrian Alonso #define CONFIG_MX7
18*1a8150d4SAdrian Alonso #endif
19*1a8150d4SAdrian Alonso 
20*1a8150d4SAdrian Alonso /* Timer settings */
21*1a8150d4SAdrian Alonso #define CONFIG_MXC_GPT_HCLK
22*1a8150d4SAdrian Alonso #define CONFIG_SYSCOUNTER_TIMER
23*1a8150d4SAdrian Alonso #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
24*1a8150d4SAdrian Alonso 
25*1a8150d4SAdrian Alonso /* Enable iomux-lpsr support */
26*1a8150d4SAdrian Alonso #define CONFIG_IOMUX_LPSR
27*1a8150d4SAdrian Alonso #define CONFIG_IMX_FIXED_IVT_OFFSET
28*1a8150d4SAdrian Alonso 
29*1a8150d4SAdrian Alonso /* Size of malloc() pool */
30*1a8150d4SAdrian Alonso #define CONFIG_SYS_MALLOC_LEN           (32 * SZ_1M)
31*1a8150d4SAdrian Alonso 
32*1a8150d4SAdrian Alonso #define CONFIG_BOARD_EARLY_INIT_F
33*1a8150d4SAdrian Alonso #define CONFIG_BOARD_LATE_INIT
34*1a8150d4SAdrian Alonso 
35*1a8150d4SAdrian Alonso #define CONFIG_ROM_UNIFIED_SECTIONS
36*1a8150d4SAdrian Alonso #define CONFIG_SYS_GENERIC_BOARD
37*1a8150d4SAdrian Alonso #define CONFIG_DISPLAY_CPUINFO
38*1a8150d4SAdrian Alonso #define CONFIG_DISPLAY_BOARDINFO
39*1a8150d4SAdrian Alonso 
40*1a8150d4SAdrian Alonso #define CONFIG_LOADADDR                 0x80800000
41*1a8150d4SAdrian Alonso #define CONFIG_SYS_TEXT_BASE            0x87800000
42*1a8150d4SAdrian Alonso 
43*1a8150d4SAdrian Alonso #ifndef CONFIG_BOOTDELAY
44*1a8150d4SAdrian Alonso #define CONFIG_BOOTDELAY                3
45*1a8150d4SAdrian Alonso #endif
46*1a8150d4SAdrian Alonso 
47*1a8150d4SAdrian Alonso /* allow to overwrite serial and ethaddr */
48*1a8150d4SAdrian Alonso #define CONFIG_ENV_OVERWRITE
49*1a8150d4SAdrian Alonso #define CONFIG_CONS_INDEX               1
50*1a8150d4SAdrian Alonso #define CONFIG_BAUDRATE                 115200
51*1a8150d4SAdrian Alonso 
52*1a8150d4SAdrian Alonso /* Filesystems and image support */
53*1a8150d4SAdrian Alonso #define CONFIG_OF_LIBFDT
54*1a8150d4SAdrian Alonso #define CONFIG_CMD_BOOTZ
55*1a8150d4SAdrian Alonso #define CONFIG_DOS_PARTITION
56*1a8150d4SAdrian Alonso #define CONFIG_CMD_EXT2
57*1a8150d4SAdrian Alonso #define CONFIG_CMD_EXT4
58*1a8150d4SAdrian Alonso #define CONFIG_CMD_EXT4_WRITE
59*1a8150d4SAdrian Alonso #define CONFIG_CMD_FAT
60*1a8150d4SAdrian Alonso 
61*1a8150d4SAdrian Alonso /* Miscellaneous configurable options */
62*1a8150d4SAdrian Alonso #undef CONFIG_CMD_IMLS
63*1a8150d4SAdrian Alonso #define CONFIG_SYS_LONGHELP
64*1a8150d4SAdrian Alonso #define CONFIG_SYS_HUSH_PARSER
65*1a8150d4SAdrian Alonso #define CONFIG_CMDLINE_EDITING
66*1a8150d4SAdrian Alonso #define CONFIG_AUTO_COMPLETE
67*1a8150d4SAdrian Alonso #define CONFIG_SYS_CBSIZE		512
68*1a8150d4SAdrian Alonso #define CONFIG_SYS_MAXARGS		32
69*1a8150d4SAdrian Alonso #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
70*1a8150d4SAdrian Alonso 
71*1a8150d4SAdrian Alonso #ifndef CONFIG_SYS_DCACHE_OFF
72*1a8150d4SAdrian Alonso #define CONFIG_CMD_CACHE
73*1a8150d4SAdrian Alonso #endif
74*1a8150d4SAdrian Alonso 
75*1a8150d4SAdrian Alonso /* GPIO */
76*1a8150d4SAdrian Alonso #define CONFIG_MXC_GPIO
77*1a8150d4SAdrian Alonso #define CONFIG_CMD_GPIO
78*1a8150d4SAdrian Alonso 
79*1a8150d4SAdrian Alonso /* UART */
80*1a8150d4SAdrian Alonso #define CONFIG_MXC_UART
81*1a8150d4SAdrian Alonso #define CONFIG_MXC_UART_BASE            UART1_IPS_BASE_ADDR
82*1a8150d4SAdrian Alonso 
83*1a8150d4SAdrian Alonso /* MMC */
84*1a8150d4SAdrian Alonso #define CONFIG_MMC
85*1a8150d4SAdrian Alonso #define CONFIG_CMD_MMC
86*1a8150d4SAdrian Alonso #define CONFIG_GENERIC_MMC
87*1a8150d4SAdrian Alonso #define CONFIG_BOUNCE_BUFFER
88*1a8150d4SAdrian Alonso #define CONFIG_FSL_ESDHC
89*1a8150d4SAdrian Alonso #define CONFIG_FSL_USDHC
90*1a8150d4SAdrian Alonso 
91*1a8150d4SAdrian Alonso /* Fuses */
92*1a8150d4SAdrian Alonso #define CONFIG_CMD_FUSE
93*1a8150d4SAdrian Alonso #define CONFIG_MXC_OCOTP
94*1a8150d4SAdrian Alonso 
95*1a8150d4SAdrian Alonso #endif
96