1 /* 2 * Copyright (C) 2015 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX6UL 14x14 EVK board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 #ifndef __MX6UL_14X14_EVK_CONFIG_H 9 #define __MX6UL_14X14_EVK_CONFIG_H 10 11 #include <asm/arch/imx-regs.h> 12 #include <linux/sizes.h> 13 #include "mx6_common.h" 14 #include <asm/mach-imx/gpio.h> 15 16 #define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) 17 18 /* SPL options */ 19 #include "imx6_spl.h" 20 21 /* Size of malloc() pool */ 22 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) 23 24 #define CONFIG_MXC_UART 25 #define CONFIG_MXC_UART_BASE UART1_BASE 26 27 /* MMC Configs */ 28 #ifdef CONFIG_FSL_USDHC 29 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 30 31 /* NAND pin conflicts with usdhc2 */ 32 #ifdef CONFIG_NAND_MXS 33 #define CONFIG_SYS_FSL_USDHC_NUM 1 34 #else 35 #define CONFIG_SYS_FSL_USDHC_NUM 2 36 #endif 37 38 #endif 39 40 /* I2C configs */ 41 #ifdef CONFIG_CMD_I2C 42 #define CONFIG_SYS_I2C 43 #define CONFIG_SYS_I2C_MXC 44 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 45 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 46 #define CONFIG_SYS_I2C_SPEED 100000 47 48 /* PMIC only for 9X9 EVK */ 49 #define CONFIG_POWER 50 #define CONFIG_POWER_I2C 51 #define CONFIG_POWER_PFUZE3000 52 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 53 #endif 54 55 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 56 57 #define CONFIG_EXTRA_ENV_SETTINGS \ 58 "script=boot.scr\0" \ 59 "image=zImage\0" \ 60 "console=ttymxc0\0" \ 61 "fdt_high=0xffffffff\0" \ 62 "initrd_high=0xffffffff\0" \ 63 "fdt_file=undefined\0" \ 64 "fdt_addr=0x83000000\0" \ 65 "boot_fdt=try\0" \ 66 "ip_dyn=yes\0" \ 67 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ 68 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 69 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 70 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 71 "mmcautodetect=yes\0" \ 72 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 73 "root=${mmcroot}\0" \ 74 "loadbootscript=" \ 75 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 76 "bootscript=echo Running bootscript from mmc ...; " \ 77 "source\0" \ 78 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 79 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 80 "mmcboot=echo Booting from mmc ...; " \ 81 "run mmcargs; " \ 82 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 83 "if run loadfdt; then " \ 84 "bootz ${loadaddr} - ${fdt_addr}; " \ 85 "else " \ 86 "if test ${boot_fdt} = try; then " \ 87 "bootz; " \ 88 "else " \ 89 "echo WARN: Cannot load the DT; " \ 90 "fi; " \ 91 "fi; " \ 92 "else " \ 93 "bootz; " \ 94 "fi;\0" \ 95 "netargs=setenv bootargs console=${console},${baudrate} " \ 96 "root=/dev/nfs " \ 97 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 98 "netboot=echo Booting from net ...; " \ 99 "run netargs; " \ 100 "if test ${ip_dyn} = yes; then " \ 101 "setenv get_cmd dhcp; " \ 102 "else " \ 103 "setenv get_cmd tftp; " \ 104 "fi; " \ 105 "${get_cmd} ${image}; " \ 106 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 107 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 108 "bootz ${loadaddr} - ${fdt_addr}; " \ 109 "else " \ 110 "if test ${boot_fdt} = try; then " \ 111 "bootz; " \ 112 "else " \ 113 "echo WARN: Cannot load the DT; " \ 114 "fi; " \ 115 "fi; " \ 116 "else " \ 117 "bootz; " \ 118 "fi;\0" \ 119 "findfdt="\ 120 "if test $fdt_file = undefined; then " \ 121 "if test $board_name = EVK && test $board_rev = 9X9; then " \ 122 "setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \ 123 "if test $board_name = EVK && test $board_rev = 14X14; then " \ 124 "setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \ 125 "if test $fdt_file = undefined; then " \ 126 "echo WARNING: Could not determine dtb to use; fi; " \ 127 "fi;\0" \ 128 129 #define CONFIG_BOOTCOMMAND \ 130 "run findfdt;" \ 131 "mmc dev ${mmcdev};" \ 132 "mmc dev ${mmcdev}; if mmc rescan; then " \ 133 "if run loadbootscript; then " \ 134 "run bootscript; " \ 135 "else " \ 136 "if run loadimage; then " \ 137 "run mmcboot; " \ 138 "else run netboot; " \ 139 "fi; " \ 140 "fi; " \ 141 "else run netboot; fi" 142 143 /* Miscellaneous configurable options */ 144 #define CONFIG_SYS_MEMTEST_START 0x80000000 145 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) 146 147 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 148 #define CONFIG_SYS_HZ 1000 149 150 /* Physical Memory Map */ 151 #define CONFIG_NR_DRAM_BANKS 1 152 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 153 154 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 155 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 156 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 157 158 #define CONFIG_SYS_INIT_SP_OFFSET \ 159 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 160 #define CONFIG_SYS_INIT_SP_ADDR \ 161 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 162 163 /* environment organization */ 164 #define CONFIG_ENV_SIZE SZ_8K 165 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 166 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ 167 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 168 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ 169 170 #ifndef CONFIG_SYS_DCACHE_OFF 171 #endif 172 173 #ifdef CONFIG_FSL_QSPI 174 #define CONFIG_SF_DEFAULT_BUS 0 175 #define CONFIG_SF_DEFAULT_CS 0 176 #define CONFIG_SF_DEFAULT_SPEED 40000000 177 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 178 #define FSL_QSPI_FLASH_NUM 1 179 #define FSL_QSPI_FLASH_SIZE SZ_32M 180 #endif 181 182 /* USB Configs */ 183 #ifdef CONFIG_CMD_USB 184 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 185 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 186 #define CONFIG_MXC_USB_FLAGS 0 187 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 188 #endif 189 190 #ifdef CONFIG_CMD_NET 191 #define CONFIG_FEC_MXC 192 #define CONFIG_MII 193 #define CONFIG_FEC_ENET_DEV 1 194 195 #if (CONFIG_FEC_ENET_DEV == 0) 196 #define IMX_FEC_BASE ENET_BASE_ADDR 197 #define CONFIG_FEC_MXC_PHYADDR 0x2 198 #define CONFIG_FEC_XCV_TYPE RMII 199 #elif (CONFIG_FEC_ENET_DEV == 1) 200 #define IMX_FEC_BASE ENET2_BASE_ADDR 201 #define CONFIG_FEC_MXC_PHYADDR 0x1 202 #define CONFIG_FEC_XCV_TYPE RMII 203 #endif 204 #define CONFIG_ETHPRIME "FEC" 205 #endif 206 207 #define CONFIG_IMX_THERMAL 208 209 #ifndef CONFIG_SPL_BUILD 210 #ifdef CONFIG_VIDEO 211 #define CONFIG_VIDEO_MXS 212 #define CONFIG_VIDEO_LOGO 213 #define CONFIG_SPLASH_SCREEN 214 #define CONFIG_SPLASH_SCREEN_ALIGN 215 #define CONFIG_BMP_16BPP 216 #define CONFIG_VIDEO_BMP_RLE8 217 #define CONFIG_VIDEO_BMP_LOGO 218 #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR 219 #endif 220 #endif 221 222 #endif 223