1 /* 2 * Copyright 2013 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX6SL EVK board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include "mx6_common.h" 13 14 #define MACH_TYPE_MX6SLEVK 4307 15 #define CONFIG_MACH_TYPE MACH_TYPE_MX6SLEVK 16 17 /* Size of malloc() pool */ 18 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) 19 20 #define CONFIG_BOARD_EARLY_INIT_F 21 22 #define CONFIG_MXC_UART 23 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR 24 25 /* MMC Configs */ 26 #define CONFIG_FSL_ESDHC 27 #define CONFIG_FSL_USDHC 28 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 29 30 #define CONFIG_MMC 31 #define CONFIG_CMD_MMC 32 #define CONFIG_GENERIC_MMC 33 #define CONFIG_CMD_FAT 34 #define CONFIG_DOS_PARTITION 35 36 /* I2C Configs */ 37 #define CONFIG_CMD_I2C 38 #define CONFIG_SYS_I2C 39 #define CONFIG_SYS_I2C_MXC 40 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 41 #define CONFIG_SYS_I2C_SPEED 100000 42 43 /* PMIC */ 44 #define CONFIG_POWER 45 #define CONFIG_POWER_I2C 46 #define CONFIG_POWER_PFUZE100 47 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 48 49 #define CONFIG_CMD_PING 50 #define CONFIG_CMD_DHCP 51 #define CONFIG_CMD_MII 52 #define CONFIG_CMD_NET 53 #define CONFIG_FEC_MXC 54 #define CONFIG_MII 55 #define IMX_FEC_BASE ENET_BASE_ADDR 56 #define CONFIG_FEC_XCV_TYPE RMII 57 #define CONFIG_ETHPRIME "FEC" 58 #define CONFIG_FEC_MXC_PHYADDR 0 59 60 #define CONFIG_PHYLIB 61 #define CONFIG_PHY_SMSC 62 63 /* allow to overwrite serial and ethaddr */ 64 #define CONFIG_ENV_OVERWRITE 65 #define CONFIG_CONS_INDEX 1 66 #define CONFIG_BAUDRATE 115200 67 68 /* Command definition */ 69 70 #define CONFIG_BOOTDELAY 3 71 72 #define CONFIG_LOADADDR 0x82000000 73 #define CONFIG_SYS_TEXT_BASE 0x87800000 74 75 #define CONFIG_EXTRA_ENV_SETTINGS \ 76 "script=boot.scr\0" \ 77 "image=zImage\0" \ 78 "console=ttymxc0\0" \ 79 "fdt_high=0xffffffff\0" \ 80 "initrd_high=0xffffffff\0" \ 81 "fdt_file=imx6sl-evk.dtb\0" \ 82 "fdt_addr=0x88000000\0" \ 83 "boot_fdt=try\0" \ 84 "ip_dyn=yes\0" \ 85 "mmcdev=1\0" \ 86 "mmcpart=1\0" \ 87 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ 88 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 89 "root=${mmcroot}\0" \ 90 "loadbootscript=" \ 91 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 92 "bootscript=echo Running bootscript from mmc ...; " \ 93 "source\0" \ 94 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 95 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 96 "mmcboot=echo Booting from mmc ...; " \ 97 "run mmcargs; " \ 98 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 99 "if run loadfdt; then " \ 100 "bootz ${loadaddr} - ${fdt_addr}; " \ 101 "else " \ 102 "if test ${boot_fdt} = try; then " \ 103 "bootz; " \ 104 "else " \ 105 "echo WARN: Cannot load the DT; " \ 106 "fi; " \ 107 "fi; " \ 108 "else " \ 109 "bootz; " \ 110 "fi;\0" \ 111 "netargs=setenv bootargs console=${console},${baudrate} " \ 112 "root=/dev/nfs " \ 113 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 114 "netboot=echo Booting from net ...; " \ 115 "run netargs; " \ 116 "if test ${ip_dyn} = yes; then " \ 117 "setenv get_cmd dhcp; " \ 118 "else " \ 119 "setenv get_cmd tftp; " \ 120 "fi; " \ 121 "${get_cmd} ${image}; " \ 122 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 123 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 124 "bootz ${loadaddr} - ${fdt_addr}; " \ 125 "else " \ 126 "if test ${boot_fdt} = try; then " \ 127 "bootz; " \ 128 "else " \ 129 "echo WARN: Cannot load the DT; " \ 130 "fi; " \ 131 "fi; " \ 132 "else " \ 133 "bootz; " \ 134 "fi;\0" 135 136 #define CONFIG_BOOTCOMMAND \ 137 "mmc dev ${mmcdev};" \ 138 "mmc dev ${mmcdev}; if mmc rescan; then " \ 139 "if run loadbootscript; then " \ 140 "run bootscript; " \ 141 "else " \ 142 "if run loadimage; then " \ 143 "run mmcboot; " \ 144 "else run netboot; " \ 145 "fi; " \ 146 "fi; " \ 147 "else run netboot; fi" 148 149 /* Miscellaneous configurable options */ 150 #define CONFIG_SYS_LONGHELP 151 #define CONFIG_SYS_HUSH_PARSER 152 #define CONFIG_AUTO_COMPLETE 153 #define CONFIG_SYS_CBSIZE 256 154 155 #define CONFIG_SYS_MAXARGS 16 156 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 157 158 #define CONFIG_SYS_MEMTEST_START 0x80000000 159 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M) 160 161 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 162 163 #define CONFIG_CMDLINE_EDITING 164 #define CONFIG_STACKSIZE SZ_128K 165 166 /* Physical Memory Map */ 167 #define CONFIG_NR_DRAM_BANKS 1 168 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 169 #define PHYS_SDRAM_SIZE SZ_1G 170 171 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 172 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 173 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 174 175 #define CONFIG_SYS_INIT_SP_OFFSET \ 176 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 177 #define CONFIG_SYS_INIT_SP_ADDR \ 178 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 179 180 /* Environment organization */ 181 #define CONFIG_ENV_SIZE SZ_8K 182 183 #if defined CONFIG_SYS_BOOT_SPINOR 184 #define CONFIG_ENV_IS_IN_SPI_FLASH 185 #define CONFIG_ENV_OFFSET (768 * 1024) 186 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 187 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 188 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 189 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 190 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 191 #else 192 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 193 #define CONFIG_ENV_IS_IN_MMC 194 #endif 195 196 #define CONFIG_OF_LIBFDT 197 #define CONFIG_CMD_BOOTZ 198 199 #ifndef CONFIG_SYS_DCACHE_OFF 200 #define CONFIG_CMD_CACHE 201 #endif 202 203 #define CONFIG_CMD_SF 204 #ifdef CONFIG_CMD_SF 205 #define CONFIG_SPI_FLASH 206 #define CONFIG_SPI_FLASH_STMICRO 207 #define CONFIG_MXC_SPI 208 #define CONFIG_SF_DEFAULT_BUS 0 209 #define CONFIG_SF_DEFAULT_CS 0 210 #define CONFIG_SF_DEFAULT_SPEED 20000000 211 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 212 #endif 213 214 /* USB Configs */ 215 #define CONFIG_CMD_USB 216 #ifdef CONFIG_CMD_USB 217 #define CONFIG_USB_EHCI 218 #define CONFIG_USB_EHCI_MX6 219 #define CONFIG_USB_STORAGE 220 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 221 #define CONFIG_USB_HOST_ETHER 222 #define CONFIG_USB_ETHER_ASIX 223 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 224 #define CONFIG_MXC_USB_FLAGS 0 225 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 226 #endif 227 228 #define CONFIG_SYS_FSL_USDHC_NUM 3 229 #if defined(CONFIG_ENV_IS_IN_MMC) 230 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC2*/ 231 #endif 232 233 #define CONFIG_IMX6_THERMAL 234 235 #define CONFIG_CMD_FUSE 236 #if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL) 237 #define CONFIG_MXC_OCOTP 238 #endif 239 240 #endif /* __CONFIG_H */ 241