1 /* 2 * (C) Copyright 2010, Stefano Babic <sbabic@denx.de> 3 * 4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 5 * 6 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 7 * 8 * Configuration for the MX35pdk Freescale board. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 #include <asm/arch/imx-regs.h> 17 18 /* High Level Configuration Options */ 19 #define CONFIG_MX35 20 21 #define CONFIG_SYS_FSL_CLK 22 23 /* Set TEXT at the beginning of the NOR flash */ 24 #define CONFIG_SYS_TEXT_BASE 0xA0000000 25 26 #define CONFIG_BOARD_EARLY_INIT_F 27 28 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 29 #define CONFIG_REVISION_TAG 30 #define CONFIG_SETUP_MEMORY_TAGS 31 #define CONFIG_INITRD_TAG 32 33 /* 34 * Size of malloc() pool 35 */ 36 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) 37 38 /* 39 * Hardware drivers 40 */ 41 #define CONFIG_SYS_I2C 42 #define CONFIG_SYS_I2C_MXC 43 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 44 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 45 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 46 #define CONFIG_MXC_SPI 47 #define CONFIG_MXC_GPIO 48 49 /* 50 * PMIC Configs 51 */ 52 #define CONFIG_POWER 53 #define CONFIG_POWER_I2C 54 #define CONFIG_POWER_FSL 55 #define CONFIG_POWER_FSL_MC13892 56 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08 57 #define CONFIG_RTC_MC13XXX 58 59 /* 60 * MFD MC9SDZ60 61 */ 62 #define CONFIG_FSL_MC9SDZ60 63 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69 64 65 /* 66 * UART (console) 67 */ 68 #define CONFIG_MXC_UART 69 #define CONFIG_MXC_UART_BASE UART1_BASE 70 71 /* allow to overwrite serial and ethaddr */ 72 #define CONFIG_ENV_OVERWRITE 73 #define CONFIG_CONS_INDEX 1 74 #define CONFIG_BAUDRATE 115200 75 76 /* 77 * Command definition 78 */ 79 #define CONFIG_BOOTP_SUBNETMASK 80 #define CONFIG_BOOTP_GATEWAY 81 #define CONFIG_BOOTP_DNS 82 83 #define CONFIG_CMD_NAND 84 85 #define CONFIG_NET_RETRY_COUNT 100 86 #define CONFIG_CMD_DATE 87 88 #define CONFIG_DOS_PARTITION 89 #define CONFIG_EFI_PARTITION 90 91 92 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 93 94 /* 95 * Ethernet on the debug board (SMC911) 96 */ 97 #define CONFIG_SMC911X 98 #define CONFIG_SMC911X_16_BIT 1 99 #define CONFIG_SMC911X_BASE CS5_BASE_ADDR 100 101 #define CONFIG_HAS_ETH1 102 #define CONFIG_ETHPRIME 103 104 /* 105 * Ethernet on SOC (FEC) 106 */ 107 #define CONFIG_FEC_MXC 108 #define IMX_FEC_BASE FEC_BASE_ADDR 109 #define CONFIG_FEC_MXC_PHYADDR 0x1F 110 111 #define CONFIG_MII 112 113 #define CONFIG_ARP_TIMEOUT 200UL 114 115 /* 116 * Miscellaneous configurable options 117 */ 118 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 119 #define CONFIG_CMDLINE_EDITING 120 121 #define CONFIG_AUTO_COMPLETE 122 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 123 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 124 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 125 126 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 127 #define CONFIG_SYS_MEMTEST_END 0x10000 128 129 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 130 131 /* 132 * Physical Memory Map 133 */ 134 #define CONFIG_NR_DRAM_BANKS 2 135 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 136 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 137 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 138 #define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024) 139 140 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR 141 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000) 142 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2) 143 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 144 GENERATED_GBL_DATA_SIZE) 145 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 146 CONFIG_SYS_GBL_DATA_OFFSET) 147 148 /* 149 * MTD Command for mtdparts 150 */ 151 #define CONFIG_CMD_MTDPARTS 152 #define CONFIG_MTD_DEVICE 153 #define CONFIG_FLASH_CFI_MTD 154 #define CONFIG_MTD_PARTITIONS 155 #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0" 156 #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:1m(boot),5m(linux)," \ 157 "96m(root),8m(cfg),1938m(user);" \ 158 "physmap-flash.0:512k(b),4m(k),30m(u),28m(r)" 159 160 /* 161 * FLASH and environment organization 162 */ 163 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR 164 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 165 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 166 /* Monitor at beginning of flash */ 167 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 168 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 169 170 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 171 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 172 173 /* Address and size of Redundant Environment Sector */ 174 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 175 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 176 177 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ 178 CONFIG_SYS_MONITOR_LEN) 179 180 #define CONFIG_ENV_IS_IN_FLASH 181 182 #if defined(CONFIG_FSL_ENV_IN_NAND) 183 #define CONFIG_ENV_IS_IN_NAND 184 #define CONFIG_ENV_OFFSET (1024 * 1024) 185 #endif 186 187 /* 188 * CFI FLASH driver setup 189 */ 190 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 191 #define CONFIG_FLASH_CFI_DRIVER 192 193 /* A non-standard buffered write algorithm */ 194 #define CONFIG_FLASH_SPANSION_S29WS_N 195 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ 196 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 197 198 /* 199 * NAND FLASH driver setup 200 */ 201 #define CONFIG_NAND_MXC 202 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR) 203 #define CONFIG_SYS_MAX_NAND_DEVICE 1 204 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR) 205 #define CONFIG_MXC_NAND_HWECC 206 #define CONFIG_SYS_NAND_LARGEPAGE 207 208 /* EHCI driver */ 209 #define CONFIG_USB_EHCI 210 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 211 #define CONFIG_EHCI_IS_TDI 212 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 213 #define CONFIG_USB_EHCI_MXC 214 #define CONFIG_MXC_USB_PORT 0 215 #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \ 216 MXC_EHCI_POWER_PINS_ENABLED | \ 217 MXC_EHCI_OC_PIN_ACTIVE_LOW) 218 #define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI) 219 220 /* mmc driver */ 221 #define CONFIG_GENERIC_MMC 222 #define CONFIG_FSL_ESDHC 223 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 224 #define CONFIG_SYS_FSL_ESDHC_NUM 1 225 226 /* 227 * Default environment and default scripts 228 * to update uboot and load kernel 229 */ 230 231 #define CONFIG_HOSTNAME "mx35pdk" 232 #define CONFIG_EXTRA_ENV_SETTINGS \ 233 "netdev=eth1\0" \ 234 "ethprime=smc911x\0" \ 235 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 236 "nfsroot=${serverip}:${rootpath}\0" \ 237 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 238 "addip_sta=setenv bootargs ${bootargs} " \ 239 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 240 ":${hostname}:${netdev}:off panic=1\0" \ 241 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 242 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 243 "else run addip_sta;fi\0" \ 244 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 245 "addtty=setenv bootargs ${bootargs}" \ 246 " console=ttymxc0,${baudrate}\0" \ 247 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 248 "loadaddr=80800000\0" \ 249 "kernel_addr_r=80800000\0" \ 250 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 251 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 252 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \ 253 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 254 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 255 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 256 "bootm ${kernel_addr}\0" \ 257 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 258 "run nfsargs addip addtty addmtd addmisc;" \ 259 "bootm ${kernel_addr_r}\0" \ 260 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ 261 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ 262 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ 263 "load=tftp ${loadaddr} ${u-boot}\0" \ 264 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ 265 "update=protect off ${uboot_addr} +80000;" \ 266 "erase ${uboot_addr} +80000;" \ 267 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ 268 "upd=if run load;then echo Updating u-boot;if run update;" \ 269 "then echo U-Boot updated;" \ 270 "else echo Error updating u-boot !;" \ 271 "echo Board without bootloader !!;" \ 272 "fi;" \ 273 "else echo U-Boot not downloaded..exiting;fi\0" \ 274 "bootcmd=run net_nfs\0" 275 276 #endif /* __CONFIG_H */ 277