xref: /openbmc/u-boot/include/configs/ms7722se.h (revision 6d0f6bcf337c5261c08fabe12982178c2c489d76)
16c0bbdccSNobuhiro Iwamatsu /*
26c0bbdccSNobuhiro Iwamatsu  * Configuation settings for the Hitachi Solution Engine 7722
36c0bbdccSNobuhiro Iwamatsu  *
46c0bbdccSNobuhiro Iwamatsu  * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
56c0bbdccSNobuhiro Iwamatsu  *
66c0bbdccSNobuhiro Iwamatsu  * See file CREDITS for list of people who contributed to this
76c0bbdccSNobuhiro Iwamatsu  * project.
86c0bbdccSNobuhiro Iwamatsu  *
96c0bbdccSNobuhiro Iwamatsu  * This program is free software; you can redistribute it and/or
106c0bbdccSNobuhiro Iwamatsu  * modify it under the terms of the GNU General Public License as
116c0bbdccSNobuhiro Iwamatsu  * published by the Free Software Foundation; either version 2 of
126c0bbdccSNobuhiro Iwamatsu  * the License, or (at your option) any later version.
136c0bbdccSNobuhiro Iwamatsu  *
146c0bbdccSNobuhiro Iwamatsu  * This program is distributed in the hope that it will be useful,
156c0bbdccSNobuhiro Iwamatsu  * but WITHOUT ANY WARRANTY; without even the implied warranty of
166c0bbdccSNobuhiro Iwamatsu  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
176c0bbdccSNobuhiro Iwamatsu  * GNU General Public License for more details.
186c0bbdccSNobuhiro Iwamatsu  *
196c0bbdccSNobuhiro Iwamatsu  * You should have received a copy of the GNU General Public License
206c0bbdccSNobuhiro Iwamatsu  * along with this program; if not, write to the Free Software
216c0bbdccSNobuhiro Iwamatsu  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
226c0bbdccSNobuhiro Iwamatsu  * MA 02111-1307 USA
236c0bbdccSNobuhiro Iwamatsu  */
246c0bbdccSNobuhiro Iwamatsu 
256c0bbdccSNobuhiro Iwamatsu #ifndef __MS7722SE_H
266c0bbdccSNobuhiro Iwamatsu #define __MS7722SE_H
276c0bbdccSNobuhiro Iwamatsu 
286c0bbdccSNobuhiro Iwamatsu #define CONFIG_SH		1
296c0bbdccSNobuhiro Iwamatsu #define CONFIG_SH4		1
306c0bbdccSNobuhiro Iwamatsu #define CONFIG_CPU_SH7722	1
316c0bbdccSNobuhiro Iwamatsu #define CONFIG_MS7722SE		1
326c0bbdccSNobuhiro Iwamatsu 
336c0bbdccSNobuhiro Iwamatsu #define CONFIG_CMD_FLASH
346c0bbdccSNobuhiro Iwamatsu #define CONFIG_CMD_NET
356c0bbdccSNobuhiro Iwamatsu #define CONFIG_CMD_PING
366c0bbdccSNobuhiro Iwamatsu #define CONFIG_CMD_DFL
376c0bbdccSNobuhiro Iwamatsu #define CONFIG_CMD_SDRAM
386c0bbdccSNobuhiro Iwamatsu #define CONFIG_CMD_ENV
396c0bbdccSNobuhiro Iwamatsu 
406c0bbdccSNobuhiro Iwamatsu #define CONFIG_BAUDRATE		115200
416c0bbdccSNobuhiro Iwamatsu #define CONFIG_BOOTDELAY	3
426c0bbdccSNobuhiro Iwamatsu #define CONFIG_BOOTARGS		"console=ttySC0,115200 root=1f01"
436c0bbdccSNobuhiro Iwamatsu 
446c0bbdccSNobuhiro Iwamatsu #define CONFIG_VERSION_VARIABLE
456c0bbdccSNobuhiro Iwamatsu #undef  CONFIG_SHOW_BOOT_PROGRESS
466c0bbdccSNobuhiro Iwamatsu 
476c0bbdccSNobuhiro Iwamatsu /* SMC9111 */
486c0bbdccSNobuhiro Iwamatsu #define CONFIG_DRIVER_SMC91111
496c0bbdccSNobuhiro Iwamatsu #define CONFIG_SMC91111_BASE    (0xB8000000)
506c0bbdccSNobuhiro Iwamatsu 
516c0bbdccSNobuhiro Iwamatsu /* MEMORY */
526c0bbdccSNobuhiro Iwamatsu #define MS7722SE_SDRAM_BASE	(0x8C000000)
536c0bbdccSNobuhiro Iwamatsu #define MS7722SE_FLASH_BASE_1	(0xA0000000)
546c0bbdccSNobuhiro Iwamatsu #define MS7722SE_FLASH_BANK_SIZE	(8*1024 * 1024)
556c0bbdccSNobuhiro Iwamatsu 
56*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP				/* undef to save memory	*/
57*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT		"=> "		/* Monitor Command Prompt */
58*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE		256		/* Buffer size for input from the Console */
59*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE		256		/* Buffer size for Console output */
60*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS		16		/* max args accepted for monitor commands */
61*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BARGSIZE		512		/* Buffer size for Boot Arguments passed to kernel */
62*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }	/* List of legal baudrate settings for this board */
636c0bbdccSNobuhiro Iwamatsu 
646c0bbdccSNobuhiro Iwamatsu /* SCIF */
656c58a030SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SCIF_CONSOLE	1
666c0bbdccSNobuhiro Iwamatsu #define CONFIG_CONS_SCIF0	1
67*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_CONSOLE_INFO_QUIET			/* Suppress display of console information at boot */
68*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
69*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_CONSOLE_ENV_OVERWRITE
706c0bbdccSNobuhiro Iwamatsu 
71*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START	(MS7722SE_SDRAM_BASE)
72*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
736c0bbdccSNobuhiro Iwamatsu 
74*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_ALT_MEMTEST		/* Enable alternate, more extensive, memory test */
75*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_MEMTEST_SCRATCH	/* Scratch address used by the alternate memory test */
766c0bbdccSNobuhiro Iwamatsu 
77*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_LOADS_BAUD_CHANGE	/* Enable temporary baudrate change while serial download */
786c0bbdccSNobuhiro Iwamatsu 
79*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_BASE	(MS7722SE_SDRAM_BASE)
80*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_SIZE	(64 * 1024 * 1024)	/* maybe more, but if so u-boot doesn't know about it... */
816c0bbdccSNobuhiro Iwamatsu 
82*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)	/* default load address for scripts ?!? */
836c0bbdccSNobuhiro Iwamatsu 
84*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE	(MS7722SE_FLASH_BASE_1)	/* Address of u-boot image
856c0bbdccSNobuhiro Iwamatsu 							in Flash (NOT run time address in SDRAM) ?!? */
86*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_LEN	(128 * 1024)		/* */
87*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN	(256 * 1024)		/* Size of DRAM reserved for malloc() use */
88*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_GBL_DATA_SIZE	(256)		/* size in bytes reserved for initial data */
89*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
906c0bbdccSNobuhiro Iwamatsu 
916c0bbdccSNobuhiro Iwamatsu /* FLASH */
92*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_CFI
9300b1883aSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_FLASH_CFI_DRIVER
94*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_FLASH_QUIET_TEST
95*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_EMPTY_INFO			/* print 'E' for empty sector on flinfo */
966c0bbdccSNobuhiro Iwamatsu 
97*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_BASE		(MS7722SE_FLASH_BASE_1)	/* Physical start address of Flash memory */
986c0bbdccSNobuhiro Iwamatsu 
99*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_SECT	150		/* Max number of sectors on each
1006c0bbdccSNobuhiro Iwamatsu 							Flash chip */
1016c0bbdccSNobuhiro Iwamatsu 
1026c0bbdccSNobuhiro Iwamatsu /* if you use all NOR Flash , you change dip-switch. Please see MS7722SE01 Manual. */
103*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_BANKS	2
104*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE + (0 * MS7722SE_FLASH_BANK_SIZE), \
105*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD 				  CONFIG_SYS_FLASH_BASE + (1 * MS7722SE_FLASH_BANK_SIZE), \
1066c0bbdccSNobuhiro Iwamatsu 				}
1076c0bbdccSNobuhiro Iwamatsu 
108*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)	/* Timeout for Flash erase operations (in ms) */
109*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)	/* Timeout for Flash write operations (in ms) */
110*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_LOCK_TOUT	(3 * 1000)	/* Timeout for Flash set sector lock bit operations (in ms) */
111*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)	/* Timeout for Flash clear lock bit operations (in ms) */
1126c0bbdccSNobuhiro Iwamatsu 
113*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_FLASH_PROTECTION			/* Use hardware flash sectors protection instead of U-Boot software protection */
1146c0bbdccSNobuhiro Iwamatsu 
115*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_DIRECT_FLASH_TFTP
1166c0bbdccSNobuhiro Iwamatsu 
1175a1aceb0SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_FLASH
1186c0bbdccSNobuhiro Iwamatsu #define CONFIG_ENV_OVERWRITE	1
1190e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SECT_SIZE	(8 * 1024)
1200e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
121*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
122*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET		(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)	/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
1230e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
124*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR_REDUND	(CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
1256c0bbdccSNobuhiro Iwamatsu 
1266c0bbdccSNobuhiro Iwamatsu /* Board Clock */
1276c0bbdccSNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ	33333333
1286c0bbdccSNobuhiro Iwamatsu #define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
129*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ			(CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
1306c0bbdccSNobuhiro Iwamatsu 
1316c0bbdccSNobuhiro Iwamatsu #endif	/* __MS7722SE_H */
132