xref: /openbmc/u-boot/include/configs/ms7722se.h (revision 684a501e8e94115b591bfb3c8f047ccaada4ac26)
16c0bbdccSNobuhiro Iwamatsu /*
26c0bbdccSNobuhiro Iwamatsu  * Configuation settings for the Hitachi Solution Engine 7722
36c0bbdccSNobuhiro Iwamatsu  *
46c0bbdccSNobuhiro Iwamatsu  * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
56c0bbdccSNobuhiro Iwamatsu  *
61a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
76c0bbdccSNobuhiro Iwamatsu  */
86c0bbdccSNobuhiro Iwamatsu 
96c0bbdccSNobuhiro Iwamatsu #ifndef __MS7722SE_H
106c0bbdccSNobuhiro Iwamatsu #define __MS7722SE_H
116c0bbdccSNobuhiro Iwamatsu 
126c0bbdccSNobuhiro Iwamatsu #define CONFIG_SH		1
136c0bbdccSNobuhiro Iwamatsu #define CONFIG_SH4		1
146c0bbdccSNobuhiro Iwamatsu #define CONFIG_CPU_SH7722	1
156c0bbdccSNobuhiro Iwamatsu #define CONFIG_MS7722SE		1
166c0bbdccSNobuhiro Iwamatsu 
176c0bbdccSNobuhiro Iwamatsu #define CONFIG_CMD_FLASH
185783758fSNobuhiro Iwamatsu #define CONFIG_CMD_JFFS2
196c0bbdccSNobuhiro Iwamatsu #define CONFIG_CMD_NET
205783758fSNobuhiro Iwamatsu #define CONFIG_CMD_NFS
216c0bbdccSNobuhiro Iwamatsu #define CONFIG_CMD_PING
226c0bbdccSNobuhiro Iwamatsu #define CONFIG_CMD_SDRAM
235783758fSNobuhiro Iwamatsu #define CONFIG_CMD_MEMORY
24bdab39d3SMike Frysinger #define CONFIG_CMD_SAVEENV
256c0bbdccSNobuhiro Iwamatsu 
266c0bbdccSNobuhiro Iwamatsu #define CONFIG_BAUDRATE		115200
276c0bbdccSNobuhiro Iwamatsu #define CONFIG_BOOTDELAY	3
286c0bbdccSNobuhiro Iwamatsu #define CONFIG_BOOTARGS		"console=ttySC0,115200 root=1f01"
296c0bbdccSNobuhiro Iwamatsu 
306c0bbdccSNobuhiro Iwamatsu #define CONFIG_VERSION_VARIABLE
316c0bbdccSNobuhiro Iwamatsu #undef  CONFIG_SHOW_BOOT_PROGRESS
326c0bbdccSNobuhiro Iwamatsu 
336c0bbdccSNobuhiro Iwamatsu /* SMC9111 */
347194ab80SBen Warren #define CONFIG_SMC91111
356c0bbdccSNobuhiro Iwamatsu #define CONFIG_SMC91111_BASE    (0xB8000000)
366c0bbdccSNobuhiro Iwamatsu 
376c0bbdccSNobuhiro Iwamatsu /* MEMORY */
386c0bbdccSNobuhiro Iwamatsu #define MS7722SE_SDRAM_BASE	(0x8C000000)
396c0bbdccSNobuhiro Iwamatsu #define MS7722SE_FLASH_BASE_1	(0xA0000000)
406c0bbdccSNobuhiro Iwamatsu #define MS7722SE_FLASH_BANK_SIZE	(8*1024 * 1024)
416c0bbdccSNobuhiro Iwamatsu 
425c1877d6SNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE	0x8FFC0000
436d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP				/* undef to save memory	*/
446d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT		"=> "		/* Monitor Command Prompt */
456d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE		256		/* Buffer size for input from the Console */
466d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE		256		/* Buffer size for Console output */
476d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS		16		/* max args accepted for monitor commands */
486d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BARGSIZE		512		/* Buffer size for Boot Arguments passed to kernel */
496d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }	/* List of legal baudrate settings for this board */
506c0bbdccSNobuhiro Iwamatsu 
516c0bbdccSNobuhiro Iwamatsu /* SCIF */
526c58a030SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SCIF_CONSOLE	1
536c0bbdccSNobuhiro Iwamatsu #define CONFIG_CONS_SCIF0	1
546d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_CONSOLE_INFO_QUIET			/* Suppress display of console information at boot */
556d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
566d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_CONSOLE_ENV_OVERWRITE
576c0bbdccSNobuhiro Iwamatsu 
586d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START	(MS7722SE_SDRAM_BASE)
596d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
606c0bbdccSNobuhiro Iwamatsu 
616d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_ALT_MEMTEST		/* Enable alternate, more extensive, memory test */
626d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_MEMTEST_SCRATCH	/* Scratch address used by the alternate memory test */
636c0bbdccSNobuhiro Iwamatsu 
646d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_LOADS_BAUD_CHANGE	/* Enable temporary baudrate change while serial download */
656c0bbdccSNobuhiro Iwamatsu 
666d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_BASE	(MS7722SE_SDRAM_BASE)
676d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_SIZE	(64 * 1024 * 1024)	/* maybe more, but if so u-boot doesn't know about it... */
686c0bbdccSNobuhiro Iwamatsu 
696d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)	/* default load address for scripts ?!? */
706c0bbdccSNobuhiro Iwamatsu 
716d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE	(MS7722SE_FLASH_BASE_1)	/* Address of u-boot image
726c0bbdccSNobuhiro Iwamatsu 							in Flash (NOT run time address in SDRAM) ?!? */
736d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_LEN	(128 * 1024)		/* */
746d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN	(256 * 1024)		/* Size of DRAM reserved for malloc() use */
756d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
766c0bbdccSNobuhiro Iwamatsu 
776c0bbdccSNobuhiro Iwamatsu /* FLASH */
786d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_CFI
7900b1883aSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_FLASH_CFI_DRIVER
806d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_FLASH_QUIET_TEST
816d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_EMPTY_INFO			/* print 'E' for empty sector on flinfo */
826c0bbdccSNobuhiro Iwamatsu 
836d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_BASE		(MS7722SE_FLASH_BASE_1)	/* Physical start address of Flash memory */
846c0bbdccSNobuhiro Iwamatsu 
856d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_SECT	150		/* Max number of sectors on each
866c0bbdccSNobuhiro Iwamatsu 							Flash chip */
876c0bbdccSNobuhiro Iwamatsu 
886c0bbdccSNobuhiro Iwamatsu /* if you use all NOR Flash , you change dip-switch. Please see MS7722SE01 Manual. */
896d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_BANKS	2
906d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE + (0 * MS7722SE_FLASH_BANK_SIZE), \
916d0f6bcfSJean-Christophe PLAGNIOL-VILLARD 				  CONFIG_SYS_FLASH_BASE + (1 * MS7722SE_FLASH_BANK_SIZE), \
926c0bbdccSNobuhiro Iwamatsu 				}
936c0bbdccSNobuhiro Iwamatsu 
946d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)	/* Timeout for Flash erase operations (in ms) */
956d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)	/* Timeout for Flash write operations (in ms) */
966d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_LOCK_TOUT	(3 * 1000)	/* Timeout for Flash set sector lock bit operations (in ms) */
976d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)	/* Timeout for Flash clear lock bit operations (in ms) */
986c0bbdccSNobuhiro Iwamatsu 
996d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_FLASH_PROTECTION			/* Use hardware flash sectors protection instead of U-Boot software protection */
1006c0bbdccSNobuhiro Iwamatsu 
1016d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_DIRECT_FLASH_TFTP
1026c0bbdccSNobuhiro Iwamatsu 
1035a1aceb0SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_FLASH
1046c0bbdccSNobuhiro Iwamatsu #define CONFIG_ENV_OVERWRITE	1
1050e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SECT_SIZE	(8 * 1024)
1060e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
1076d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
1086d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET		(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)	/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
1090e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
1106d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR_REDUND	(CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
1116c0bbdccSNobuhiro Iwamatsu 
1126c0bbdccSNobuhiro Iwamatsu /* Board Clock */
1136c0bbdccSNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ	33333333
114*684a501eSNobuhiro Iwamatsu #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
115*684a501eSNobuhiro Iwamatsu #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
116be45c632SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_TMU_CLK_DIV		(4)	/* 4 (default), 16, 64, 256 or 1024 */
1178dd29c87SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ		1000
1186c0bbdccSNobuhiro Iwamatsu 
1196c0bbdccSNobuhiro Iwamatsu #endif	/* __MS7722SE_H */
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