xref: /openbmc/u-boot/include/configs/koelsch.h (revision 3146f0c017df2231d03dff09cee31f7bd63db3e5)
1 /*
2  * include/configs/koelsch.h
3  *
4  * Copyright (C) 2013 Renesas Electronics Corporation
5  *
6  * SPDX-License-Identifier: GPL-2.0
7  */
8 
9 #ifndef __KOELSCH_H
10 #define __KOELSCH_H
11 
12 #undef DEBUG
13 #define CONFIG_R8A7791
14 #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Koelsch"
15 
16 #include "rcar-gen2-common.h"
17 
18 #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
19 #define CONFIG_SYS_TEXT_BASE	0x70000000
20 #else
21 #define CONFIG_SYS_TEXT_BASE	0xE6304000
22 #endif
23 
24 /* STACK */
25 #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
26 #define CONFIG_SYS_INIT_SP_ADDR		0x7003FFFC
27 #else
28 #define CONFIG_SYS_INIT_SP_ADDR		0xE633fffC
29 #endif
30 
31 #define STACK_AREA_SIZE			0xC000
32 #define LOW_LEVEL_MERAM_STACK	\
33 		(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
34 
35 /* MEMORY */
36 #define RCAR_GEN2_SDRAM_BASE		0x40000000
37 #define RCAR_GEN2_SDRAM_SIZE		(2048u * 1024 * 1024)
38 #define RCAR_GEN2_UBOOT_SDRAM_SIZE	(512 * 1024 * 1024)
39 
40 /* SCIF */
41 
42 /* FLASH */
43 #define CONFIG_SPI
44 #define CONFIG_SH_QSPI
45 
46 /* SH Ether */
47 #define CONFIG_SH_ETHER
48 #define CONFIG_SH_ETHER_USE_PORT	0
49 #define CONFIG_SH_ETHER_PHY_ADDR	0x1
50 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
51 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
52 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
53 #define CONFIG_PHY_MICREL
54 #define CONFIG_BITBANGMII
55 #define CONFIG_BITBANGMII_MULTI
56 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64
57 
58 /* Board Clock */
59 #define RMOBILE_XTAL_CLK	20000000u
60 #define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
61 #define CONFIG_SH_TMU_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2)
62 #define CONFIG_SYS_TMU_CLK_DIV	4
63 
64 /* i2c */
65 #define CONFIG_SYS_I2C
66 #define CONFIG_SYS_I2C_SH
67 #define CONFIG_SYS_I2C_SLAVE	0x7F
68 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	3
69 #define CONFIG_SYS_I2C_SH_SPEED0	400000
70 #define CONFIG_SYS_I2C_SH_SPEED1	400000
71 #define CONFIG_SYS_I2C_SH_SPEED2	400000
72 #define CONFIG_SH_I2C_DATA_HIGH	4
73 #define CONFIG_SH_I2C_DATA_LOW	5
74 #define CONFIG_SH_I2C_CLOCK	10000000
75 
76 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
77 
78 /* USB */
79 #define CONFIG_USB_EHCI_RMOBILE
80 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
81 
82 /* Module stop status bits */
83 /* INTC-RT */
84 #define CONFIG_SMSTP0_ENA	0x00400000
85 /* MSIF*/
86 #define CONFIG_SMSTP2_ENA	0x00002000
87 /* INTC-SYS, IRQC */
88 #define CONFIG_SMSTP4_ENA	0x00000180
89 /* SCIF0 */
90 #define CONFIG_SMSTP7_ENA	0x00200000
91 
92 /* SD */
93 #define CONFIG_SH_SDHI_FREQ	97500000
94 
95 #endif	/* __KOELSCH_H */
96