xref: /openbmc/u-boot/include/configs/km/km_arm.h (revision 00f792e0df9ae942427e44595a0f4379582accee)
1 /*
2  * (C) Copyright 2009
3  * Marvell Semiconductor <www.marvell.com>
4  * Prafulla Wadaskar <prafulla@marvell.com>
5  *
6  * (C) Copyright 2009
7  * Stefan Roese, DENX Software Engineering, sr@denx.de.
8  *
9  * (C) Copyright 2010-2011
10  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
11  *
12  * See file CREDITS for list of people who contributed to this
13  * project.
14  *
15  * This program is free software; you can redistribute it and/or
16  * modify it under the terms of the GNU General Public License as
17  * published by the Free Software Foundation; either version 2 of
18  * the License, or (at your option) any later version.
19  *
20  * This program is distributed in the hope that it will be useful,
21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
23  * GNU General Public License for more details.
24  *
25  * You should have received a copy of the GNU General Public License
26  * along with this program; if not, write to the Free Software
27  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
28  * MA 02110-1301 USA
29  */
30 
31 /*
32  * for linking errors see
33  * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
34  */
35 
36 #ifndef _CONFIG_KM_ARM_H
37 #define _CONFIG_KM_ARM_H
38 
39 /* We got removed from Linux mach-types.h */
40 #define MACH_TYPE_KM_KIRKWOOD          2255
41 
42 /*
43  * High Level Configuration Options (easy to change)
44  */
45 #define CONFIG_MARVELL
46 #define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
47 #define CONFIG_KIRKWOOD			/* SOC Family Name */
48 #define CONFIG_KW88F6281		/* SOC Name */
49 #define CONFIG_MACH_KM_KIRKWOOD		/* Machine type */
50 
51 #define CONFIG_MACH_TYPE	MACH_TYPE_KM_KIRKWOOD
52 
53 #define CONFIG_NAND_ECC_BCH
54 #define CONFIG_BCH
55 
56 /* include common defines/options for all Keymile boards */
57 #include "keymile-common.h"
58 
59 #define CONFIG_CMD_NAND
60 #define CONFIG_CMD_SF
61 
62 /* SPI NOR Flash default params, used by sf commands */
63 #define CONFIG_SF_DEFAULT_SPEED		8100000
64 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
65 
66 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
67 #define CONFIG_ENV_SPI_BUS		0
68 #define CONFIG_ENV_SPI_CS		0
69 #define CONFIG_ENV_SPI_MAX_HZ		8100000
70 #define CONFIG_ENV_SPI_MODE		SPI_MODE_3
71 #endif
72 
73 #include "asm/arch/config.h"
74 
75 #define CONFIG_SYS_TEXT_BASE	0x07d00000	/* code address before reloc */
76 #define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
77 #define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
78 #define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
79 
80 /* pseudo-non volatile RAM [hex] */
81 #define CONFIG_KM_PNVRAM	0x80000
82 /* physical RAM MTD size [hex] */
83 #define CONFIG_KM_PHRAM		0x17F000
84 
85 #define CONFIG_KM_CRAMFS_ADDR	0x2400000
86 #define CONFIG_KM_KERNEL_ADDR	0x2000000	/* 4096KBytes */
87 
88 /* architecture specific default bootargs */
89 #define CONFIG_KM_DEF_BOOT_ARGS_CPU					\
90 		"bootcountaddr=${bootcountaddr} ${mtdparts}"		\
91 		" boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}"
92 
93 #define CONFIG_KM_DEF_ENV_CPU						\
94 	"boot=bootm ${load_addr_r} - -\0"				\
95 	"cramfsloadfdt=true\0"						\
96 	"u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0"		\
97 	CONFIG_KM_UPDATE_UBOOT						\
98 	""
99 
100 #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
101 #define CONFIG_MISC_INIT_R
102 
103 /*
104  * NS16550 Configuration
105  */
106 #define CONFIG_SYS_NS16550
107 #define CONFIG_SYS_NS16550_SERIAL
108 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
109 #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
110 #define CONFIG_SYS_NS16550_COM1		KW_UART0_BASE
111 #define CONFIG_SYS_NS16550_COM2		KW_UART1_BASE
112 
113 /*
114  * Serial Port configuration
115  * The following definitions let you select what serial you want to use
116  * for your console driver.
117  */
118 
119 #define CONFIG_CONS_INDEX	1	/* Console on UART0 */
120 
121 /*
122  * For booting Linux, the board info and command line data
123  * have to be in the first 8 MB of memory, since this is
124  * the maximum mapped by the Linux kernel during initialization.
125  */
126 #define CONFIG_BOOTMAPSZ	(8 << 20)	/* Initial Memmap for Linux */
127 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs  */
128 #define CONFIG_INITRD_TAG		/* enable INITRD tag */
129 #define CONFIG_SETUP_MEMORY_TAGS	/* enable memory tag */
130 
131 /*
132  * Commands configuration
133  */
134 #define CONFIG_CMD_ELF
135 #define CONFIG_CMD_MTDPARTS
136 #define CONFIG_CMD_NFS
137 
138 /*
139  * Without NOR FLASH we need this
140  */
141 #define CONFIG_SYS_NO_FLASH
142 #undef CONFIG_CMD_FLASH
143 #undef CONFIG_CMD_IMLS
144 
145 /*
146  * NAND Flash configuration
147  */
148 #define CONFIG_SYS_MAX_NAND_DEVICE	1
149 
150 #define BOOTFLASH_START		0x0
151 
152 /* Kirkwood has two serial IF */
153 #if (CONFIG_CONS_INDEX == 2)
154 #define CONFIG_KM_CONSOLE_TTY	"ttyS1"
155 #else
156 #define CONFIG_KM_CONSOLE_TTY	"ttyS0"
157 #endif
158 
159 /*
160  * Other required minimal configurations
161  */
162 #define CONFIG_CONSOLE_INFO_QUIET	/* some code reduction */
163 #define CONFIG_ARCH_CPU_INIT		/* call arch_cpu_init() */
164 #define CONFIG_ARCH_MISC_INIT		/* call arch_misc_init() */
165 #define CONFIG_DISPLAY_CPUINFO		/* Display cpu info */
166 #define CONFIG_NR_DRAM_BANKS	4
167 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
168 
169 /*
170  * Ethernet Driver configuration
171  */
172 #define CONFIG_NETCONSOLE	/* include NetConsole support   */
173 #define CONFIG_MII		/* expose smi ove miiphy interface */
174 #define CONFIG_CMD_MII		/* to debug mdio phy config */
175 #define CONFIG_MVGBE		/* Enable Marvell Gbe Controller Driver */
176 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
177 #define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
178 #define CONFIG_PHY_BASE_ADR	0
179 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
180 
181 /*
182  * UBI related stuff
183  */
184 #define CONFIG_SYS_USE_UBI
185 
186 /*
187  * I2C related stuff
188  */
189 #undef CONFIG_I2C_MVTWSI
190 #define CONFIG_SYS_I2C
191 #define	CONFIG_SYS_I2C_SOFT	/* I2C bit-banged	*/
192 
193 #define	CONFIG_KIRKWOOD_GPIO		/* Enable GPIO Support */
194 #if defined(CONFIG_SYS_I2C_SOFT)
195 
196 #define CONFIG_SYS_NUM_I2C_BUSES	6
197 #define CONFIG_SYS_I2C_MAX_HOPS		1
198 #define CONFIG_SYS_I2C_BUSES	{	{0, {I2C_NULL_HOP} }, \
199 					{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
200 					{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
201 					{0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
202 					{0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
203 					{0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
204 				}
205 
206 #ifndef __ASSEMBLY__
207 #include <asm/arch-kirkwood/gpio.h>
208 extern void __set_direction(unsigned pin, int high);
209 void set_sda(int state);
210 void set_scl(int state);
211 int get_sda(void);
212 int get_scl(void);
213 #define KM_KIRKWOOD_SDA_PIN	8
214 #define KM_KIRKWOOD_SCL_PIN	9
215 #define KM_KIRKWOOD_SOFT_I2C_GPIOS	0x0300
216 #define KM_KIRKWOOD_ENV_WP	38
217 
218 #define I2C_ACTIVE	__set_direction(KM_KIRKWOOD_SDA_PIN, 0)
219 #define I2C_TRISTATE	__set_direction(KM_KIRKWOOD_SDA_PIN, 1)
220 #define I2C_READ	(kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
221 #define I2C_SDA(bit)	kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
222 #define I2C_SCL(bit)	kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
223 #endif
224 
225 #define I2C_DELAY	udelay(1)
226 #define I2C_SOFT_DECLARATIONS
227 
228 #define	CONFIG_SYS_I2C_SOFT_SLAVE	0x0
229 #define	CONFIG_SYS_I2C_SOFT_SPEED	100000
230 #endif
231 
232 /* EEprom support 24C128, 24C256 valid for environment eeprom */
233 #define CONFIG_SYS_I2C_MULTI_EEPROMS
234 #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
235 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	6 /* 64 Byte write page */
236 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
237 
238 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
239 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
240 
241 /*
242  *  Environment variables configurations
243  */
244 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
245 #define CONFIG_ENV_IS_IN_SPI_FLASH  /* use SPI-Flash for environment vars */
246 #define CONFIG_ENV_OFFSET		0xc0000     /* no bracets! */
247 #define CONFIG_ENV_SIZE			0x02000     /* Size of Environment */
248 #define CONFIG_ENV_SECT_SIZE		0x10000
249 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + \
250 					CONFIG_ENV_SECT_SIZE)
251 #define CONFIG_ENV_TOTAL_SIZE		0x20000     /* no bracets! */
252 #else
253 #define CONFIG_ENV_IS_IN_EEPROM		/* use EEPROM for environment vars */
254 #define CONFIG_SYS_DEF_EEPROM_ADDR	0x50
255 #define CONFIG_ENV_EEPROM_IS_ON_I2C
256 #define CONFIG_SYS_EEPROM_WREN
257 #define CONFIG_ENV_OFFSET		0x0 /* no bracets! */
258 #define CONFIG_ENV_SIZE			(0x2000 - CONFIG_ENV_OFFSET)
259 #define CONFIG_I2C_ENV_EEPROM_BUS	KM_ENV_BUS
260 #define CONFIG_ENV_OFFSET_REDUND	0x2000 /* no bracets! */
261 #define CONFIG_ENV_SIZE_REDUND		(CONFIG_ENV_SIZE)
262 #endif
263 
264 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
265 
266 #define CONFIG_SPI_FLASH
267 #define CONFIG_SPI_FLASH_STMICRO
268 
269 /* SPI bus claim MPP configuration */
270 #define CONFIG_SYS_KW_SPI_MPP	0x0
271 
272 #define FLASH_GPIO_PIN			0x00010000
273 #define KM_FLASH_GPIO_PIN	16
274 
275 #ifndef MTDIDS_DEFAULT
276 # define MTDIDS_DEFAULT		"nand0=orion_nand"
277 #endif /* MTDIDS_DEFAULT */
278 
279 #ifndef MTDPARTS_DEFAULT
280 # define MTDPARTS_DEFAULT	"mtdparts="			\
281 	"orion_nand:"						\
282 		"-(" CONFIG_KM_UBI_PARTITION_NAME_BOOT ");"
283 #endif /* MTDPARTS_DEFAULT */
284 
285 #define	CONFIG_KM_UPDATE_UBOOT						\
286 	"update="							\
287 		"sf probe 0;sf erase 0 +${filesize};"			\
288 		"sf write ${load_addr_r} 0 ${filesize};\0"
289 
290 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
291 #define CONFIG_KM_NEW_ENV						\
292 	"newenv=sf probe 0;"						\
293 		"sf erase " __stringify(CONFIG_ENV_OFFSET) " "		\
294 		__stringify(CONFIG_ENV_TOTAL_SIZE)"\0"
295 #else
296 #define CONFIG_KM_NEW_ENV						\
297 	"newenv=setenv addr 0x100000 && "				\
298 		"i2c dev 1; mw.b ${addr} 0 4 && "			\
299 		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
300 		" ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && "	\
301 		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
302 		" ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
303 #endif
304 
305 /*
306  * Default environment variables
307  */
308 #define CONFIG_EXTRA_ENV_SETTINGS					\
309 	CONFIG_KM_DEF_ENV						\
310 	CONFIG_KM_NEW_ENV						\
311 	"arch=arm\0"							\
312 	"EEprom_ivm=" __stringify(KM_IVM_BUS) "\0"			\
313 	""
314 
315 #if defined(CONFIG_SYS_NO_FLASH)
316 #undef	CONFIG_FLASH_CFI_MTD
317 #undef	CONFIG_JFFS2_CMDLINE
318 #endif
319 
320 /* additions for new relocation code, must be added to all boards */
321 #define CONFIG_SYS_SDRAM_BASE		0x00000000
322 /* Do early setups now in board_init_f() */
323 #define CONFIG_BOARD_EARLY_INIT_F
324 
325 /*
326  * resereved pram area at the end of memroy [hex]
327  * 8Mbytes for switch + 4Kbytes for bootcount
328  */
329 #define CONFIG_KM_RESERVED_PRAM 0x801000
330 /* address for the bootcount (taken from end of RAM) */
331 #define BOOTCOUNT_ADDR          (CONFIG_KM_RESERVED_PRAM)
332 /* Use generic bootcount RAM driver */
333 #define CONFIG_BOOTCOUNT_RAM
334 
335 /* enable POST tests */
336 #define CONFIG_POST	(CONFIG_SYS_POST_MEM_REGIONS)
337 #define CONFIG_POST_SKIP_ENV_FLAGS
338 #define CONFIG_POST_EXTERNAL_WORD_FUNCS
339 #define CONFIG_CMD_DIAG
340 
341 /* we do the whole PCIe FPGA config stuff here */
342 #define	CONFIG_BOARD_LATE_INIT
343 
344 #endif /* _CONFIG_KM_ARM_H */
345