xref: /openbmc/u-boot/include/configs/helios4.h (revision 7a147220c6459aeb7c6b6f7afe4330dcce077c9b)
1ae28a5f8SDennis Gilmore /* SPDX-License-Identifier: GPL-2.0+ */
2ae28a5f8SDennis Gilmore /*
3ae28a5f8SDennis Gilmore  * Copyright (C) 2018 Dennis Gilmore <dgilmore@redhat.com>
4ae28a5f8SDennis Gilmore  */
5ae28a5f8SDennis Gilmore 
6ae28a5f8SDennis Gilmore #ifndef _CONFIG_HELIOS4_H
7ae28a5f8SDennis Gilmore #define _CONFIG_HELIOS4_H
8ae28a5f8SDennis Gilmore 
98d7d97e2SAditya Prayoga #include <linux/sizes.h>
108d7d97e2SAditya Prayoga 
11ae28a5f8SDennis Gilmore /*
12ae28a5f8SDennis Gilmore  * High Level Configuration Options (easy to change)
13ae28a5f8SDennis Gilmore  */
14ae28a5f8SDennis Gilmore 
15ae28a5f8SDennis Gilmore /*
16ae28a5f8SDennis Gilmore  * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
17ae28a5f8SDennis Gilmore  * for DDR ECC byte filling in the SPL before loading the main
18ae28a5f8SDennis Gilmore  * U-Boot into it.
19ae28a5f8SDennis Gilmore  */
20ae28a5f8SDennis Gilmore #define CONFIG_SYS_TCLK		250000000	/* 250MHz */
21ae28a5f8SDennis Gilmore 
22ae28a5f8SDennis Gilmore /*
23ae28a5f8SDennis Gilmore  * Commands configuration
24ae28a5f8SDennis Gilmore  */
25ae28a5f8SDennis Gilmore 
26ae28a5f8SDennis Gilmore /* SPI NOR flash default params, used by sf commands */
27ae28a5f8SDennis Gilmore #define CONFIG_SF_DEFAULT_BUS		1
288d7d97e2SAditya Prayoga #define CONFIG_SF_DEFAULT_CS		0
298d7d97e2SAditya Prayoga #define CONFIG_SF_DEFAULT_SPEED		104000000
308d7d97e2SAditya Prayoga #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
31ae28a5f8SDennis Gilmore 
32ae28a5f8SDennis Gilmore /*
33ae28a5f8SDennis Gilmore  * SDIO/MMC Card Configuration
34ae28a5f8SDennis Gilmore  */
35ae28a5f8SDennis Gilmore #define CONFIG_SYS_MMC_BASE		MVEBU_SDIO_BASE
36ae28a5f8SDennis Gilmore 
37ae28a5f8SDennis Gilmore /* USB/EHCI configuration */
38ae28a5f8SDennis Gilmore #define CONFIG_EHCI_IS_TDI
39ae28a5f8SDennis Gilmore 
40ae28a5f8SDennis Gilmore #define CONFIG_ENV_MIN_ENTRIES		128
41ae28a5f8SDennis Gilmore 
42ae28a5f8SDennis Gilmore /*
43ae28a5f8SDennis Gilmore  * SATA/SCSI/AHCI configuration
44ae28a5f8SDennis Gilmore  */
45ae28a5f8SDennis Gilmore #define CONFIG_SCSI_AHCI_PLAT
46ae28a5f8SDennis Gilmore #define CONFIG_SYS_SCSI_MAX_SCSI_ID     2
47ae28a5f8SDennis Gilmore #define CONFIG_SYS_SCSI_MAX_LUN         2
48ae28a5f8SDennis Gilmore #define CONFIG_SYS_SCSI_MAX_DEVICE      (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
49ae28a5f8SDennis Gilmore 					CONFIG_SYS_SCSI_MAX_LUN)
50ae28a5f8SDennis Gilmore 
518d7d97e2SAditya Prayoga #ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI
528d7d97e2SAditya Prayoga /*
538d7d97e2SAditya Prayoga  * SPI Flash configuration for the environment access
548d7d97e2SAditya Prayoga  */
558d7d97e2SAditya Prayoga #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
568d7d97e2SAditya Prayoga #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
578d7d97e2SAditya Prayoga #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
588d7d97e2SAditya Prayoga 
598d7d97e2SAditya Prayoga /* Environment in SPI NOR flash */
608d7d97e2SAditya Prayoga #define CONFIG_ENV_SECT_SIZE		SZ_64K
618d7d97e2SAditya Prayoga #define CONFIG_ENV_SIZE			CONFIG_ENV_SECT_SIZE
628d7d97e2SAditya Prayoga #define CONFIG_ENV_OFFSET		SZ_1M
638d7d97e2SAditya Prayoga #endif
648d7d97e2SAditya Prayoga 
658d7d97e2SAditya Prayoga #ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC
66ae28a5f8SDennis Gilmore /* Environment in MMC */
67ae28a5f8SDennis Gilmore #define CONFIG_SYS_MMC_ENV_DEV		0
68ae28a5f8SDennis Gilmore #define CONFIG_ENV_SECT_SIZE		0x200
69a134d680SAditya Prayoga #define CONFIG_ENV_SIZE			0x2000
70a134d680SAditya Prayoga /* stay within first 1M */
71a134d680SAditya Prayoga #define CONFIG_ENV_OFFSET		(SZ_1M - CONFIG_ENV_SIZE)
72ae28a5f8SDennis Gilmore #define CONFIG_ENV_ADDR			CONFIG_ENV_OFFSET
738d7d97e2SAditya Prayoga #endif
74ae28a5f8SDennis Gilmore 
75ae28a5f8SDennis Gilmore #define CONFIG_PHY_MARVELL		/* there is a marvell phy */
76ae28a5f8SDennis Gilmore #define PHY_ANEG_TIMEOUT	8000	/* PHY needs a longer aneg time */
77ae28a5f8SDennis Gilmore 
78ae28a5f8SDennis Gilmore /* Keep device tree and initrd in lower memory so the kernel can access them */
79ae28a5f8SDennis Gilmore #define RELOCATION_LIMITS_ENV_SETTINGS	\
80ae28a5f8SDennis Gilmore 	"fdt_high=0x10000000\0"		\
81ae28a5f8SDennis Gilmore 	"initrd_high=0x10000000\0"
82ae28a5f8SDennis Gilmore 
83ae28a5f8SDennis Gilmore /* SPL */
84ae28a5f8SDennis Gilmore /*
85ae28a5f8SDennis Gilmore  * Select the boot device here
86ae28a5f8SDennis Gilmore  *
87ae28a5f8SDennis Gilmore  * Currently supported are:
88ae28a5f8SDennis Gilmore  * SPL_BOOT_SPI_NOR_FLASH	- Booting via SPI NOR flash
89ae28a5f8SDennis Gilmore  * SPL_BOOT_SDIO_MMC_CARD	- Booting via SDIO/MMC card (partition 1)
90ae28a5f8SDennis Gilmore  */
91ae28a5f8SDennis Gilmore #define SPL_BOOT_SPI_NOR_FLASH		1
92ae28a5f8SDennis Gilmore #define SPL_BOOT_SDIO_MMC_CARD		2
938d7d97e2SAditya Prayoga 
948d7d97e2SAditya Prayoga #ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI
958d7d97e2SAditya Prayoga #define CONFIG_SPL_BOOT_DEVICE		SPL_BOOT_SPI_NOR_FLASH
968d7d97e2SAditya Prayoga #endif
978d7d97e2SAditya Prayoga #ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC
98ae28a5f8SDennis Gilmore #define CONFIG_SPL_BOOT_DEVICE		SPL_BOOT_SDIO_MMC_CARD
998d7d97e2SAditya Prayoga #endif
100ae28a5f8SDennis Gilmore 
101ae28a5f8SDennis Gilmore /* Defines for SPL */
102ae28a5f8SDennis Gilmore #define CONFIG_SPL_SIZE			(140 << 10)
103ae28a5f8SDennis Gilmore #define CONFIG_SPL_TEXT_BASE		0x40000030
104ae28a5f8SDennis Gilmore #define CONFIG_SPL_MAX_SIZE		(CONFIG_SPL_SIZE - 0x0030)
105ae28a5f8SDennis Gilmore 
106ae28a5f8SDennis Gilmore #define CONFIG_SPL_BSS_START_ADDR	(0x40000000 + CONFIG_SPL_SIZE)
107ae28a5f8SDennis Gilmore #define CONFIG_SPL_BSS_MAX_SIZE		(16 << 10)
108ae28a5f8SDennis Gilmore 
109ae28a5f8SDennis Gilmore #ifdef CONFIG_SPL_BUILD
110ae28a5f8SDennis Gilmore #define CONFIG_SYS_MALLOC_SIMPLE
111ae28a5f8SDennis Gilmore #endif
112ae28a5f8SDennis Gilmore 
113ae28a5f8SDennis Gilmore #define CONFIG_SPL_STACK		(0x40000000 + ((192 - 16) << 10))
114ae28a5f8SDennis Gilmore #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
115ae28a5f8SDennis Gilmore 
116ae28a5f8SDennis Gilmore #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
117ae28a5f8SDennis Gilmore /* SPL related SPI defines */
1188d7d97e2SAditya Prayoga #define CONFIG_SPL_SPI_FLASH_SUPPORT
1198d7d97e2SAditya Prayoga #define CONFIG_SPL_SPI_LOAD
1208d7d97e2SAditya Prayoga #define CONFIG_SPL_SPI_SUPPORT
121*7a147220SAditya Prayoga #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x30000
122ae28a5f8SDennis Gilmore #define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
123ae28a5f8SDennis Gilmore #endif
124ae28a5f8SDennis Gilmore 
125ae28a5f8SDennis Gilmore #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
126ae28a5f8SDennis Gilmore /* SPL related MMC defines */
1278d7d97e2SAditya Prayoga #define CONFIG_SPL_MMC_SUPPORT
128ae28a5f8SDennis Gilmore #define CONFIG_SYS_MMC_U_BOOT_OFFS		(160 << 10)
129ae28a5f8SDennis Gilmore #define CONFIG_SYS_U_BOOT_OFFS			CONFIG_SYS_MMC_U_BOOT_OFFS
130ae28a5f8SDennis Gilmore #ifdef CONFIG_SPL_BUILD
131ae28a5f8SDennis Gilmore #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER	0x00180000	/* in SDRAM */
132ae28a5f8SDennis Gilmore #endif
133ae28a5f8SDennis Gilmore #endif
134ae28a5f8SDennis Gilmore /*
135ae28a5f8SDennis Gilmore  * mv-common.h should be defined after CMD configs since it used them
136ae28a5f8SDennis Gilmore  * to enable certain macros
137ae28a5f8SDennis Gilmore  */
138ae28a5f8SDennis Gilmore #include "mv-common.h"
139ae28a5f8SDennis Gilmore 
140ae28a5f8SDennis Gilmore /* Include the common distro boot environment */
141ae28a5f8SDennis Gilmore #ifndef CONFIG_SPL_BUILD
142ae28a5f8SDennis Gilmore 
143ae28a5f8SDennis Gilmore #ifdef CONFIG_MMC
144ae28a5f8SDennis Gilmore #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
145ae28a5f8SDennis Gilmore #else
146ae28a5f8SDennis Gilmore #define BOOT_TARGET_DEVICES_MMC(func)
147ae28a5f8SDennis Gilmore #endif
148ae28a5f8SDennis Gilmore 
149ae28a5f8SDennis Gilmore #ifdef CONFIG_USB_STORAGE
150ae28a5f8SDennis Gilmore #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
151ae28a5f8SDennis Gilmore #else
152ae28a5f8SDennis Gilmore #define BOOT_TARGET_DEVICES_USB(func)
153ae28a5f8SDennis Gilmore #endif
154ae28a5f8SDennis Gilmore 
155ae28a5f8SDennis Gilmore #ifdef CONFIG_SATA
156ae28a5f8SDennis Gilmore #define BOOT_TARGET_DEVICES_SATA(func) func(SATA, sata, 0)
157ae28a5f8SDennis Gilmore #else
158ae28a5f8SDennis Gilmore #define BOOT_TARGET_DEVICES_SATA(func)
159ae28a5f8SDennis Gilmore #endif
160ae28a5f8SDennis Gilmore 
161ae28a5f8SDennis Gilmore #define BOOT_TARGET_DEVICES(func) \
162ae28a5f8SDennis Gilmore 	BOOT_TARGET_DEVICES_MMC(func) \
163ae28a5f8SDennis Gilmore 	BOOT_TARGET_DEVICES_USB(func) \
164ae28a5f8SDennis Gilmore 	BOOT_TARGET_DEVICES_SATA(func) \
165ae28a5f8SDennis Gilmore 	func(PXE, pxe, na) \
166ae28a5f8SDennis Gilmore 	func(DHCP, dhcp, na)
167ae28a5f8SDennis Gilmore 
168ae28a5f8SDennis Gilmore #define KERNEL_ADDR_R	__stringify(0x800000)
169ae28a5f8SDennis Gilmore #define FDT_ADDR_R	__stringify(0x100000)
170ae28a5f8SDennis Gilmore #define RAMDISK_ADDR_R	__stringify(0x1800000)
171ae28a5f8SDennis Gilmore #define SCRIPT_ADDR_R	__stringify(0x200000)
172ae28a5f8SDennis Gilmore #define PXEFILE_ADDR_R	__stringify(0x300000)
173ae28a5f8SDennis Gilmore 
174ae28a5f8SDennis Gilmore #define LOAD_ADDRESS_ENV_SETTINGS \
175ae28a5f8SDennis Gilmore 	"kernel_addr_r=" KERNEL_ADDR_R "\0" \
176ae28a5f8SDennis Gilmore 	"fdt_addr_r=" FDT_ADDR_R "\0" \
177ae28a5f8SDennis Gilmore 	"ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \
178ae28a5f8SDennis Gilmore 	"scriptaddr=" SCRIPT_ADDR_R "\0" \
179ae28a5f8SDennis Gilmore 	"pxefile_addr_r=" PXEFILE_ADDR_R "\0"
180ae28a5f8SDennis Gilmore 
181ae28a5f8SDennis Gilmore #include <config_distro_bootcmd.h>
182ae28a5f8SDennis Gilmore 
183ae28a5f8SDennis Gilmore #define CONFIG_EXTRA_ENV_SETTINGS \
184ae28a5f8SDennis Gilmore 	RELOCATION_LIMITS_ENV_SETTINGS \
185ae28a5f8SDennis Gilmore 	LOAD_ADDRESS_ENV_SETTINGS \
186ae28a5f8SDennis Gilmore 	"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
187ae28a5f8SDennis Gilmore 	"console=ttyS0,115200\0" \
188ae28a5f8SDennis Gilmore 	BOOTENV
189ae28a5f8SDennis Gilmore 
190ae28a5f8SDennis Gilmore #endif /* CONFIG_SPL_BUILD */
191ae28a5f8SDennis Gilmore 
192ae28a5f8SDennis Gilmore #endif /* _CONFIG_HELIOS4_H */
193