xref: /openbmc/u-boot/include/configs/ecovec.h (revision 2fe88d452268d61b5ca9cb0b1dda2974cc43faeb)
1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */
26d1d5cf9SNobuhiro Iwamatsu /*
36d1d5cf9SNobuhiro Iwamatsu  * Configuation settings for the Renesas Solutions ECOVEC board
46d1d5cf9SNobuhiro Iwamatsu  *
56d1d5cf9SNobuhiro Iwamatsu  * Copyright (C) 2009 - 2011 Renesas Solutions Corp.
66d1d5cf9SNobuhiro Iwamatsu  * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori@renesas.com>
76d1d5cf9SNobuhiro Iwamatsu  * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
86d1d5cf9SNobuhiro Iwamatsu  */
96d1d5cf9SNobuhiro Iwamatsu 
106d1d5cf9SNobuhiro Iwamatsu #ifndef __ECOVEC_H
116d1d5cf9SNobuhiro Iwamatsu #define __ECOVEC_H
126d1d5cf9SNobuhiro Iwamatsu 
136d1d5cf9SNobuhiro Iwamatsu /*
146d1d5cf9SNobuhiro Iwamatsu  *  Address      Interface        BusWidth
156d1d5cf9SNobuhiro Iwamatsu  *-----------------------------------------
166d1d5cf9SNobuhiro Iwamatsu  *  0x0000_0000  U-Boot           16bit
176d1d5cf9SNobuhiro Iwamatsu  *  0x0004_0000  Linux romImage   16bit
186d1d5cf9SNobuhiro Iwamatsu  *  0x0014_0000  MTD for Linux    16bit
196d1d5cf9SNobuhiro Iwamatsu  *  0x0400_0000  Internal I/O     16/32bit
206d1d5cf9SNobuhiro Iwamatsu  *  0x0800_0000  DRAM             32bit
216d1d5cf9SNobuhiro Iwamatsu  *  0x1800_0000  MFI              16bit
226d1d5cf9SNobuhiro Iwamatsu  */
236d1d5cf9SNobuhiro Iwamatsu 
246d1d5cf9SNobuhiro Iwamatsu #define CONFIG_CPU_SH7724	1
256d1d5cf9SNobuhiro Iwamatsu 
266d1d5cf9SNobuhiro Iwamatsu #define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000
276d1d5cf9SNobuhiro Iwamatsu 
2818a40e84SVladimir Zapolskiy #define CONFIG_DISPLAY_BOARDINFO
296d1d5cf9SNobuhiro Iwamatsu #undef  CONFIG_SHOW_BOOT_PROGRESS
306d1d5cf9SNobuhiro Iwamatsu 
316d1d5cf9SNobuhiro Iwamatsu /* I2C */
322035d77dSNobuhiro Iwamatsu #define CONFIG_SYS_I2C
332035d77dSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH
346d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SLAVE	0x7F
352035d77dSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 2
362035d77dSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_BASE0	0xA4470000
372035d77dSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED0	100000
382035d77dSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_BASE1	0xA4750000
392035d77dSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED1	100000
406d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_HIGH	4
416d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_LOW 	5
426d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SH_I2C_CLOCK  	41666666
436d1d5cf9SNobuhiro Iwamatsu 
446d1d5cf9SNobuhiro Iwamatsu /* Ether */
456d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_USE_PORT (0)
466d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_ADDR (0x1f)
47e50edf90SNobuhiro Iwamatsu #define CONFIG_PHY_SMSC 1
486d1d5cf9SNobuhiro Iwamatsu #define CONFIG_BITBANGMII
496d1d5cf9SNobuhiro Iwamatsu #define CONFIG_BITBANGMII_MULTI
50a80a6619SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
516d1d5cf9SNobuhiro Iwamatsu 
526d1d5cf9SNobuhiro Iwamatsu /* USB / R8A66597 */
536d1d5cf9SNobuhiro Iwamatsu #define CONFIG_USB_R8A66597_HCD
546d1d5cf9SNobuhiro Iwamatsu #define CONFIG_R8A66597_BASE_ADDR   0xA4D80000
556d1d5cf9SNobuhiro Iwamatsu #define CONFIG_R8A66597_XTAL        0x0000  /* 12MHz */
566d1d5cf9SNobuhiro Iwamatsu #define CONFIG_R8A66597_LDRV        0x8000  /* 3.3V */
576d1d5cf9SNobuhiro Iwamatsu #define CONFIG_R8A66597_ENDIAN      0x0000  /* little */
586d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SUPERH_ON_CHIP_R8A66597
596d1d5cf9SNobuhiro Iwamatsu 
606d1d5cf9SNobuhiro Iwamatsu /* undef to save memory	*/
616d1d5cf9SNobuhiro Iwamatsu /* Monitor Command Prompt */
626d1d5cf9SNobuhiro Iwamatsu /* Buffer size for Console output */
636d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_PBSIZE		256
646d1d5cf9SNobuhiro Iwamatsu /* List of legal baudrate settings for this board */
656d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
666d1d5cf9SNobuhiro Iwamatsu 
676d1d5cf9SNobuhiro Iwamatsu /* SCIF */
686d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SCIF		1
696d1d5cf9SNobuhiro Iwamatsu #define CONFIG_CONS_SCIF0	1
706d1d5cf9SNobuhiro Iwamatsu 
716d1d5cf9SNobuhiro Iwamatsu /* Suppress display of console information at boot */
726d1d5cf9SNobuhiro Iwamatsu 
736d1d5cf9SNobuhiro Iwamatsu /* SDRAM */
746d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_SDRAM_BASE	(0x88000000)
756d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_SDRAM_SIZE	(256 * 1024 * 1024)
766d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
776d1d5cf9SNobuhiro Iwamatsu 
786d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
796d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_MEMTEST_END	 (CONFIG_SYS_MEMTEST_START + 200 * 1024 * 1024)
806d1d5cf9SNobuhiro Iwamatsu /* Enable alternate, more extensive, memory test */
816d1d5cf9SNobuhiro Iwamatsu /* Scratch address used by the alternate memory test */
826d1d5cf9SNobuhiro Iwamatsu #undef  CONFIG_SYS_MEMTEST_SCRATCH
836d1d5cf9SNobuhiro Iwamatsu 
846d1d5cf9SNobuhiro Iwamatsu /* Enable temporary baudrate change while serial download */
856d1d5cf9SNobuhiro Iwamatsu #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
866d1d5cf9SNobuhiro Iwamatsu 
876d1d5cf9SNobuhiro Iwamatsu /* FLASH */
886d1d5cf9SNobuhiro Iwamatsu #undef  CONFIG_SYS_FLASH_QUIET_TEST
896d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_EMPTY_INFO
906d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_BASE	(0xA0000000)
916d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_MAX_FLASH_SECT	512
926d1d5cf9SNobuhiro Iwamatsu 
936d1d5cf9SNobuhiro Iwamatsu /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
946d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_MAX_FLASH_BANKS	1
956d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
966d1d5cf9SNobuhiro Iwamatsu 
976d1d5cf9SNobuhiro Iwamatsu /* Timeout for Flash erase operations (in ms) */
986d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)
996d1d5cf9SNobuhiro Iwamatsu /* Timeout for Flash write operations (in ms) */
1006d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)
1016d1d5cf9SNobuhiro Iwamatsu /* Timeout for Flash set sector lock bit operations (in ms) */
1026d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_LOCK_TOUT	(3 * 1000)
1036d1d5cf9SNobuhiro Iwamatsu /* Timeout for Flash clear lock bit operations (in ms) */
1046d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)
1056d1d5cf9SNobuhiro Iwamatsu 
1066d1d5cf9SNobuhiro Iwamatsu /*
1076d1d5cf9SNobuhiro Iwamatsu  * Use hardware flash sectors protection instead
1086d1d5cf9SNobuhiro Iwamatsu  * of U-Boot software protection
1096d1d5cf9SNobuhiro Iwamatsu  */
1106d1d5cf9SNobuhiro Iwamatsu #undef  CONFIG_SYS_DIRECT_FLASH_TFTP
1116d1d5cf9SNobuhiro Iwamatsu 
1126d1d5cf9SNobuhiro Iwamatsu /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
1136d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE)
1146d1d5cf9SNobuhiro Iwamatsu /* Monitor size */
1156d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_MONITOR_LEN	(256 * 1024)
1166d1d5cf9SNobuhiro Iwamatsu /* Size of DRAM reserved for malloc() use */
1176d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_MALLOC_LEN	(256 * 1024)
1186d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
1196d1d5cf9SNobuhiro Iwamatsu 
1206d1d5cf9SNobuhiro Iwamatsu /* ENV setting */
1216d1d5cf9SNobuhiro Iwamatsu #define CONFIG_ENV_OVERWRITE	1
1226d1d5cf9SNobuhiro Iwamatsu #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
1236d1d5cf9SNobuhiro Iwamatsu #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
1246d1d5cf9SNobuhiro Iwamatsu #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
1256d1d5cf9SNobuhiro Iwamatsu /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
1266d1d5cf9SNobuhiro Iwamatsu #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
1276d1d5cf9SNobuhiro Iwamatsu #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
1286d1d5cf9SNobuhiro Iwamatsu 
1296d1d5cf9SNobuhiro Iwamatsu /* Board Clock */
1306d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ 41666666
131684a501eSNobuhiro Iwamatsu #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
1326d1d5cf9SNobuhiro Iwamatsu 
1336d1d5cf9SNobuhiro Iwamatsu #endif	/* __ECOVEC_H */
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