xref: /openbmc/u-boot/include/configs/dra7xx_evm.h (revision 54a97d2849979acd84a0475486edf0d0c18e47c7)
13ef5ebebSLokesh Vutla /*
23ef5ebebSLokesh Vutla  * (C) Copyright 2013
33ef5ebebSLokesh Vutla  * Texas Instruments Incorporated.
43ef5ebebSLokesh Vutla  * Lokesh Vutla	  <lokeshvutla@ti.com>
53ef5ebebSLokesh Vutla  *
63ef5ebebSLokesh Vutla  * Configuration settings for the TI DRA7XX board.
73d657a05SEnric Balletbò i Serra  * See ti_omap5_common.h for omap5 common settings.
83ef5ebebSLokesh Vutla  *
91a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
103ef5ebebSLokesh Vutla  */
113ef5ebebSLokesh Vutla 
123ef5ebebSLokesh Vutla #ifndef __CONFIG_DRA7XX_EVM_H
133ef5ebebSLokesh Vutla #define __CONFIG_DRA7XX_EVM_H
143ef5ebebSLokesh Vutla 
15a8017574STom Rini #define CONFIG_DRA7XX
16a8017574STom Rini 
1779b079f3STom Rini #ifndef CONFIG_QSPI_BOOT
18d3d33dafSLokesh Vutla /* MMC ENV related defines */
19d3d33dafSLokesh Vutla #define CONFIG_ENV_IS_IN_MMC
20d3d33dafSLokesh Vutla #define CONFIG_SYS_MMC_ENV_DEV		1	/* SLOT2: eMMC(1) */
212737f011STom Rini #define CONFIG_ENV_SIZE			(128 << 10)
22d3d33dafSLokesh Vutla #define CONFIG_ENV_OFFSET		0xE0000
23d3d33dafSLokesh Vutla #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
24d3d33dafSLokesh Vutla #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
2579b079f3STom Rini #endif
26d3d33dafSLokesh Vutla #define CONFIG_CMD_SAVEENV
279552ee3eSTom Rini 
28a13cbf5fSMinal Shah #if (CONFIG_CONS_INDEX == 1)
29a8017574STom Rini #define CONSOLEDEV			"ttyO0"
30a13cbf5fSMinal Shah #elif (CONFIG_CONS_INDEX == 3)
31a13cbf5fSMinal Shah #define CONSOLEDEV			"ttyO2"
32a13cbf5fSMinal Shah #endif
33a13cbf5fSMinal Shah #define CONFIG_SYS_NS16550_COM1		UART1_BASE	/* Base EVM has UART0 */
34a13cbf5fSMinal Shah #define CONFIG_SYS_NS16550_COM2		UART2_BASE	/* UART2 */
35a13cbf5fSMinal Shah #define CONFIG_SYS_NS16550_COM3		UART3_BASE	/* UART3 */
36378bd1fbSSricharan R #define CONFIG_BAUDRATE			115200
3797405d84SLokesh Vutla 
3897405d84SLokesh Vutla #define CONFIG_SYS_OMAP_ABE_SYSCK
3945dbbf29SDan Murphy 
402efa79aeSTom Rini /* Define the default GPT table for eMMC */
412efa79aeSTom Rini #define PARTS_DEFAULT \
422efa79aeSTom Rini 	"uuid_disk=${uuid_gpt_disk};" \
432efa79aeSTom Rini 	"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"
442efa79aeSTom Rini 
453d657a05SEnric Balletbò i Serra #include <configs/ti_omap5_common.h>
4645dbbf29SDan Murphy 
472efa79aeSTom Rini /* Enhance our eMMC support / experience. */
482efa79aeSTom Rini #define CONFIG_CMD_GPT
492efa79aeSTom Rini #define CONFIG_EFI_PARTITION
502efa79aeSTom Rini #define CONFIG_PARTITION_UUIDS
512efa79aeSTom Rini #define CONFIG_CMD_PART
522efa79aeSTom Rini 
53c9be62caSMugunthan V N /* CPSW Ethernet */
54457bb505STom Rini #define CONFIG_CMD_NET			/* 'bootp' and 'tftp' */
55c9be62caSMugunthan V N #define CONFIG_CMD_DHCP
56457bb505STom Rini #define CONFIG_BOOTP_DNS		/* Configurable parts of CMD_DHCP */
57c9be62caSMugunthan V N #define CONFIG_BOOTP_DNS2
58c9be62caSMugunthan V N #define CONFIG_BOOTP_SEND_HOSTNAME
59c9be62caSMugunthan V N #define CONFIG_BOOTP_GATEWAY
60c9be62caSMugunthan V N #define CONFIG_BOOTP_SUBNETMASK
61c9be62caSMugunthan V N #define CONFIG_NET_RETRY_COUNT		10
62457bb505STom Rini #define CONFIG_CMD_PING
63457bb505STom Rini #define CONFIG_CMD_MII
64457bb505STom Rini #define CONFIG_DRIVER_TI_CPSW		/* Driver for IP block */
65457bb505STom Rini #define CONFIG_MII			/* Required in net/eth.c */
66457bb505STom Rini #define CONFIG_PHY_GIGE			/* per-board part of CPSW */
67c9be62caSMugunthan V N #define CONFIG_PHYLIB
68c9be62caSMugunthan V N 
69247cdf04SMatt Porter /* SPI */
70247cdf04SMatt Porter #undef	CONFIG_OMAP3_SPI
71247cdf04SMatt Porter #define CONFIG_TI_QSPI
72247cdf04SMatt Porter #define CONFIG_SPI_FLASH
73247cdf04SMatt Porter #define CONFIG_SPI_FLASH_SPANSION
74247cdf04SMatt Porter #define CONFIG_CMD_SF
75247cdf04SMatt Porter #define CONFIG_CMD_SPI
762c57b03bSPoddar, Sourav #define CONFIG_SPI_FLASH_BAR
77247cdf04SMatt Porter #define CONFIG_TI_SPI_MMAP
78247cdf04SMatt Porter #define CONFIG_SF_DEFAULT_SPEED                48000000
79247cdf04SMatt Porter #define CONFIG_DEFAULT_SPI_MODE                SPI_MODE_3
80247cdf04SMatt Porter 
8179b079f3STom Rini /*
8279b079f3STom Rini  * Default to using SPI for environment, etc.
8379b079f3STom Rini  * 0x000000 - 0x010000 : QSPI.SPL (64KiB)
8479b079f3STom Rini  * 0x010000 - 0x020000 : QSPI.SPL.backup1 (64KiB)
8579b079f3STom Rini  * 0x020000 - 0x030000 : QSPI.SPL.backup2 (64KiB)
8679b079f3STom Rini  * 0x030000 - 0x040000 : QSPI.SPL.backup3 (64KiB)
8779b079f3STom Rini  * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
8879b079f3STom Rini  * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
8979b079f3STom Rini  * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
9079b079f3STom Rini  * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
9179b079f3STom Rini  * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
9279b079f3STom Rini  * 0x9E0000 - 0x2000000 : USERLAND
9379b079f3STom Rini  */
9479b079f3STom Rini #define CONFIG_SYS_SPI_KERNEL_OFFS	0x1E0000
9579b079f3STom Rini #define CONFIG_SYS_SPI_ARGS_OFFS	0x140000
9679b079f3STom Rini #define CONFIG_SYS_SPI_ARGS_SIZE	0x80000
9779b079f3STom Rini #if defined(CONFIG_QSPI_BOOT)
9879b079f3STom Rini /* In SPL, use the environment and discard MMC support for space. */
9979b079f3STom Rini #ifdef CONFIG_SPL_BUILD
10079b079f3STom Rini #undef CONFIG_SPL_MMC_SUPPORT
10179b079f3STom Rini #undef CONFIG_SPL_MAX_SIZE
10279b079f3STom Rini #define CONFIG_SPL_MAX_SIZE             (64 << 10) /* 64 KiB */
10379b079f3STom Rini #endif
10479b079f3STom Rini #define CONFIG_SPL_ENV_SUPPORT
10579b079f3STom Rini #define CONFIG_ENV_IS_IN_SPI_FLASH
10679b079f3STom Rini #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
10779b079f3STom Rini #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
10879b079f3STom Rini #define CONFIG_ENV_SIZE			(64 << 10)
10979b079f3STom Rini #define CONFIG_ENV_SECT_SIZE		(64 << 10) /* 64 KB sectors */
11079b079f3STom Rini #define CONFIG_ENV_OFFSET		0x1C0000
11179b079f3STom Rini #define CONFIG_ENV_OFFSET_REDUND	0x1D0000
11279b079f3STom Rini #endif
11379b079f3STom Rini 
114247cdf04SMatt Porter /* SPI SPL */
115247cdf04SMatt Porter #define CONFIG_SPL_SPI_SUPPORT
116247cdf04SMatt Porter #define CONFIG_SPL_SPI_LOAD
117247cdf04SMatt Porter #define CONFIG_SPL_SPI_FLASH_SUPPORT
118247cdf04SMatt Porter #define CONFIG_SPL_SPI_BUS             0
119247cdf04SMatt Porter #define CONFIG_SPL_SPI_CS              0
12079b079f3STom Rini #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x40000
121247cdf04SMatt Porter 
122b818d9abSTom Rini #define CONFIG_SUPPORT_EMMC_BOOT
123b818d9abSTom Rini 
124834e91afSDan Murphy /* USB xHCI HOST */
125834e91afSDan Murphy #define CONFIG_CMD_USB
126834e91afSDan Murphy #define CONFIG_USB_HOST
127834e91afSDan Murphy #define CONFIG_USB_XHCI
128834e91afSDan Murphy #define CONFIG_USB_XHCI_OMAP
129834e91afSDan Murphy #define CONFIG_USB_STORAGE
130834e91afSDan Murphy #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
131834e91afSDan Murphy 
132834e91afSDan Murphy #define CONFIG_OMAP_USB_PHY
133834e91afSDan Murphy #define CONFIG_OMAP_USB2PHY2_HOST
134834e91afSDan Murphy 
13521914ee6SRoger Quadros /* SATA */
13621914ee6SRoger Quadros #define CONFIG_BOARD_LATE_INIT
13721914ee6SRoger Quadros #define CONFIG_CMD_SCSI
13821914ee6SRoger Quadros #define CONFIG_LIBATA
13921914ee6SRoger Quadros #define CONFIG_SCSI_AHCI
14021914ee6SRoger Quadros #define CONFIG_SCSI_AHCI_PLAT
14121914ee6SRoger Quadros #define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
14221914ee6SRoger Quadros #define CONFIG_SYS_SCSI_MAX_LUN		1
14321914ee6SRoger Quadros #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
14421914ee6SRoger Quadros 						CONFIG_SYS_SCSI_MAX_LUN)
14521914ee6SRoger Quadros 
146*54a97d28Spekon gupta /* NAND support */
147*54a97d28Spekon gupta #ifdef CONFIG_NAND
148*54a97d28Spekon gupta /* NAND: device related configs */
149*54a97d28Spekon gupta #define CONFIG_SYS_NAND_PAGE_SIZE	2048
150*54a97d28Spekon gupta #define CONFIG_SYS_NAND_OOBSIZE		64
151*54a97d28Spekon gupta #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
152*54a97d28Spekon gupta #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
153*54a97d28Spekon gupta #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
154*54a97d28Spekon gupta 					 CONFIG_SYS_NAND_PAGE_SIZE)
155*54a97d28Spekon gupta #define CONFIG_SYS_NAND_5_ADDR_CYCLE
156*54a97d28Spekon gupta /* NAND: driver related configs */
157*54a97d28Spekon gupta #define CONFIG_NAND_OMAP_GPMC
158*54a97d28Spekon gupta #define CONFIG_NAND_OMAP_ELM
159*54a97d28Spekon gupta #define CONFIG_SYS_NAND_ONFI_DETECTION
160*54a97d28Spekon gupta #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW
161*54a97d28Spekon gupta #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
162*54a97d28Spekon gupta #define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
163*54a97d28Spekon gupta 					 10, 11, 12, 13, 14, 15, 16, 17, \
164*54a97d28Spekon gupta 					 18, 19, 20, 21, 22, 23, 24, 25, \
165*54a97d28Spekon gupta 					 26, 27, 28, 29, 30, 31, 32, 33, \
166*54a97d28Spekon gupta 					 34, 35, 36, 37, 38, 39, 40, 41, \
167*54a97d28Spekon gupta 					 42, 43, 44, 45, 46, 47, 48, 49, \
168*54a97d28Spekon gupta 					 50, 51, 52, 53, 54, 55, 56, 57, }
169*54a97d28Spekon gupta #define CONFIG_SYS_NAND_ECCSIZE		512
170*54a97d28Spekon gupta #define CONFIG_SYS_NAND_ECCBYTES	14
171*54a97d28Spekon gupta #define MTDIDS_DEFAULT			"nand0=nand.0"
172*54a97d28Spekon gupta #define MTDPARTS_DEFAULT		"mtdparts=nand.0:" \
173*54a97d28Spekon gupta 					"128k(NAND.SPL)," \
174*54a97d28Spekon gupta 					"128k(NAND.SPL.backup1)," \
175*54a97d28Spekon gupta 					"128k(NAND.SPL.backup2)," \
176*54a97d28Spekon gupta 					"128k(NAND.SPL.backup3)," \
177*54a97d28Spekon gupta 					"256k(NAND.u-boot-spl-os)," \
178*54a97d28Spekon gupta 					"1m(NAND.u-boot)," \
179*54a97d28Spekon gupta 					"128k(NAND.u-boot-env)," \
180*54a97d28Spekon gupta 					"128k(NAND.u-boot-env.backup1)," \
181*54a97d28Spekon gupta 					"8m(NAND.kernel)," \
182*54a97d28Spekon gupta 					"-(NAND.rootfs)"
183*54a97d28Spekon gupta #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x000c0000
184*54a97d28Spekon gupta /* NAND: SPL related configs */
185*54a97d28Spekon gupta #ifdef CONFIG_SPL_NAND_SUPPORT
186*54a97d28Spekon gupta #define CONFIG_SPL_NAND_AM33XX_BCH
187*54a97d28Spekon gupta #endif
188*54a97d28Spekon gupta /* NAND: SPL falcon mode configs */
189*54a97d28Spekon gupta #ifdef CONFIG_SPL_OS_BOOT
190*54a97d28Spekon gupta #define CONFIG_CMD_SPL_NAND_OFS		0x00080000 /* os-boot params*/
191*54a97d28Spekon gupta #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x00200000 /* kernel offset */
192*54a97d28Spekon gupta #define CONFIG_CMD_SPL_WRITE_SIZE	0x2000
193*54a97d28Spekon gupta #endif
194*54a97d28Spekon gupta #endif /* !CONFIG_NAND */
195*54a97d28Spekon gupta 
1963ef5ebebSLokesh Vutla #endif /* __CONFIG_DRA7XX_EVM_H */
197