13ef5ebebSLokesh Vutla /* 23ef5ebebSLokesh Vutla * (C) Copyright 2013 33ef5ebebSLokesh Vutla * Texas Instruments Incorporated. 43ef5ebebSLokesh Vutla * Lokesh Vutla <lokeshvutla@ti.com> 53ef5ebebSLokesh Vutla * 63ef5ebebSLokesh Vutla * Configuration settings for the TI DRA7XX board. 73d657a05SEnric Balletbò i Serra * See ti_omap5_common.h for omap5 common settings. 83ef5ebebSLokesh Vutla * 91a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 103ef5ebebSLokesh Vutla */ 113ef5ebebSLokesh Vutla 123ef5ebebSLokesh Vutla #ifndef __CONFIG_DRA7XX_EVM_H 133ef5ebebSLokesh Vutla #define __CONFIG_DRA7XX_EVM_H 143ef5ebebSLokesh Vutla 15a8017574STom Rini #define CONFIG_DRA7XX 16a8017574STom Rini 17d3d33dafSLokesh Vutla /* MMC ENV related defines */ 18d3d33dafSLokesh Vutla #define CONFIG_ENV_IS_IN_MMC 19d3d33dafSLokesh Vutla #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ 20d3d33dafSLokesh Vutla #define CONFIG_ENV_OFFSET 0xE0000 21d3d33dafSLokesh Vutla #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 22d3d33dafSLokesh Vutla #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 23d3d33dafSLokesh Vutla #define CONFIG_CMD_SAVEENV 249552ee3eSTom Rini 25a13cbf5fSMinal Shah #if (CONFIG_CONS_INDEX == 1) 26a8017574STom Rini #define CONSOLEDEV "ttyO0" 27a13cbf5fSMinal Shah #elif (CONFIG_CONS_INDEX == 3) 28a13cbf5fSMinal Shah #define CONSOLEDEV "ttyO2" 29a13cbf5fSMinal Shah #endif 30a13cbf5fSMinal Shah #define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ 31a13cbf5fSMinal Shah #define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ 32a13cbf5fSMinal Shah #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ 33378bd1fbSSricharan R #define CONFIG_BAUDRATE 115200 3497405d84SLokesh Vutla 3597405d84SLokesh Vutla #define CONFIG_SYS_OMAP_ABE_SYSCK 3645dbbf29SDan Murphy 37*2efa79aeSTom Rini /* Define the default GPT table for eMMC */ 38*2efa79aeSTom Rini #define PARTS_DEFAULT \ 39*2efa79aeSTom Rini "uuid_disk=${uuid_gpt_disk};" \ 40*2efa79aeSTom Rini "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}" 41*2efa79aeSTom Rini 423d657a05SEnric Balletbò i Serra #include <configs/ti_omap5_common.h> 4345dbbf29SDan Murphy 44*2efa79aeSTom Rini /* Enhance our eMMC support / experience. */ 45*2efa79aeSTom Rini #define CONFIG_CMD_GPT 46*2efa79aeSTom Rini #define CONFIG_EFI_PARTITION 47*2efa79aeSTom Rini #define CONFIG_PARTITION_UUIDS 48*2efa79aeSTom Rini #define CONFIG_CMD_PART 49*2efa79aeSTom Rini 50c9be62caSMugunthan V N /* CPSW Ethernet */ 51457bb505STom Rini #define CONFIG_CMD_NET /* 'bootp' and 'tftp' */ 52c9be62caSMugunthan V N #define CONFIG_CMD_DHCP 53457bb505STom Rini #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ 54c9be62caSMugunthan V N #define CONFIG_BOOTP_DNS2 55c9be62caSMugunthan V N #define CONFIG_BOOTP_SEND_HOSTNAME 56c9be62caSMugunthan V N #define CONFIG_BOOTP_GATEWAY 57c9be62caSMugunthan V N #define CONFIG_BOOTP_SUBNETMASK 58c9be62caSMugunthan V N #define CONFIG_NET_RETRY_COUNT 10 59457bb505STom Rini #define CONFIG_CMD_PING 60457bb505STom Rini #define CONFIG_CMD_MII 61457bb505STom Rini #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ 62457bb505STom Rini #define CONFIG_MII /* Required in net/eth.c */ 63457bb505STom Rini #define CONFIG_PHY_GIGE /* per-board part of CPSW */ 64c9be62caSMugunthan V N #define CONFIG_PHYLIB 65c9be62caSMugunthan V N #define CONFIG_PHY_ADDR 2 66c9be62caSMugunthan V N 67247cdf04SMatt Porter /* SPI */ 68247cdf04SMatt Porter #undef CONFIG_OMAP3_SPI 69247cdf04SMatt Porter #define CONFIG_TI_QSPI 70247cdf04SMatt Porter #define CONFIG_SPI_FLASH 71247cdf04SMatt Porter #define CONFIG_SPI_FLASH_SPANSION 72247cdf04SMatt Porter #define CONFIG_CMD_SF 73247cdf04SMatt Porter #define CONFIG_CMD_SPI 742c57b03bSPoddar, Sourav #define CONFIG_SPI_FLASH_BAR 75247cdf04SMatt Porter #define CONFIG_TI_SPI_MMAP 76247cdf04SMatt Porter #define CONFIG_SF_DEFAULT_SPEED 48000000 77247cdf04SMatt Porter #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3 78247cdf04SMatt Porter 79247cdf04SMatt Porter /* SPI SPL */ 80247cdf04SMatt Porter #define CONFIG_SPL_SPI_SUPPORT 81247cdf04SMatt Porter #define CONFIG_SPL_SPI_LOAD 82247cdf04SMatt Porter #define CONFIG_SPL_SPI_FLASH_SUPPORT 83247cdf04SMatt Porter #define CONFIG_SPL_SPI_BUS 0 84247cdf04SMatt Porter #define CONFIG_SPL_SPI_CS 0 85247cdf04SMatt Porter #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 86247cdf04SMatt Porter 87b818d9abSTom Rini #define CONFIG_SUPPORT_EMMC_BOOT 88b818d9abSTom Rini 89834e91afSDan Murphy /* USB xHCI HOST */ 90834e91afSDan Murphy #define CONFIG_CMD_USB 91834e91afSDan Murphy #define CONFIG_USB_HOST 92834e91afSDan Murphy #define CONFIG_USB_XHCI 93834e91afSDan Murphy #define CONFIG_USB_XHCI_OMAP 94834e91afSDan Murphy #define CONFIG_USB_STORAGE 95834e91afSDan Murphy #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 96834e91afSDan Murphy 97834e91afSDan Murphy #define CONFIG_OMAP_USB_PHY 98834e91afSDan Murphy #define CONFIG_OMAP_USB2PHY2_HOST 99834e91afSDan Murphy 10021914ee6SRoger Quadros /* SATA */ 10121914ee6SRoger Quadros #define CONFIG_BOARD_LATE_INIT 10221914ee6SRoger Quadros #define CONFIG_CMD_SCSI 10321914ee6SRoger Quadros #define CONFIG_LIBATA 10421914ee6SRoger Quadros #define CONFIG_SCSI_AHCI 10521914ee6SRoger Quadros #define CONFIG_SCSI_AHCI_PLAT 10621914ee6SRoger Quadros #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 10721914ee6SRoger Quadros #define CONFIG_SYS_SCSI_MAX_LUN 1 10821914ee6SRoger Quadros #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 10921914ee6SRoger Quadros CONFIG_SYS_SCSI_MAX_LUN) 11021914ee6SRoger Quadros 1113ef5ebebSLokesh Vutla #endif /* __CONFIG_DRA7XX_EVM_H */ 112