13ef5ebebSLokesh Vutla /* 23ef5ebebSLokesh Vutla * (C) Copyright 2013 33ef5ebebSLokesh Vutla * Texas Instruments Incorporated. 43ef5ebebSLokesh Vutla * Lokesh Vutla <lokeshvutla@ti.com> 53ef5ebebSLokesh Vutla * 63ef5ebebSLokesh Vutla * Configuration settings for the TI DRA7XX board. 73ef5ebebSLokesh Vutla * See omap5_common.h for omap5 common settings. 83ef5ebebSLokesh Vutla * 91a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 103ef5ebebSLokesh Vutla */ 113ef5ebebSLokesh Vutla 123ef5ebebSLokesh Vutla #ifndef __CONFIG_DRA7XX_EVM_H 133ef5ebebSLokesh Vutla #define __CONFIG_DRA7XX_EVM_H 143ef5ebebSLokesh Vutla 15a8017574STom Rini #define CONFIG_DRA7XX 16a8017574STom Rini 17d3d33dafSLokesh Vutla /* MMC ENV related defines */ 18d3d33dafSLokesh Vutla #define CONFIG_ENV_IS_IN_MMC 19d3d33dafSLokesh Vutla #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ 20d3d33dafSLokesh Vutla #define CONFIG_ENV_OFFSET 0xE0000 21d3d33dafSLokesh Vutla #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 22d3d33dafSLokesh Vutla #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 23d3d33dafSLokesh Vutla #define CONFIG_CMD_SAVEENV 249552ee3eSTom Rini 25a8017574STom Rini #define CONSOLEDEV "ttyO0" 26378bd1fbSSricharan R #define CONFIG_CONS_INDEX 1 27378bd1fbSSricharan R #define CONFIG_SYS_NS16550_COM1 UART1_BASE 28378bd1fbSSricharan R #define CONFIG_BAUDRATE 115200 2997405d84SLokesh Vutla 3097405d84SLokesh Vutla #define CONFIG_SYS_OMAP_ABE_SYSCK 3145dbbf29SDan Murphy 32a8017574STom Rini #include <configs/omap5_common.h> 3345dbbf29SDan Murphy 34c9be62caSMugunthan V N /* CPSW Ethernet */ 35457bb505STom Rini #define CONFIG_CMD_NET /* 'bootp' and 'tftp' */ 36c9be62caSMugunthan V N #define CONFIG_CMD_DHCP 37457bb505STom Rini #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ 38c9be62caSMugunthan V N #define CONFIG_BOOTP_DNS2 39c9be62caSMugunthan V N #define CONFIG_BOOTP_SEND_HOSTNAME 40c9be62caSMugunthan V N #define CONFIG_BOOTP_GATEWAY 41c9be62caSMugunthan V N #define CONFIG_BOOTP_SUBNETMASK 42c9be62caSMugunthan V N #define CONFIG_NET_RETRY_COUNT 10 43457bb505STom Rini #define CONFIG_CMD_PING 44457bb505STom Rini #define CONFIG_CMD_MII 45457bb505STom Rini #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ 46457bb505STom Rini #define CONFIG_MII /* Required in net/eth.c */ 47457bb505STom Rini #define CONFIG_PHY_GIGE /* per-board part of CPSW */ 48c9be62caSMugunthan V N #define CONFIG_PHYLIB 49c9be62caSMugunthan V N #define CONFIG_PHY_ADDR 2 50c9be62caSMugunthan V N 51*247cdf04SMatt Porter /* SPI */ 52*247cdf04SMatt Porter #undef CONFIG_OMAP3_SPI 53*247cdf04SMatt Porter #define CONFIG_TI_QSPI 54*247cdf04SMatt Porter #define CONFIG_SPI_FLASH 55*247cdf04SMatt Porter #define CONFIG_SPI_FLASH_SPANSION 56*247cdf04SMatt Porter #define CONFIG_CMD_SF 57*247cdf04SMatt Porter #define CONFIG_CMD_SPI 58*247cdf04SMatt Porter #define CONFIG_TI_SPI_MMAP 59*247cdf04SMatt Porter #define CONFIG_SF_DEFAULT_SPEED 48000000 60*247cdf04SMatt Porter #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3 61*247cdf04SMatt Porter 62*247cdf04SMatt Porter /* SPI SPL */ 63*247cdf04SMatt Porter #define CONFIG_SPL_SPI_SUPPORT 64*247cdf04SMatt Porter #define CONFIG_SPL_SPI_LOAD 65*247cdf04SMatt Porter #define CONFIG_SPL_SPI_FLASH_SUPPORT 66*247cdf04SMatt Porter #define CONFIG_SPL_SPI_BUS 0 67*247cdf04SMatt Porter #define CONFIG_SPL_SPI_CS 0 68*247cdf04SMatt Porter #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 69*247cdf04SMatt Porter 703ef5ebebSLokesh Vutla #endif /* __CONFIG_DRA7XX_EVM_H */ 71