xref: /openbmc/u-boot/include/configs/cm_t3517.h (revision 9baa2bce28901321d6f62399b5ebeb3fcb8e8a57)
1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */
2b09bf723SIgor Grinberg /*
3b09bf723SIgor Grinberg  * (C) Copyright 2013 CompuLab, Ltd.
4b09bf723SIgor Grinberg  * Author: Igor Grinberg <grinberg@compulab.co.il>
5b09bf723SIgor Grinberg  *
6b09bf723SIgor Grinberg  * Configuration settings for the CompuLab CM-T3517 board
7b09bf723SIgor Grinberg  */
8b09bf723SIgor Grinberg 
9b09bf723SIgor Grinberg #ifndef __CONFIG_H
10b09bf723SIgor Grinberg #define __CONFIG_H
11b09bf723SIgor Grinberg 
12b09bf723SIgor Grinberg /*
13b09bf723SIgor Grinberg  * High Level Configuration Options
14b09bf723SIgor Grinberg  */
15b09bf723SIgor Grinberg #define CONFIG_CM_T3517	/* working with CM-T3517 */
16b09bf723SIgor Grinberg 
17b09bf723SIgor Grinberg /*
18b09bf723SIgor Grinberg  * This is needed for the DMA stuff.
19b09bf723SIgor Grinberg  * Although the default iss 64, we still define it
20b09bf723SIgor Grinberg  * to be on the safe side once the default is changed.
21b09bf723SIgor Grinberg  */
22b09bf723SIgor Grinberg 
23b09bf723SIgor Grinberg #include <asm/arch/cpu.h>		/* get chip and board defs */
24987ec585SNishanth Menon #include <asm/arch/omap.h>
25b09bf723SIgor Grinberg 
26f3b44e8bSDmitry Lifshitz #define CONFIG_MACH_TYPE                MACH_TYPE_CM_T3517
27f3b44e8bSDmitry Lifshitz 
28b09bf723SIgor Grinberg /* Clock Defines */
29b09bf723SIgor Grinberg #define V_OSCK			26000000	/* Clock output from T2 */
30b09bf723SIgor Grinberg #define V_SCLK			(V_OSCK >> 1)
31b09bf723SIgor Grinberg 
32b09bf723SIgor Grinberg /*
33b09bf723SIgor Grinberg  * The early kernel mapping on ARM currently only maps from the base of DRAM
34b09bf723SIgor Grinberg  * to the end of the kernel image.  The kernel is loaded at DRAM base + 0x8000.
35b09bf723SIgor Grinberg  * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
36b09bf723SIgor Grinberg  * so that leaves DRAM base to DRAM base + 0x4000 available.
37b09bf723SIgor Grinberg  */
38b09bf723SIgor Grinberg #define CONFIG_SYS_BOOTMAPSZ	        0x4000
39b09bf723SIgor Grinberg 
40b09bf723SIgor Grinberg #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
41b09bf723SIgor Grinberg #define CONFIG_SETUP_MEMORY_TAGS
42b09bf723SIgor Grinberg #define CONFIG_INITRD_TAG
43b09bf723SIgor Grinberg #define CONFIG_REVISION_TAG
44b09bf723SIgor Grinberg #define CONFIG_SERIAL_TAG
45b09bf723SIgor Grinberg 
46b09bf723SIgor Grinberg /*
47b09bf723SIgor Grinberg  * Size of malloc() pool
48b09bf723SIgor Grinberg  */
492f6e4bf8SDmitry Lifshitz #define CONFIG_ENV_SIZE		(128 << 10)	/* 128 KiB */
50b09bf723SIgor Grinberg #define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + (128 << 10))
51b09bf723SIgor Grinberg 
52b09bf723SIgor Grinberg /*
53b09bf723SIgor Grinberg  * Hardware drivers
54b09bf723SIgor Grinberg  */
55b09bf723SIgor Grinberg 
56b09bf723SIgor Grinberg /*
57b09bf723SIgor Grinberg  * NS16550 Configuration
58b09bf723SIgor Grinberg  */
59b09bf723SIgor Grinberg #define CONFIG_SYS_NS16550_SERIAL
60b09bf723SIgor Grinberg #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
61b09bf723SIgor Grinberg #define CONFIG_SYS_NS16550_CLK		48000000	/* 48MHz (APLL96/2) */
62b09bf723SIgor Grinberg 
63b09bf723SIgor Grinberg /*
64b09bf723SIgor Grinberg  * select serial console configuration
65b09bf723SIgor Grinberg  */
66b09bf723SIgor Grinberg #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
67b09bf723SIgor Grinberg 
68b09bf723SIgor Grinberg /* allow to overwrite serial and ethaddr */
69b09bf723SIgor Grinberg #define CONFIG_ENV_OVERWRITE
70b09bf723SIgor Grinberg #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
71b09bf723SIgor Grinberg 					115200}
72b09bf723SIgor Grinberg 
73011f5c13SIgor Grinberg /* USB */
74011f5c13SIgor Grinberg 
75011f5c13SIgor Grinberg #ifndef CONFIG_USB_MUSB_AM35X
76011f5c13SIgor Grinberg #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
77011f5c13SIgor Grinberg #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
78011f5c13SIgor Grinberg #endif /* CONFIG_USB_MUSB_AM35X */
79011f5c13SIgor Grinberg 
80b09bf723SIgor Grinberg /* commands to include */
81b09bf723SIgor Grinberg 
82b09bf723SIgor Grinberg #define CONFIG_SYS_I2C
83b09bf723SIgor Grinberg #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
84b09bf723SIgor Grinberg #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
85b09bf723SIgor Grinberg #define CONFIG_SYS_I2C_EEPROM_BUS	0
86b09bf723SIgor Grinberg #define CONFIG_I2C_MULTI_BUS
87b09bf723SIgor Grinberg 
88b09bf723SIgor Grinberg /*
89b09bf723SIgor Grinberg  * Board NAND Info.
90b09bf723SIgor Grinberg  */
91b09bf723SIgor Grinberg #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
92b09bf723SIgor Grinberg 							/* to access nand at */
93b09bf723SIgor Grinberg 							/* CS0 */
94b09bf723SIgor Grinberg #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
95b09bf723SIgor Grinberg 							/* devices */
96b09bf723SIgor Grinberg 
97b09bf723SIgor Grinberg /* Environment information */
98b09bf723SIgor Grinberg #define CONFIG_EXTRA_ENV_SETTINGS \
99b09bf723SIgor Grinberg 	"loadaddr=0x82000000\0" \
100b09bf723SIgor Grinberg 	"baudrate=115200\0" \
101b09bf723SIgor Grinberg 	"console=ttyO2,115200n8\0" \
102e093d0b2SDmitry Lifshitz 	"netretry=yes\0" \
103b09bf723SIgor Grinberg 	"mpurate=auto\0" \
104b09bf723SIgor Grinberg 	"vram=12M\0" \
105b09bf723SIgor Grinberg 	"dvimode=1024x768MR-16@60\0" \
106b09bf723SIgor Grinberg 	"defaultdisplay=dvi\0" \
107b09bf723SIgor Grinberg 	"mmcdev=0\0" \
108b09bf723SIgor Grinberg 	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
109b09bf723SIgor Grinberg 	"mmcrootfstype=ext4\0" \
110b09bf723SIgor Grinberg 	"nandroot=/dev/mtdblock4 rw\0" \
111b09bf723SIgor Grinberg 	"nandrootfstype=ubifs\0" \
112b09bf723SIgor Grinberg 	"mmcargs=setenv bootargs console=${console} " \
113b09bf723SIgor Grinberg 		"mpurate=${mpurate} " \
114b09bf723SIgor Grinberg 		"vram=${vram} " \
115b09bf723SIgor Grinberg 		"omapfb.mode=dvi:${dvimode} " \
116b09bf723SIgor Grinberg 		"omapdss.def_disp=${defaultdisplay} " \
117b09bf723SIgor Grinberg 		"root=${mmcroot} " \
118b09bf723SIgor Grinberg 		"rootfstype=${mmcrootfstype}\0" \
119b09bf723SIgor Grinberg 	"nandargs=setenv bootargs console=${console} " \
120b09bf723SIgor Grinberg 		"mpurate=${mpurate} " \
121b09bf723SIgor Grinberg 		"vram=${vram} " \
122b09bf723SIgor Grinberg 		"omapfb.mode=dvi:${dvimode} " \
123b09bf723SIgor Grinberg 		"omapdss.def_disp=${defaultdisplay} " \
124b09bf723SIgor Grinberg 		"root=${nandroot} " \
125b09bf723SIgor Grinberg 		"rootfstype=${nandrootfstype}\0" \
126b09bf723SIgor Grinberg 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
127b09bf723SIgor Grinberg 	"bootscript=echo Running bootscript from mmc ...; " \
128b09bf723SIgor Grinberg 		"source ${loadaddr}\0" \
129b09bf723SIgor Grinberg 	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
130b09bf723SIgor Grinberg 	"mmcboot=echo Booting from mmc ...; " \
131b09bf723SIgor Grinberg 		"run mmcargs; " \
132b09bf723SIgor Grinberg 		"bootm ${loadaddr}\0" \
133b09bf723SIgor Grinberg 	"nandboot=echo Booting from nand ...; " \
134b09bf723SIgor Grinberg 		"run nandargs; " \
135b09bf723SIgor Grinberg 		"nand read ${loadaddr} 2a0000 400000; " \
136b09bf723SIgor Grinberg 		"bootm ${loadaddr}\0" \
137b09bf723SIgor Grinberg 
138b09bf723SIgor Grinberg #define CONFIG_BOOTCOMMAND \
139b09bf723SIgor Grinberg 	"mmc dev ${mmcdev}; if mmc rescan; then " \
140b09bf723SIgor Grinberg 		"if run loadbootscript; then " \
141b09bf723SIgor Grinberg 			"run bootscript; " \
142b09bf723SIgor Grinberg 		"else " \
143b09bf723SIgor Grinberg 			"if run loaduimage; then " \
144b09bf723SIgor Grinberg 				"run mmcboot; " \
145b09bf723SIgor Grinberg 			"else run nandboot; " \
146b09bf723SIgor Grinberg 			"fi; " \
147b09bf723SIgor Grinberg 		"fi; " \
148b09bf723SIgor Grinberg 	"else run nandboot; fi"
149b09bf723SIgor Grinberg 
150b09bf723SIgor Grinberg /*
151b09bf723SIgor Grinberg  * Miscellaneous configurable options
152b09bf723SIgor Grinberg  */
153b09bf723SIgor Grinberg #define CONFIG_TIMESTAMP
154b09bf723SIgor Grinberg #define CONFIG_SYS_AUTOLOAD		"no"
155b09bf723SIgor Grinberg #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
156b09bf723SIgor Grinberg #define CONFIG_SYS_MAXARGS		32	/* max number of command args */
157b09bf723SIgor Grinberg 
158b09bf723SIgor Grinberg #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0 + 0x02000000)
159b09bf723SIgor Grinberg 
160b09bf723SIgor Grinberg /*
161b09bf723SIgor Grinberg  * AM3517 has 12 GP timers, they can be driven by the system clock
162b09bf723SIgor Grinberg  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
163b09bf723SIgor Grinberg  * This rate is divided by a local divisor.
164b09bf723SIgor Grinberg  */
165b09bf723SIgor Grinberg #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
166b09bf723SIgor Grinberg #define CONFIG_SYS_PTV			2       /* Divisor: 2^(PTV+1) => 8 */
167b09bf723SIgor Grinberg #define CONFIG_SYS_HZ			1000
168b09bf723SIgor Grinberg 
169b09bf723SIgor Grinberg /*-----------------------------------------------------------------------
170b09bf723SIgor Grinberg  * Physical Memory Map
171b09bf723SIgor Grinberg  */
172b09bf723SIgor Grinberg #define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
173b09bf723SIgor Grinberg #define CONFIG_SYS_CS0_SIZE		(256 << 20)
174b09bf723SIgor Grinberg 
175b09bf723SIgor Grinberg /*-----------------------------------------------------------------------
176b09bf723SIgor Grinberg  * FLASH and environment organization
177b09bf723SIgor Grinberg  */
178b09bf723SIgor Grinberg 
179b09bf723SIgor Grinberg /* **** PISMO SUPPORT *** */
180b09bf723SIgor Grinberg /* Monitor at start of flash */
181b09bf723SIgor Grinberg #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
182b09bf723SIgor Grinberg #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
183b09bf723SIgor Grinberg 
1847672d9d5SAdam Ford #define CONFIG_ENV_OFFSET		0x260000
1857672d9d5SAdam Ford #define CONFIG_ENV_ADDR			0x260000
186b09bf723SIgor Grinberg 
187a8a78c74SIgor Grinberg #if defined(CONFIG_CMD_NET)
188a8a78c74SIgor Grinberg #define CONFIG_DRIVER_TI_EMAC_USE_RMII
189e093d0b2SDmitry Lifshitz #define CONFIG_ARP_TIMEOUT		200UL
190e093d0b2SDmitry Lifshitz #define CONFIG_NET_RETRY_COUNT		5
191a8a78c74SIgor Grinberg #endif /* CONFIG_CMD_NET */
192a8a78c74SIgor Grinberg 
193b09bf723SIgor Grinberg /* additions for new relocation code, must be added to all boards */
194b09bf723SIgor Grinberg #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
195b09bf723SIgor Grinberg #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
196b09bf723SIgor Grinberg #define CONFIG_SYS_INIT_RAM_SIZE	0x800
197b09bf723SIgor Grinberg #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR +	\
198b09bf723SIgor Grinberg 					 CONFIG_SYS_INIT_RAM_SIZE -	\
199b09bf723SIgor Grinberg 					 GENERATED_GBL_DATA_SIZE)
200b09bf723SIgor Grinberg 
201b09bf723SIgor Grinberg /* Status LED */
202b09bf723SIgor Grinberg #define GREEN_LED_GPIO			186 /* CM-T3517 Green LED is GPIO186 */
203b09bf723SIgor Grinberg 
20440bbd52aSIgor Grinberg /* Display Configuration */
20540bbd52aSIgor Grinberg #define LCD_BPP		LCD_COLOR16
20640bbd52aSIgor Grinberg 
20740bbd52aSIgor Grinberg #define CONFIG_SPLASH_SCREEN
20840bbd52aSIgor Grinberg #define CONFIG_SPLASHIMAGE_GUARD
20940bbd52aSIgor Grinberg #define CONFIG_BMP_16BPP
21040bbd52aSIgor Grinberg #define CONFIG_SCF0403_LCD
21140bbd52aSIgor Grinberg 
21219a90ed6SNikita Kiryanov /* EEPROM */
21319a90ed6SNikita Kiryanov #define CONFIG_ENV_EEPROM_IS_ON_I2C
21419a90ed6SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
21519a90ed6SNikita Kiryanov #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
21619a90ed6SNikita Kiryanov #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
21719a90ed6SNikita Kiryanov #define CONFIG_SYS_EEPROM_SIZE			256
21819a90ed6SNikita Kiryanov 
219b09bf723SIgor Grinberg #endif /* __CONFIG_H */
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