1 /* 2 * Config file for Compulab CM-T335 board 3 * 4 * Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/ 5 * 6 * Author: Ilya Ledvich <ilya@compulab.co.il> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_CM_T335_H 12 #define __CONFIG_CM_T335_H 13 14 #define CONFIG_CM_T335 15 16 #include <configs/ti_am335x_common.h> 17 18 #undef CONFIG_SPI 19 20 #undef CONFIG_MAX_RAM_BANK_SIZE 21 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* 512MB */ 22 23 #define CONFIG_MACH_TYPE MACH_TYPE_CM_T335 24 25 /* Clock Defines */ 26 #define V_OSCK 25000000 /* Clock output from T2 */ 27 #define V_SCLK (V_OSCK) 28 29 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ 30 31 #ifndef CONFIG_SPL_BUILD 32 #define MMCARGS \ 33 "mmcdev=0\0" \ 34 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 35 "mmcrootfstype=ext4\0" \ 36 "mmcargs=setenv bootargs console=${console} " \ 37 "root=${mmcroot} " \ 38 "rootfstype=${mmcrootfstype}\0" \ 39 "mmcboot=echo Booting from mmc ...; " \ 40 "run mmcargs; " \ 41 "bootm ${loadaddr}\0" 42 43 #define NANDARGS \ 44 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ 45 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ 46 "nandroot=ubi0:rootfs rw\0" \ 47 "nandrootfstype=ubifs\0" \ 48 "nandargs=setenv bootargs console=${console} " \ 49 "root=${nandroot} " \ 50 "rootfstype=${nandrootfstype} " \ 51 "ubi.mtd=${rootfs_name}\0" \ 52 "nandboot=echo Booting from nand ...; " \ 53 "run nandargs; " \ 54 "nboot ${loadaddr} nand0 900000; " \ 55 "bootm ${loadaddr}\0" 56 57 #define CONFIG_EXTRA_ENV_SETTINGS \ 58 "loadaddr=82000000\0" \ 59 "console=ttyO0,115200n8\0" \ 60 "rootfs_name=rootfs\0" \ 61 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 62 "bootscript=echo Running bootscript from mmc ...; " \ 63 "source ${loadaddr}\0" \ 64 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 65 MMCARGS \ 66 NANDARGS 67 68 #define CONFIG_BOOTCOMMAND \ 69 "mmc dev ${mmcdev}; if mmc rescan; then " \ 70 "if run loadbootscript; then " \ 71 "run bootscript; " \ 72 "else " \ 73 "if run loaduimage; then " \ 74 "run mmcboot; " \ 75 "else run nandboot; " \ 76 "fi; " \ 77 "fi; " \ 78 "else run nandboot; fi" 79 #endif /* CONFIG_SPL_BUILD */ 80 81 #define CONFIG_TIMESTAMP 82 #define CONFIG_SYS_AUTOLOAD "no" 83 84 /* Serial console configuration */ 85 #define CONFIG_SERIAL1 1 /* UART0 */ 86 87 /* NS16550 Configuration */ 88 #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ 89 #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ 90 91 /* I2C Configuration */ 92 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ 93 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 94 #define CONFIG_SYS_I2C_EEPROM_BUS 0 95 96 /* SPL */ 97 98 /* Network. */ 99 #define CONFIG_PHY_ATHEROS 100 101 /* NAND support */ 102 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 103 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 104 CONFIG_SYS_NAND_PAGE_SIZE) 105 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 106 #define CONFIG_SYS_NAND_OOBSIZE 64 107 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 108 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 109 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 110 10, 11, 12, 13, 14, 15, 16, 17, \ 111 18, 19, 20, 21, 22, 23, 24, 25, \ 112 26, 27, 28, 29, 30, 31, 32, 33, \ 113 34, 35, 36, 37, 38, 39, 40, 41, \ 114 42, 43, 44, 45, 46, 47, 48, 49, \ 115 50, 51, 52, 53, 54, 55, 56, 57, } 116 117 #define CONFIG_SYS_NAND_ECCSIZE 512 118 #define CONFIG_SYS_NAND_ECCBYTES 14 119 120 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 121 122 #undef CONFIG_SYS_NAND_U_BOOT_OFFS 123 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 124 125 #define CONFIG_ENV_OFFSET 0x300000 /* environment starts here */ 126 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 127 #define CONFIG_SYS_NAND_ONFI_DETECTION 128 #ifdef CONFIG_SPL_OS_BOOT 129 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000 130 #endif 131 132 /* GPIO pin + bank to pin ID mapping */ 133 #define GPIO_PIN(_bank, _pin) ((_bank << 5) + _pin) 134 135 /* Status LED */ 136 /* Status LED polarity is inversed, so init it in the "off" state */ 137 138 /* EEPROM */ 139 #define CONFIG_ENV_EEPROM_IS_ON_I2C 140 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 141 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 142 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 143 #define CONFIG_SYS_EEPROM_SIZE 256 144 145 #ifndef CONFIG_SPL_BUILD 146 /* 147 * Enable PCA9555 at I2C0-0x26. 148 * First select the I2C0 bus with "i2c dev 0", then use "pca953x" command. 149 */ 150 #define CONFIG_PCA953X 151 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x26 152 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x26, 16} } 153 #endif /* CONFIG_SPL_BUILD */ 154 155 #endif /* __CONFIG_CM_T335_H */ 156 157