1 /* 2 * Config file for Compulab CM-FX6 board 3 * 4 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ 5 * 6 * Author: Nikita Kiryanov <nikita@compulab.co.il> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_CM_FX6_H 12 #define __CONFIG_CM_FX6_H 13 14 #include "mx6_common.h" 15 16 #ifndef CONFIG_SPL_BUILD 17 #include <config_distro_defaults.h> 18 #endif 19 20 /* Machine config */ 21 #define CONFIG_SYS_LITTLE_ENDIAN 22 #define CONFIG_MACH_TYPE 4273 23 24 /* MMC */ 25 #define CONFIG_SYS_FSL_USDHC_NUM 3 26 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 27 28 /* RAM */ 29 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR 30 #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR 31 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 32 #define CONFIG_NR_DRAM_BANKS 2 33 #define CONFIG_SYS_MEMTEST_START 0x10000000 34 #define CONFIG_SYS_MEMTEST_END 0x10010000 35 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 36 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 37 #define CONFIG_SYS_INIT_SP_OFFSET \ 38 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 39 #define CONFIG_SYS_INIT_SP_ADDR \ 40 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 41 42 /* Serial console */ 43 #define CONFIG_MXC_UART 44 #define CONFIG_MXC_UART_BASE UART4_BASE 45 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 46 47 /* SPI flash */ 48 #define CONFIG_SF_DEFAULT_BUS 0 49 #define CONFIG_SF_DEFAULT_CS 0 50 #define CONFIG_SF_DEFAULT_SPEED 25000000 51 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 52 53 /* MTD support */ 54 #ifndef CONFIG_SPL_BUILD 55 #define CONFIG_MTD_DEVICE 56 #define CONFIG_MTD_PARTITIONS 57 #define CONFIG_SPI_FLASH_MTD 58 #endif 59 60 /* Environment */ 61 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 62 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 63 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 64 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 65 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 66 #define CONFIG_ENV_SIZE (8 * 1024) 67 #define CONFIG_ENV_OFFSET (768 * 1024) 68 69 #ifndef CONFIG_SPL_BUILD 70 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 71 #define CONFIG_EXTRA_ENV_SETTINGS \ 72 "fdt_high=0xffffffff\0" \ 73 "initrd_high=0xffffffff\0" \ 74 "fdt_addr_r=0x18000000\0" \ 75 "ramdisk_addr_r=0x13000000\0" \ 76 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 77 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 78 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ 79 "stdin=serial,usbkbd\0" \ 80 "stdout=serial,vga\0" \ 81 "stderr=serial,vga\0" \ 82 "panel=HDMI\0" \ 83 "autoload=no\0" \ 84 "uImage=uImage-cm-fx6\0" \ 85 "zImage=zImage-cm-fx6\0" \ 86 "kernel=uImage-cm-fx6\0" \ 87 "dtb=cm-fx6.dtb\0" \ 88 "console=ttymxc3,115200\0" \ 89 "ethprime=FEC0\0" \ 90 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ 91 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ 92 "doboot=bootm ${kernel_addr_r}\0" \ 93 "doloadfdt=false\0" \ 94 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ 95 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ 96 "setboottypez=setenv kernel ${zImage};" \ 97 "setenv doboot bootz ${kernel_addr_r} - ${fdt_addr_r};" \ 98 "setenv doloadfdt true;\0" \ 99 "setboottypem=setenv kernel ${uImage};" \ 100 "setenv doboot bootm ${kernel_addr_r};" \ 101 "setenv doloadfdt false;\0"\ 102 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 103 "sataroot=/dev/sda2 rw rootwait\0" \ 104 "nandroot=/dev/mtdblock4 rw\0" \ 105 "nandrootfstype=ubifs\0" \ 106 "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \ 107 "${video} ${extrabootargs}\0" \ 108 "sataargs=setenv bootargs console=${console} root=${sataroot} " \ 109 "${video} ${extrabootargs}\0" \ 110 "nandargs=setenv bootargs console=${console} " \ 111 "root=${nandroot} " \ 112 "rootfstype=${nandrootfstype} " \ 113 "${video} ${extrabootargs}\0" \ 114 "nandboot=if run nandloadkernel; then " \ 115 "run nandloadfdt;" \ 116 "run setboottypem;" \ 117 "run storagebootcmd;" \ 118 "run setboottypez;" \ 119 "run storagebootcmd;" \ 120 "fi;\0" \ 121 "run_eboot=echo Starting EBOOT ...; "\ 122 "mmc dev 2 && " \ 123 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ 124 "loadkernel=load ${storagetype} ${storagedev} ${kernel_addr_r} ${kernel};\0"\ 125 "loadfdt=load ${storagetype} ${storagedev} ${fdt_addr_r} ${dtb};\0" \ 126 "nandloadkernel=nand read ${kernel_addr_r} 0 780000;\0" \ 127 "nandloadfdt=nand read ${fdt_addr_r} 780000 80000;\0" \ 128 "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \ 129 "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \ 130 "setupnandboot=setenv storagetype nand;\0" \ 131 "storagebootcmd=echo Booting from ${storagetype} ...;" \ 132 "run ${storagetype}args; run doboot;\0" \ 133 "trybootk=if run loadkernel; then " \ 134 "if ${doloadfdt}; then " \ 135 "run loadfdt;" \ 136 "fi;" \ 137 "run storagebootcmd;" \ 138 "fi;\0" \ 139 "trybootsmz=" \ 140 "run setboottypem;" \ 141 "run trybootk;" \ 142 "run setboottypez;" \ 143 "run trybootk;\0" \ 144 "legacy_bootcmd=" \ 145 "run setupmmcboot;" \ 146 "mmc dev ${storagedev};" \ 147 "if mmc rescan; then " \ 148 "run trybootsmz;" \ 149 "fi;" \ 150 "run setupsataboot;" \ 151 "if sata init; then " \ 152 "run trybootsmz;" \ 153 "fi;" \ 154 "run setupnandboot;" \ 155 "run nandboot;\0" \ 156 BOOTENV 157 158 #define CONFIG_PREBOOT "usb start;sf probe" 159 160 #define BOOT_TARGET_DEVICES(func) \ 161 func(USB, usb, 0) \ 162 func(MMC, mmc, 2) \ 163 func(SATA, sata, 0) 164 165 #include <config_distro_bootcmd.h> 166 #else 167 #define CONFIG_EXTRA_ENV_SETTINGS 168 #endif 169 170 /* SPI */ 171 #define CONFIG_SPI 172 #define CONFIG_MXC_SPI 173 174 /* NAND */ 175 #ifndef CONFIG_SPL_BUILD 176 #define CONFIG_SYS_NAND_BASE 0x40000000 177 #define CONFIG_SYS_NAND_MAX_CHIPS 1 178 #define CONFIG_SYS_MAX_NAND_DEVICE 1 179 #define CONFIG_NAND_MXS 180 #define CONFIG_SYS_NAND_ONFI_DETECTION 181 /* APBH DMA is required for NAND support */ 182 #define CONFIG_APBH_DMA 183 #define CONFIG_APBH_DMA_BURST 184 #define CONFIG_APBH_DMA_BURST8 185 #endif 186 187 /* Ethernet */ 188 #define CONFIG_FEC_MXC 189 #define CONFIG_FEC_MXC_PHYADDR 0 190 #define CONFIG_FEC_XCV_TYPE RGMII 191 #define IMX_FEC_BASE ENET_BASE_ADDR 192 #define CONFIG_PHY_ATHEROS 193 #define CONFIG_MII 194 #define CONFIG_ETHPRIME "FEC0" 195 #define CONFIG_ARP_TIMEOUT 200UL 196 #define CONFIG_NET_RETRY_COUNT 5 197 198 /* USB */ 199 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 200 #define CONFIG_MXC_USB_FLAGS 0 201 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 202 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 203 204 /* I2C */ 205 #define CONFIG_SYS_I2C 206 #define CONFIG_SYS_I2C_MXC 207 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 208 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 209 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 210 #define CONFIG_SYS_I2C_SPEED 100000 211 #define CONFIG_SYS_MXC_I2C3_SPEED 400000 212 213 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 214 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 215 #define CONFIG_SYS_I2C_EEPROM_BUS 2 216 217 /* SATA */ 218 #define CONFIG_SYS_SATA_MAX_DEVICE 1 219 #define CONFIG_LBA48 220 #define CONFIG_DWC_AHSATA_PORT_ID 0 221 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 222 223 /* Boot */ 224 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) 225 #define CONFIG_SERIAL_TAG 226 227 /* misc */ 228 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 229 #define CONFIG_MISC_INIT_R 230 231 /* SPL */ 232 #include "imx6_spl.h" 233 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 234 #define CONFIG_SPL_SPI_LOAD 235 236 /* Display */ 237 #define CONFIG_VIDEO_IPUV3 238 #define CONFIG_IMX_HDMI 239 240 #define CONFIG_SPLASH_SCREEN 241 #define CONFIG_SPLASH_SOURCE 242 #define CONFIG_VIDEO_BMP_RLE8 243 244 #define CONFIG_VIDEO_LOGO 245 #define CONFIG_VIDEO_BMP_LOGO 246 247 /* EEPROM */ 248 #define CONFIG_ENV_EEPROM_IS_ON_I2C 249 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 250 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 251 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 252 #define CONFIG_SYS_EEPROM_SIZE 256 253 254 #endif /* __CONFIG_CM_FX6_H */ 255