1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2e32028a7SNikita Kiryanov /* 3e32028a7SNikita Kiryanov * Config file for Compulab CM-FX6 board 4e32028a7SNikita Kiryanov * 5e32028a7SNikita Kiryanov * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ 6e32028a7SNikita Kiryanov * 7e32028a7SNikita Kiryanov * Author: Nikita Kiryanov <nikita@compulab.co.il> 8e32028a7SNikita Kiryanov */ 9e32028a7SNikita Kiryanov 10e32028a7SNikita Kiryanov #ifndef __CONFIG_CM_FX6_H 11e32028a7SNikita Kiryanov #define __CONFIG_CM_FX6_H 12e32028a7SNikita Kiryanov 13e32028a7SNikita Kiryanov #include "mx6_common.h" 14e32028a7SNikita Kiryanov 15e32028a7SNikita Kiryanov /* Machine config */ 16e32028a7SNikita Kiryanov #define CONFIG_SYS_LITTLE_ENDIAN 17e32028a7SNikita Kiryanov #define CONFIG_MACH_TYPE 4273 18e32028a7SNikita Kiryanov 19e32028a7SNikita Kiryanov /* MMC */ 20e32028a7SNikita Kiryanov #define CONFIG_SYS_FSL_USDHC_NUM 3 21e32028a7SNikita Kiryanov #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 22e32028a7SNikita Kiryanov 23e32028a7SNikita Kiryanov /* RAM */ 24e32028a7SNikita Kiryanov #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR 25e32028a7SNikita Kiryanov #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR 26e32028a7SNikita Kiryanov #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 27e32028a7SNikita Kiryanov #define CONFIG_NR_DRAM_BANKS 2 28e32028a7SNikita Kiryanov #define CONFIG_SYS_MEMTEST_START 0x10000000 29e32028a7SNikita Kiryanov #define CONFIG_SYS_MEMTEST_END 0x10010000 30e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 31e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 32e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_SP_OFFSET \ 33e32028a7SNikita Kiryanov (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 34e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_SP_ADDR \ 35e32028a7SNikita Kiryanov (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 36e32028a7SNikita Kiryanov 37e32028a7SNikita Kiryanov /* Serial console */ 38e32028a7SNikita Kiryanov #define CONFIG_MXC_UART 39e32028a7SNikita Kiryanov #define CONFIG_MXC_UART_BASE UART4_BASE 40e32028a7SNikita Kiryanov #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 41e32028a7SNikita Kiryanov 42e32028a7SNikita Kiryanov /* SPI flash */ 43e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_BUS 0 44e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_CS 0 45e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_SPEED 25000000 46e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 47e32028a7SNikita Kiryanov 4863a93093SChristopher Spinrath /* MTD support */ 4963a93093SChristopher Spinrath #ifndef CONFIG_SPL_BUILD 5063a93093SChristopher Spinrath #define CONFIG_MTD_DEVICE 5163a93093SChristopher Spinrath #define CONFIG_MTD_PARTITIONS 5263a93093SChristopher Spinrath #define CONFIG_SPI_FLASH_MTD 5363a93093SChristopher Spinrath #endif 5463a93093SChristopher Spinrath 55e32028a7SNikita Kiryanov /* Environment */ 56e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 57e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 58e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 59e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 60e32028a7SNikita Kiryanov #define CONFIG_ENV_SECT_SIZE (64 * 1024) 61e32028a7SNikita Kiryanov #define CONFIG_ENV_SIZE (8 * 1024) 62e32028a7SNikita Kiryanov #define CONFIG_ENV_OFFSET (768 * 1024) 63e32028a7SNikita Kiryanov 643ef5f671SChristopher Spinrath #ifndef CONFIG_SPL_BUILD 65e32028a7SNikita Kiryanov #define CONFIG_EXTRA_ENV_SETTINGS \ 666b79f71cSChristopher Spinrath "fdt_high=0xffffffff\0" \ 676b79f71cSChristopher Spinrath "initrd_high=0xffffffff\0" \ 686b79f71cSChristopher Spinrath "fdt_addr_r=0x18000000\0" \ 696b79f71cSChristopher Spinrath "ramdisk_addr_r=0x13000000\0" \ 706b79f71cSChristopher Spinrath "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 716b79f71cSChristopher Spinrath "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 726b79f71cSChristopher Spinrath "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ 73edc57f1dSChristopher Spinrath "fdtfile=undefined\0" \ 741c2e5292SNikita Kiryanov "stdin=serial,usbkbd\0" \ 75deb94d61SNikita Kiryanov "stdout=serial,vga\0" \ 76deb94d61SNikita Kiryanov "stderr=serial,vga\0" \ 77deb94d61SNikita Kiryanov "panel=HDMI\0" \ 78e32028a7SNikita Kiryanov "autoload=no\0" \ 79f0f6724fSChristopher Spinrath "uImage=uImage-cm-fx6\0" \ 80f0f6724fSChristopher Spinrath "zImage=zImage-cm-fx6\0" \ 81508a6edeSNikita Kiryanov "kernel=uImage-cm-fx6\0" \ 82508a6edeSNikita Kiryanov "dtb=cm-fx6.dtb\0" \ 83e32028a7SNikita Kiryanov "console=ttymxc3,115200\0" \ 84e32028a7SNikita Kiryanov "ethprime=FEC0\0" \ 85e32028a7SNikita Kiryanov "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ 86e32028a7SNikita Kiryanov "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ 876b79f71cSChristopher Spinrath "doboot=bootm ${kernel_addr_r}\0" \ 88508a6edeSNikita Kiryanov "doloadfdt=false\0" \ 8943ede0bcSTom Rini "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ 9043ede0bcSTom Rini "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ 91f0f6724fSChristopher Spinrath "setboottypez=setenv kernel ${zImage};" \ 926b79f71cSChristopher Spinrath "setenv doboot bootz ${kernel_addr_r} - ${fdt_addr_r};" \ 93508a6edeSNikita Kiryanov "setenv doloadfdt true;\0" \ 94f0f6724fSChristopher Spinrath "setboottypem=setenv kernel ${uImage};" \ 956b79f71cSChristopher Spinrath "setenv doboot bootm ${kernel_addr_r};" \ 96508a6edeSNikita Kiryanov "setenv doloadfdt false;\0"\ 97e32028a7SNikita Kiryanov "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 98206f38f7SNikita Kiryanov "sataroot=/dev/sda2 rw rootwait\0" \ 99a6b0652bSNikita Kiryanov "nandroot=/dev/mtdblock4 rw\0" \ 100a6b0652bSNikita Kiryanov "nandrootfstype=ubifs\0" \ 101508a6edeSNikita Kiryanov "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \ 102f0f6724fSChristopher Spinrath "${video} ${extrabootargs}\0" \ 103508a6edeSNikita Kiryanov "sataargs=setenv bootargs console=${console} root=${sataroot} " \ 104f0f6724fSChristopher Spinrath "${video} ${extrabootargs}\0" \ 105a6b0652bSNikita Kiryanov "nandargs=setenv bootargs console=${console} " \ 106a6b0652bSNikita Kiryanov "root=${nandroot} " \ 107a6b0652bSNikita Kiryanov "rootfstype=${nandrootfstype} " \ 108f0f6724fSChristopher Spinrath "${video} ${extrabootargs}\0" \ 109508a6edeSNikita Kiryanov "nandboot=if run nandloadkernel; then " \ 110a6b0652bSNikita Kiryanov "run nandloadfdt;" \ 111508a6edeSNikita Kiryanov "run setboottypem;" \ 112508a6edeSNikita Kiryanov "run storagebootcmd;" \ 113508a6edeSNikita Kiryanov "run setboottypez;" \ 114508a6edeSNikita Kiryanov "run storagebootcmd;" \ 115508a6edeSNikita Kiryanov "fi;\0" \ 116508a6edeSNikita Kiryanov "run_eboot=echo Starting EBOOT ...; "\ 117508a6edeSNikita Kiryanov "mmc dev 2 && " \ 118508a6edeSNikita Kiryanov "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ 1196b79f71cSChristopher Spinrath "loadkernel=load ${storagetype} ${storagedev} ${kernel_addr_r} ${kernel};\0"\ 1206b79f71cSChristopher Spinrath "loadfdt=load ${storagetype} ${storagedev} ${fdt_addr_r} ${dtb};\0" \ 1216b79f71cSChristopher Spinrath "nandloadkernel=nand read ${kernel_addr_r} 0 780000;\0" \ 1226b79f71cSChristopher Spinrath "nandloadfdt=nand read ${fdt_addr_r} 780000 80000;\0" \ 123508a6edeSNikita Kiryanov "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \ 124508a6edeSNikita Kiryanov "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \ 125508a6edeSNikita Kiryanov "setupnandboot=setenv storagetype nand;\0" \ 126508a6edeSNikita Kiryanov "storagebootcmd=echo Booting from ${storagetype} ...;" \ 127508a6edeSNikita Kiryanov "run ${storagetype}args; run doboot;\0" \ 128508a6edeSNikita Kiryanov "trybootk=if run loadkernel; then " \ 129508a6edeSNikita Kiryanov "if ${doloadfdt}; then " \ 130508a6edeSNikita Kiryanov "run loadfdt;" \ 131a6b0652bSNikita Kiryanov "fi;" \ 132508a6edeSNikita Kiryanov "run storagebootcmd;" \ 133508a6edeSNikita Kiryanov "fi;\0" \ 1345a6440caSChristopher Spinrath "trybootsmz=" \ 135508a6edeSNikita Kiryanov "run setboottypem;" \ 136508a6edeSNikita Kiryanov "run trybootk;" \ 137508a6edeSNikita Kiryanov "run setboottypez;" \ 1383ef5f671SChristopher Spinrath "run trybootk;\0" \ 1393ef5f671SChristopher Spinrath "legacy_bootcmd=" \ 140508a6edeSNikita Kiryanov "run setupmmcboot;" \ 141508a6edeSNikita Kiryanov "mmc dev ${storagedev};" \ 142508a6edeSNikita Kiryanov "if mmc rescan; then " \ 143508a6edeSNikita Kiryanov "run trybootsmz;" \ 144508a6edeSNikita Kiryanov "fi;" \ 145508a6edeSNikita Kiryanov "run setupsataboot;" \ 146508a6edeSNikita Kiryanov "if sata init; then " \ 147508a6edeSNikita Kiryanov "run trybootsmz;" \ 148508a6edeSNikita Kiryanov "fi;" \ 149508a6edeSNikita Kiryanov "run setupnandboot;" \ 1503ef5f671SChristopher Spinrath "run nandboot;\0" \ 151edc57f1dSChristopher Spinrath "findfdt="\ 152edc57f1dSChristopher Spinrath "if test $board_name = Utilite && test $board_rev = MX6Q ; then " \ 153edc57f1dSChristopher Spinrath "setenv fdtfile imx6q-utilite-pro.dtb; fi; " \ 154edc57f1dSChristopher Spinrath "if test $fdtfile = undefined; then " \ 155edc57f1dSChristopher Spinrath "echo WARNING: Could not determine dtb to use; fi; \0" \ 1563ef5f671SChristopher Spinrath BOOTENV 157e32028a7SNikita Kiryanov 15863a93093SChristopher Spinrath #define CONFIG_PREBOOT "usb start;sf probe" 1591c2e5292SNikita Kiryanov 1603ef5f671SChristopher Spinrath #define BOOT_TARGET_DEVICES(func) \ 1613ef5f671SChristopher Spinrath func(USB, usb, 0) \ 1623ef5f671SChristopher Spinrath func(MMC, mmc, 2) \ 1633ef5f671SChristopher Spinrath func(SATA, sata, 0) 1643ef5f671SChristopher Spinrath 1653ef5f671SChristopher Spinrath #include <config_distro_bootcmd.h> 1663ef5f671SChristopher Spinrath #else 1673ef5f671SChristopher Spinrath #define CONFIG_EXTRA_ENV_SETTINGS 1683ef5f671SChristopher Spinrath #endif 1693ef5f671SChristopher Spinrath 170a6b0652bSNikita Kiryanov /* NAND */ 171a6b0652bSNikita Kiryanov #ifndef CONFIG_SPL_BUILD 172a6b0652bSNikita Kiryanov #define CONFIG_SYS_NAND_BASE 0x40000000 173a6b0652bSNikita Kiryanov #define CONFIG_SYS_NAND_MAX_CHIPS 1 174a6b0652bSNikita Kiryanov #define CONFIG_SYS_MAX_NAND_DEVICE 1 175a6b0652bSNikita Kiryanov #define CONFIG_SYS_NAND_ONFI_DETECTION 176a6b0652bSNikita Kiryanov /* APBH DMA is required for NAND support */ 177a6b0652bSNikita Kiryanov #endif 178a6b0652bSNikita Kiryanov 17902b1343eSNikita Kiryanov /* Ethernet */ 18002b1343eSNikita Kiryanov #define CONFIG_FEC_MXC 18102b1343eSNikita Kiryanov #define CONFIG_FEC_MXC_PHYADDR 0 18202b1343eSNikita Kiryanov #define CONFIG_FEC_XCV_TYPE RGMII 18302b1343eSNikita Kiryanov #define IMX_FEC_BASE ENET_BASE_ADDR 18402b1343eSNikita Kiryanov #define CONFIG_PHY_ATHEROS 18502b1343eSNikita Kiryanov #define CONFIG_MII 18602b1343eSNikita Kiryanov #define CONFIG_ETHPRIME "FEC0" 18702b1343eSNikita Kiryanov #define CONFIG_ARP_TIMEOUT 200UL 18802b1343eSNikita Kiryanov #define CONFIG_NET_RETRY_COUNT 5 18902b1343eSNikita Kiryanov 1900f3effb9SNikita Kiryanov /* USB */ 1910f3effb9SNikita Kiryanov #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 1920f3effb9SNikita Kiryanov #define CONFIG_MXC_USB_FLAGS 0 1930f3effb9SNikita Kiryanov #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 1940f3effb9SNikita Kiryanov #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 1950f3effb9SNikita Kiryanov 196f42b2f60SNikita Kiryanov /* I2C */ 197f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C 198f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_MXC 19903544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 20003544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 201f8cb101eSYork Sun #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 202f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_SPEED 100000 203f42b2f60SNikita Kiryanov #define CONFIG_SYS_MXC_I2C3_SPEED 400000 204f42b2f60SNikita Kiryanov 205f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 206f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 207f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_BUS 2 208f42b2f60SNikita Kiryanov 209206f38f7SNikita Kiryanov /* SATA */ 210206f38f7SNikita Kiryanov #define CONFIG_SYS_SATA_MAX_DEVICE 1 211206f38f7SNikita Kiryanov #define CONFIG_LBA48 212206f38f7SNikita Kiryanov #define CONFIG_DWC_AHSATA_PORT_ID 0 213206f38f7SNikita Kiryanov #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 214206f38f7SNikita Kiryanov 215e32028a7SNikita Kiryanov /* Boot */ 216e32028a7SNikita Kiryanov #define CONFIG_SYS_BOOTMAPSZ (8 << 20) 217f66113c0SNikita Kiryanov #define CONFIG_SERIAL_TAG 218e32028a7SNikita Kiryanov 219e32028a7SNikita Kiryanov /* misc */ 2209fbdcf01SNikita Kiryanov #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 2217d1abb7dSNikita Kiryanov #define CONFIG_MISC_INIT_R 222e32028a7SNikita Kiryanov 223e32028a7SNikita Kiryanov /* SPL */ 224e32028a7SNikita Kiryanov #include "imx6_spl.h" 225e32028a7SNikita Kiryanov #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 226e32028a7SNikita Kiryanov 227deb94d61SNikita Kiryanov /* Display */ 228deb94d61SNikita Kiryanov #define CONFIG_VIDEO_IPUV3 229deb94d61SNikita Kiryanov #define CONFIG_IMX_HDMI 230deb94d61SNikita Kiryanov 2313a236a35SNikita Kiryanov #define CONFIG_SPLASH_SCREEN 232f82eb2faSNikita Kiryanov #define CONFIG_SPLASH_SOURCE 2333a236a35SNikita Kiryanov #define CONFIG_VIDEO_BMP_RLE8 2343a236a35SNikita Kiryanov 2358015dde8SNikita Kiryanov #define CONFIG_VIDEO_LOGO 2368015dde8SNikita Kiryanov #define CONFIG_VIDEO_BMP_LOGO 2378015dde8SNikita Kiryanov 23812616531SNikita Kiryanov /* EEPROM */ 23912616531SNikita Kiryanov #define CONFIG_ENV_EEPROM_IS_ON_I2C 24012616531SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 24112616531SNikita Kiryanov #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 24212616531SNikita Kiryanov #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 24312616531SNikita Kiryanov #define CONFIG_SYS_EEPROM_SIZE 256 24412616531SNikita Kiryanov 245e32028a7SNikita Kiryanov #endif /* __CONFIG_CM_FX6_H */ 246