1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0 */ 2bb1e7cdeSTom Warren /* 3bb1e7cdeSTom Warren * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. 4bb1e7cdeSTom Warren */ 5bb1e7cdeSTom Warren 6bb1e7cdeSTom Warren #ifndef __CONFIG_H 7bb1e7cdeSTom Warren #define __CONFIG_H 8bb1e7cdeSTom Warren 91ace4022SAlexey Brodkin #include <linux/sizes.h> 10bb1e7cdeSTom Warren 11bb1e7cdeSTom Warren #include "tegra30-common.h" 12bb1e7cdeSTom Warren 132364e151SStephen Warren /* VDD core PMIC */ 142364e151SStephen Warren #define CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 152364e151SStephen Warren 16bb1e7cdeSTom Warren /* High-level configuration options */ 17bb1e7cdeSTom Warren #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Cardhu" 18bb1e7cdeSTom Warren 19b9b53a60SStephen Warren #define BOARD_EXTRA_ENV_SETTINGS \ 20b9b53a60SStephen Warren "board_name=cardhu-a04\0" \ 21b9b53a60SStephen Warren "fdtfile=tegra30-cardhu-a04.dtb\0" 22b9b53a60SStephen Warren 23bb1e7cdeSTom Warren /* Board-specific serial config */ 24bb1e7cdeSTom Warren #define CONFIG_TEGRA_ENABLE_UARTA 25bb1e7cdeSTom Warren #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE 26bb1e7cdeSTom Warren 2794ba26f2STom Rini #define CONFIG_MACH_TYPE MACH_TYPE_CARDHU 2894ba26f2STom Rini 29ca557b38STom Warren /* Environment in eMMC, at the end of 2nd "boot sector" */ 3091171091SStephen Warren #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) 31ca557b38STom Warren #define CONFIG_SYS_MMC_ENV_DEV 0 32ca557b38STom Warren #define CONFIG_SYS_MMC_ENV_PART 2 33bb1e7cdeSTom Warren 34d2f18f26SAllen Martin /* SPI */ 35d2f18f26SAllen Martin #define CONFIG_TEGRA_SLINK_CTRLS 6 36d2f18f26SAllen Martin #define CONFIG_SPI_FLASH_SIZE (4 << 20) 37d2f18f26SAllen Martin 38bb1e7cdeSTom Warren #include "tegra-common-post.h" 39bb1e7cdeSTom Warren 40bb1e7cdeSTom Warren #endif /* __CONFIG_H */ 41