183d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2f7fa2f37SBo Shen /* 3f7fa2f37SBo Shen * Copyright (C) 2012 Atmel Corporation 4f7fa2f37SBo Shen * 5f7fa2f37SBo Shen * Configuation settings for the AT91SAM9X5EK board. 6f7fa2f37SBo Shen */ 7f7fa2f37SBo Shen 8f7fa2f37SBo Shen #ifndef __CONFIG_H__ 9f7fa2f37SBo Shen #define __CONFIG_H__ 10f7fa2f37SBo Shen 11f7fa2f37SBo Shen /* ARM asynchronous clock */ 12f7fa2f37SBo Shen #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 13f7fa2f37SBo Shen #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ 14f7fa2f37SBo Shen 15f7fa2f37SBo Shen #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 16f7fa2f37SBo Shen #define CONFIG_SETUP_MEMORY_TAGS 17f7fa2f37SBo Shen #define CONFIG_INITRD_TAG 18f7fa2f37SBo Shen #define CONFIG_SKIP_LOWLEVEL_INIT 19f7fa2f37SBo Shen 20f7fa2f37SBo Shen /* general purpose I/O */ 21f7fa2f37SBo Shen #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 22f7fa2f37SBo Shen 23f7fa2f37SBo Shen /* 24f7fa2f37SBo Shen * BOOTP options 25f7fa2f37SBo Shen */ 26f7fa2f37SBo Shen #define CONFIG_BOOTP_BOOTFILESIZE 27f7fa2f37SBo Shen 28f7fa2f37SBo Shen /* 298850c5d5STom Rini * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) 30b030e731SRichard Genoud * NB: in this case, USB 1.1 devices won't be recognized. 31b030e731SRichard Genoud */ 32b030e731SRichard Genoud 33f7fa2f37SBo Shen /* SDRAM */ 34f7fa2f37SBo Shen #define CONFIG_SYS_SDRAM_BASE 0x20000000 35f7fa2f37SBo Shen #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ 36f7fa2f37SBo Shen 37f7fa2f37SBo Shen #define CONFIG_SYS_INIT_SP_ADDR \ 3874631b69SWenyou Yang (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) 39f7fa2f37SBo Shen 40f7fa2f37SBo Shen /* DataFlash */ 41f7fa2f37SBo Shen 42f7fa2f37SBo Shen /* NAND flash */ 43f7fa2f37SBo Shen #ifdef CONFIG_CMD_NAND 44f7fa2f37SBo Shen #define CONFIG_SYS_MAX_NAND_DEVICE 1 45f7fa2f37SBo Shen #define CONFIG_SYS_NAND_BASE 0x40000000 46f7fa2f37SBo Shen #define CONFIG_SYS_NAND_DBW_8 1 47f7fa2f37SBo Shen /* our ALE is AD21 */ 48f7fa2f37SBo Shen #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 49f7fa2f37SBo Shen /* our CLE is AD22 */ 50f7fa2f37SBo Shen #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 51f7fa2f37SBo Shen #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 52f7fa2f37SBo Shen #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 538f1a80e9STom Rini #endif 548f1a80e9STom Rini 55b030e731SRichard Genoud /* USB */ 56b030e731SRichard Genoud #ifdef CONFIG_CMD_USB 578850c5d5STom Rini #ifndef CONFIG_USB_EHCI_HCD 58dcd2f1a0SBo Shen #define CONFIG_USB_ATMEL 59dcd2f1a0SBo Shen #define CONFIG_USB_ATMEL_CLK_SEL_UPLL 60b030e731SRichard Genoud #define CONFIG_USB_OHCI_NEW 61b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_CPU_INIT 62b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 63b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5" 64b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 65b030e731SRichard Genoud #endif 66b030e731SRichard Genoud #endif 67b030e731SRichard Genoud 68f7fa2f37SBo Shen #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 69f7fa2f37SBo Shen 70f7fa2f37SBo Shen #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 71f7fa2f37SBo Shen #define CONFIG_SYS_MEMTEST_END 0x26e00000 72f7fa2f37SBo Shen 735541543fSWenyou Yang #ifdef CONFIG_NAND_BOOT 74f7fa2f37SBo Shen /* bootstrap + u-boot + env + linux in nandflash */ 757b8b19fbSNicolas Ferre #define CONFIG_ENV_OFFSET 0x140000 76f7fa2f37SBo Shen #define CONFIG_ENV_OFFSET_REDUND 0x100000 77f7fa2f37SBo Shen #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 78f7fa2f37SBo Shen #define CONFIG_BOOTCOMMAND "nand read " \ 79*6b4dba48SEugen.Hristev@microchip.com "0x22000000 0x200000 0x600000; " \ 80*6b4dba48SEugen.Hristev@microchip.com "nand read 0x21000000 0x180000 0x20000; " \ 81*6b4dba48SEugen.Hristev@microchip.com "bootz 0x22000000 - 0x21000000" 825541543fSWenyou Yang #elif defined(CONFIG_SPI_BOOT) 831d7442e6SBo Shen /* bootstrap + u-boot + env + linux in spi flash */ 841d7442e6SBo Shen #define CONFIG_ENV_OFFSET 0x5000 851d7442e6SBo Shen #define CONFIG_ENV_SIZE 0x3000 861d7442e6SBo Shen #define CONFIG_ENV_SECT_SIZE 0x1000 871d7442e6SBo Shen #define CONFIG_BOOTCOMMAND "sf probe 0; " \ 881d7442e6SBo Shen "sf read 0x22000000 0x100000 0x300000; " \ 891d7442e6SBo Shen "bootm 0x22000000" 90961ffc77SBo Shen #elif defined(CONFIG_SYS_USE_DATAFLASH) 91961ffc77SBo Shen /* bootstrap + u-boot + env + linux in data flash */ 92961ffc77SBo Shen #define CONFIG_ENV_OFFSET 0x4200 93961ffc77SBo Shen #define CONFIG_ENV_SIZE 0x4200 94961ffc77SBo Shen #define CONFIG_ENV_SECT_SIZE 0x210 95961ffc77SBo Shen #define CONFIG_BOOTCOMMAND "sf probe 0; " \ 96961ffc77SBo Shen "sf read 0x22000000 0x84000 0x294000; " \ 97961ffc77SBo Shen "bootm 0x22000000" 985541543fSWenyou Yang #else /* CONFIG_SD_BOOT */ 99b7e3129eSWu, Josh /* bootstrap + u-boot + env + linux in mmc */ 10026961772SWu, Josh #define CONFIG_ENV_SIZE 0x4000 101f7fa2f37SBo Shen #endif 102f7fa2f37SBo Shen 103f7fa2f37SBo Shen /* 104f7fa2f37SBo Shen * Size of malloc() pool 105f7fa2f37SBo Shen */ 106f7fa2f37SBo Shen #define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) 107f7fa2f37SBo Shen 108d85e8914SBo Shen /* SPL */ 109d85e8914SBo Shen #define CONFIG_SPL_TEXT_BASE 0x300000 110d85e8914SBo Shen #define CONFIG_SPL_MAX_SIZE 0x6000 111d85e8914SBo Shen #define CONFIG_SPL_STACK 0x308000 112d85e8914SBo Shen 113d85e8914SBo Shen #define CONFIG_SPL_BSS_START_ADDR 0x20000000 114d85e8914SBo Shen #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 115d85e8914SBo Shen #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 116d85e8914SBo Shen #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 117d85e8914SBo Shen 118d85e8914SBo Shen #define CONFIG_SYS_MONITOR_LEN (512 << 10) 119d85e8914SBo Shen 120d85e8914SBo Shen #define CONFIG_SYS_MASTER_CLOCK 132096000 121d85e8914SBo Shen #define CONFIG_SYS_AT91_PLLA 0x20c73f03 122d85e8914SBo Shen #define CONFIG_SYS_MCKR 0x1301 123d85e8914SBo Shen #define CONFIG_SYS_MCKR_CSS 0x1302 124d85e8914SBo Shen 1255541543fSWenyou Yang #ifdef CONFIG_SD_BOOT 126d85e8914SBo Shen #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 127d85e8914SBo Shen #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 128d85e8914SBo Shen 1295541543fSWenyou Yang #elif CONFIG_SPI_BOOT 1305541543fSWenyou Yang #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400 1315541543fSWenyou Yang 1325541543fSWenyou Yang #elif CONFIG_NAND_BOOT 133d85e8914SBo Shen #define CONFIG_SPL_NAND_DRIVERS 134d85e8914SBo Shen #define CONFIG_SPL_NAND_BASE 1355541543fSWenyou Yang #endif 136d85e8914SBo Shen #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 137d85e8914SBo Shen #define CONFIG_SYS_NAND_5_ADDR_CYCLE 138d85e8914SBo Shen #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 139d85e8914SBo Shen #define CONFIG_SYS_NAND_PAGE_COUNT 64 140d85e8914SBo Shen #define CONFIG_SYS_NAND_OOBSIZE 64 141d85e8914SBo Shen #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 142d85e8914SBo Shen #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 143d85e8914SBo Shen 144f7fa2f37SBo Shen #endif 145