1 /* 2 * (C) Copyright 2013 Atmel Corporation. 3 * Josh Wu <josh.wu@atmel.com> 4 * 5 * Configuation settings for the AT91SAM9N12-EK boards. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __AT91SAM9N12_CONFIG_H_ 11 #define __AT91SAM9N12_CONFIG_H_ 12 13 /* 14 * SoC must be defined first, before hardware.h is included. 15 * In this case SoC is defined in boards.cfg. 16 */ 17 #include <asm/hardware.h> 18 19 #define CONFIG_SYS_TEXT_BASE 0x26f00000 20 21 /* ARM asynchronous clock */ 22 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 23 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */ 24 25 /* Misc CPU related */ 26 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 27 #define CONFIG_SETUP_MEMORY_TAGS 28 #define CONFIG_INITRD_TAG 29 #define CONFIG_SKIP_LOWLEVEL_INIT 30 31 /* general purpose I/O */ 32 #define CONFIG_AT91_GPIO 33 34 /* serial console */ 35 #define CONFIG_ATMEL_USART 36 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 37 #define CONFIG_USART_ID ATMEL_ID_SYS 38 #define CONFIG_BAUDRATE 115200 39 40 /* LCD */ 41 #define LCD_BPP LCD_COLOR16 42 #define LCD_OUTPUT_BPP 24 43 #define CONFIG_LCD_LOGO 44 #define CONFIG_LCD_INFO 45 #define CONFIG_LCD_INFO_BELOW_LOGO 46 #define CONFIG_SYS_WHITE_ON_BLACK 47 #define CONFIG_ATMEL_HLCD 48 #define CONFIG_ATMEL_LCD_RGB565 49 50 51 /* 52 * BOOTP options 53 */ 54 #define CONFIG_BOOTP_BOOTFILESIZE 55 #define CONFIG_BOOTP_BOOTPATH 56 #define CONFIG_BOOTP_GATEWAY 57 #define CONFIG_BOOTP_HOSTNAME 58 59 /* NOR flash - no real flash on this board */ 60 #define CONFIG_SYS_NO_FLASH 61 62 /* 63 * Command line configuration. 64 */ 65 #define CONFIG_CMD_NAND 66 67 #define CONFIG_NR_DRAM_BANKS 1 68 #define CONFIG_SYS_SDRAM_BASE 0x20000000 69 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 70 71 /* 72 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 73 * leaving the correct space for initial global data structure above 74 * that address while providing maximum stack area below. 75 */ 76 # define CONFIG_SYS_INIT_SP_ADDR \ 77 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE) 78 79 /* DataFlash */ 80 #ifdef CONFIG_CMD_SF 81 #define CONFIG_ATMEL_SPI 82 #define CONFIG_SF_DEFAULT_SPEED 30000000 83 #define CONFIG_ENV_SPI_MODE SPI_MODE_3 84 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 85 #endif 86 87 /* NAND flash */ 88 #ifdef CONFIG_CMD_NAND 89 #define CONFIG_NAND_ATMEL 90 #define CONFIG_SYS_MAX_NAND_DEVICE 1 91 #define CONFIG_SYS_NAND_BASE 0x40000000 92 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 93 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 94 #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4) 95 #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5) 96 97 /* PMECC & PMERRLOC */ 98 #define CONFIG_ATMEL_NAND_HWECC 99 #define CONFIG_ATMEL_NAND_HW_PMECC 100 #define CONFIG_PMECC_CAP 2 101 #define CONFIG_PMECC_SECTOR_SIZE 512 102 #define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000 103 104 #define CONFIG_CMD_NAND_TRIMFFS 105 106 #endif 107 108 #define CONFIG_MTD_PARTITIONS 109 #define CONFIG_MTD_DEVICE 110 #define CONFIG_CMD_MTDPARTS 111 #define MTDIDS_DEFAULT "nand0=atmel_nand" 112 #define MTDPARTS_DEFAULT \ 113 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 114 "256k(env),256k(env_redundant),256k(spare)," \ 115 "512k(dtb),6M(kernel)ro,-(rootfs)" 116 117 #define CONFIG_EXTRA_ENV_SETTINGS \ 118 "console=console=ttyS0,115200\0" \ 119 "mtdparts="MTDPARTS_DEFAULT"\0" \ 120 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\ 121 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0" 122 123 /* MMC */ 124 #ifdef CONFIG_CMD_MMC 125 #define CONFIG_GENERIC_MMC 126 #define CONFIG_GENERIC_ATMEL_MCI 127 #endif 128 129 /* Ethernet */ 130 #define CONFIG_KS8851_MLL 131 #define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */ 132 133 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 134 135 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 136 #define CONFIG_SYS_MEMTEST_END 0x26e00000 137 138 /* USB host */ 139 #ifdef CONFIG_CMD_USB 140 #define CONFIG_USB_ATMEL 141 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 142 #define CONFIG_USB_OHCI_NEW 143 #define CONFIG_SYS_USB_OHCI_CPU_INIT 144 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 145 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12" 146 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 147 #endif 148 149 #ifdef CONFIG_SYS_USE_SPIFLASH 150 151 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 152 #define CONFIG_ENV_IS_IN_SPI_FLASH 153 #define CONFIG_ENV_OFFSET 0x5000 154 #define CONFIG_ENV_SIZE 0x3000 155 #define CONFIG_ENV_SECT_SIZE 0x1000 156 #define CONFIG_BOOTCOMMAND \ 157 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \ 158 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \ 159 "bootm 0x22000000" 160 161 #elif defined(CONFIG_SYS_USE_NANDFLASH) 162 163 /* bootstrap + u-boot + env + linux in nandflash */ 164 #define CONFIG_ENV_IS_IN_NAND 165 #define CONFIG_ENV_OFFSET 0xc0000 166 #define CONFIG_ENV_OFFSET_REDUND 0x100000 167 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 168 #define CONFIG_BOOTCOMMAND \ 169 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \ 170 "nand read 0x21000000 0x180000 0x080000;" \ 171 "nand read 0x22000000 0x200000 0x400000;" \ 172 "bootm 0x22000000 - 0x21000000" 173 174 #else /* CONFIG_SYS_USE_MMC */ 175 176 /* bootstrap + u-boot + env + linux in mmc */ 177 178 #ifdef CONFIG_ENV_IS_IN_MMC 179 /* Use raw reserved sectors to save environment */ 180 #define CONFIG_ENV_OFFSET 0x2000 181 #define CONFIG_ENV_SIZE 0x1000 182 #define CONFIG_SYS_MMC_ENV_DEV 0 183 #else 184 /* Use file in FAT file to save environment */ 185 #define CONFIG_ENV_IS_IN_FAT 186 #define CONFIG_FAT_WRITE 187 #define FAT_ENV_INTERFACE "mmc" 188 #define FAT_ENV_FILE "uboot.env" 189 #define FAT_ENV_DEVICE_AND_PART "0" 190 #define CONFIG_ENV_SIZE 0x4000 191 #endif 192 193 #define CONFIG_BOOTCOMMAND \ 194 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \ 195 "fatload mmc 0:1 0x21000000 dtb;" \ 196 "fatload mmc 0:1 0x22000000 uImage;" \ 197 "bootm 0x22000000 - 0x21000000" 198 199 #endif 200 201 #define CONFIG_SYS_CBSIZE 256 202 #define CONFIG_SYS_MAXARGS 16 203 #define CONFIG_SYS_LONGHELP 204 #define CONFIG_CMDLINE_EDITING 205 #define CONFIG_AUTO_COMPLETE 206 207 /* 208 * Size of malloc() pool 209 */ 210 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 211 212 /* SPL */ 213 #define CONFIG_SPL_FRAMEWORK 214 #define CONFIG_SPL_TEXT_BASE 0x300000 215 #define CONFIG_SPL_MAX_SIZE 0x6000 216 #define CONFIG_SPL_STACK 0x308000 217 218 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 219 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 220 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 221 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 222 223 #define CONFIG_SPL_BOARD_INIT 224 #define CONFIG_SYS_MONITOR_LEN (512 << 10) 225 226 #define CONFIG_SYS_MASTER_CLOCK 132096000 227 #define CONFIG_SYS_AT91_PLLA 0x20953f03 228 #define CONFIG_SYS_MCKR 0x1301 229 #define CONFIG_SYS_MCKR_CSS 0x1302 230 231 #ifdef CONFIG_SYS_USE_MMC 232 #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds 233 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 234 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 235 236 #elif CONFIG_SYS_USE_NANDFLASH 237 #define CONFIG_SPL_NAND_DRIVERS 238 #define CONFIG_SPL_NAND_BASE 239 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 240 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 241 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 242 #define CONFIG_SYS_NAND_PAGE_COUNT 64 243 #define CONFIG_SYS_NAND_OOBSIZE 64 244 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 245 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 246 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER 247 248 #elif CONFIG_SYS_USE_SPIFLASH 249 #define CONFIG_SPL_SPI_LOAD 250 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400 251 252 #endif 253 254 #endif 255