1cb82a532SUlf Samuelsson /* 2cb82a532SUlf Samuelsson * Ulf Samuelsson <ulf@atmel.com> 3cb82a532SUlf Samuelsson * Rick Bronson <rick@efn.org> 4cb82a532SUlf Samuelsson * 5cb82a532SUlf Samuelsson * Configuration settings for the AT91RM9200EK board. 6cb82a532SUlf Samuelsson * 7cb82a532SUlf Samuelsson * See file CREDITS for list of people who contributed to this 8cb82a532SUlf Samuelsson * project. 9cb82a532SUlf Samuelsson * 10cb82a532SUlf Samuelsson * This program is free software; you can redistribute it and/or 11cb82a532SUlf Samuelsson * modify it under the terms of the GNU General Public License as 12cb82a532SUlf Samuelsson * published by the Free Software Foundation; either version 2 of 13cb82a532SUlf Samuelsson * the License, or (at your option) any later version. 14cb82a532SUlf Samuelsson * 15cb82a532SUlf Samuelsson * This program is distributed in the hope that it will be useful, 16cb82a532SUlf Samuelsson * but WITHOUT ANY WARRANTY; without even the implied warranty of 17cb82a532SUlf Samuelsson * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18cb82a532SUlf Samuelsson * GNU General Public License for more details. 19cb82a532SUlf Samuelsson * 20cb82a532SUlf Samuelsson * You should have received a copy of the GNU General Public License 21cb82a532SUlf Samuelsson * along with this program; if not, write to the Free Software 22cb82a532SUlf Samuelsson * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23cb82a532SUlf Samuelsson * MA 02111-1307 USA 24cb82a532SUlf Samuelsson */ 25cb82a532SUlf Samuelsson 26cb82a532SUlf Samuelsson #ifndef __CONFIG_H 27cb82a532SUlf Samuelsson #define __CONFIG_H 28cb82a532SUlf Samuelsson 29cb82a532SUlf Samuelsson /* ARM asynchronous clock */ 30cb82a532SUlf Samuelsson /* 31cb82a532SUlf Samuelsson * from 18.432 MHz crystal 32cb82a532SUlf Samuelsson * (18432000 / 4 * 39) 33cb82a532SUlf Samuelsson */ 34cb82a532SUlf Samuelsson #define AT91C_MAIN_CLOCK 179712000 35cb82a532SUlf Samuelsson /* 36cb82a532SUlf Samuelsson * peripheral clock 37cb82a532SUlf Samuelsson * (AT91C_MASTER_CLOCK / 3) 38cb82a532SUlf Samuelsson */ 39cb82a532SUlf Samuelsson #define AT91C_MASTER_CLOCK 59904000 40cb82a532SUlf Samuelsson 41cb82a532SUlf Samuelsson #define AT91_SLOW_CLOCK 32768 /* slow clock */ 42cb82a532SUlf Samuelsson 43cb82a532SUlf Samuelsson #define CONFIG_ARM920T 1 /* This is an ARM920T Core */ 44cb82a532SUlf Samuelsson #define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */ 45cb82a532SUlf Samuelsson #define CONFIG_AT91RM9200EK 1 /* on an AT91RM9200EK Board */ 46cb82a532SUlf Samuelsson #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ 47cb82a532SUlf Samuelsson #define USE_920T_MMU 1 48cb82a532SUlf Samuelsson 49cb82a532SUlf Samuelsson #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 50cb82a532SUlf Samuelsson #define CONFIG_SETUP_MEMORY_TAGS 1 51cb82a532SUlf Samuelsson #define CONFIG_INITRD_TAG 1 52cb82a532SUlf Samuelsson 53cb82a532SUlf Samuelsson /* 54cb82a532SUlf Samuelsson * LowLevel Init 55cb82a532SUlf Samuelsson */ 56cb82a532SUlf Samuelsson #ifndef CONFIG_SKIP_LOWLEVEL_INIT 57cb82a532SUlf Samuelsson #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 58cb82a532SUlf Samuelsson /* flash */ 59cb82a532SUlf Samuelsson #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 60cb82a532SUlf Samuelsson #define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ 61cb82a532SUlf Samuelsson 62cb82a532SUlf Samuelsson /* clocks */ 63cb82a532SUlf Samuelsson #define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ 64cb82a532SUlf Samuelsson #define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ 65cb82a532SUlf Samuelsson /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */ 66cb82a532SUlf Samuelsson #define CONFIG_SYS_MCKR_VAL 0x00000202 67cb82a532SUlf Samuelsson 68cb82a532SUlf Samuelsson /* sdram */ 69cb82a532SUlf Samuelsson #define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ 70cb82a532SUlf Samuelsson #define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 71cb82a532SUlf Samuelsson #define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 72cb82a532SUlf Samuelsson #define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ 73cb82a532SUlf Samuelsson #define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */ 74cb82a532SUlf Samuelsson #define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ 75cb82a532SUlf Samuelsson #define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */ 76cb82a532SUlf Samuelsson #define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ 77cb82a532SUlf Samuelsson #define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ 78cb82a532SUlf Samuelsson #define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ 79cb82a532SUlf Samuelsson #define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ 80cb82a532SUlf Samuelsson #define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ 81cb82a532SUlf Samuelsson #define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ 82cb82a532SUlf Samuelsson #else 83cb82a532SUlf Samuelsson #define CONFIG_SKIP_RELOCATE_UBOOT 84cb82a532SUlf Samuelsson #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ 85cb82a532SUlf Samuelsson 86cb82a532SUlf Samuelsson /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */ 87cb82a532SUlf Samuelsson #define CONFIG_SYS_AT91C_BRGR_DIVISOR 33 88cb82a532SUlf Samuelsson 89cb82a532SUlf Samuelsson /* 90cb82a532SUlf Samuelsson * Memory Configuration 91cb82a532SUlf Samuelsson */ 92cb82a532SUlf Samuelsson #define CONFIG_NR_DRAM_BANKS 1 93cb82a532SUlf Samuelsson #define PHYS_SDRAM 0x20000000 94cb82a532SUlf Samuelsson #define PHYS_SDRAM_SIZE 0x02000000 /* 32 megs */ 95cb82a532SUlf Samuelsson 96cb82a532SUlf Samuelsson #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 97cb82a532SUlf Samuelsson #define CONFIG_SYS_MEMTEST_END \ 98cb82a532SUlf Samuelsson (CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144) 99cb82a532SUlf Samuelsson 100cb82a532SUlf Samuelsson /* 101cb82a532SUlf Samuelsson * Hardware drivers 102cb82a532SUlf Samuelsson */ 103cb82a532SUlf Samuelsson 104cb82a532SUlf Samuelsson /* 105cb82a532SUlf Samuelsson * UART Configuration 106cb82a532SUlf Samuelsson * 107cb82a532SUlf Samuelsson * define one of these to choose the DBGU, 108cb82a532SUlf Samuelsson * USART0 or USART1 as console 109cb82a532SUlf Samuelsson */ 110beebd851SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_AT91RM9200_USART 111cb82a532SUlf Samuelsson #define CONFIG_DBGU 112cb82a532SUlf Samuelsson #undef CONFIG_USART0 113cb82a532SUlf Samuelsson #undef CONFIG_USART1 114cb82a532SUlf Samuelsson /* don't include RTS/CTS flow control support */ 115cb82a532SUlf Samuelsson #undef CONFIG_HWFLOW 116cb82a532SUlf Samuelsson /* disable modem initialization stuff */ 117cb82a532SUlf Samuelsson #undef CONFIG_MODEM_SUPPORT 118cb82a532SUlf Samuelsson 119cb82a532SUlf Samuelsson #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } 120cb82a532SUlf Samuelsson #define CONFIG_BAUDRATE 115200 121cb82a532SUlf Samuelsson 122cb82a532SUlf Samuelsson /* 123cb82a532SUlf Samuelsson * Command line configuration. 124cb82a532SUlf Samuelsson */ 125cb82a532SUlf Samuelsson #include <config_cmd_default.h> 126cb82a532SUlf Samuelsson 127cb82a532SUlf Samuelsson #define CONFIG_CMD_DHCP 128cb82a532SUlf Samuelsson #define CONFIG_CMD_FAT 129cb82a532SUlf Samuelsson #define CONFIG_CMD_MII 130cb82a532SUlf Samuelsson #define CONFIG_CMD_PING 131cb82a532SUlf Samuelsson 132cb82a532SUlf Samuelsson #undef CONFIG_CMD_BDI 133cb82a532SUlf Samuelsson #undef CONFIG_CMD_IMI 134cb82a532SUlf Samuelsson #undef CONFIG_CMD_FPGA 135cb82a532SUlf Samuelsson #undef CONFIG_CMD_MISC 136cb82a532SUlf Samuelsson #undef CONFIG_CMD_LOADS 137cb82a532SUlf Samuelsson 138cb82a532SUlf Samuelsson #include <asm/arch/AT91RM9200.h> /* needed for port definitions */ 139cb82a532SUlf Samuelsson /* Options for MMC/SD Card */ 140cb82a532SUlf Samuelsson #define CONFIG_DOS_PARTITION 1 141cb82a532SUlf Samuelsson #undef CONFIG_MMC 142cb82a532SUlf Samuelsson #define CONFIG_SYS_MMC_BASE 0xFFFB4000 143cb82a532SUlf Samuelsson #define CONFIG_SYS_MMC_BLOCKSIZE 512 144cb82a532SUlf Samuelsson 145cb82a532SUlf Samuelsson /* 146cb82a532SUlf Samuelsson * Network Driver Setting 147cb82a532SUlf Samuelsson */ 148*c041e9d2SJens Scharsig #define CONFIG_NET_MULTI 1 149*c041e9d2SJens Scharsig #ifdef CONFIG_NET_MULTI 150*c041e9d2SJens Scharsig #define CONFIG_DRIVER_AT91EMAC 1 151*c041e9d2SJens Scharsig #define CONFIG_SYS_RX_ETH_BUFFER 8 152*c041e9d2SJens Scharsig #else 153*c041e9d2SJens Scharsig #define CONFIG_DRIVER_ETHER 1 154*c041e9d2SJens Scharsig #endif 155cb82a532SUlf Samuelsson #define CONFIG_NET_RETRY_COUNT 20 156cb82a532SUlf Samuelsson #define CONFIG_AT91C_USE_RMII 157cb82a532SUlf Samuelsson 158cb82a532SUlf Samuelsson /* 159cb82a532SUlf Samuelsson * AC Characteristics 160cb82a532SUlf Samuelsson * DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns 161cb82a532SUlf Samuelsson */ 162cb82a532SUlf Samuelsson #define DATAFLASH_TCSS (0xC << 16) 163cb82a532SUlf Samuelsson #define DATAFLASH_TCHS (0x1 << 24) 164cb82a532SUlf Samuelsson 165cb82a532SUlf Samuelsson #if defined(CONFIG_HAS_DATAFLASH) 166cb82a532SUlf Samuelsson #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) 167cb82a532SUlf Samuelsson #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 168cb82a532SUlf Samuelsson #define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384 169cb82a532SUlf Samuelsson /* Logical adress for CS0 */ 170cb82a532SUlf Samuelsson #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 171cb82a532SUlf Samuelsson /* Logical adress for CS3 */ 172cb82a532SUlf Samuelsson #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 173cb82a532SUlf Samuelsson #define CONFIG_SYS_SUPPORT_BLOCK_ERASE 1 174cb82a532SUlf Samuelsson #define CONFIG_SYS_DATAFLASH_MMC_PIO AT91C_PIO_PB22 175cb82a532SUlf Samuelsson #endif 176cb82a532SUlf Samuelsson 177cb82a532SUlf Samuelsson /* 178cb82a532SUlf Samuelsson * NOR Flash 179cb82a532SUlf Samuelsson */ 180cb82a532SUlf Samuelsson #define CONFIG_SYS_FLASH_BASE 0x10000000 181cb82a532SUlf Samuelsson #define PHYS_FLASH_SIZE 0x800000 /* 8MB */ 182cb82a532SUlf Samuelsson #define CONFIG_SYS_FLASH_CFI 1 183cb82a532SUlf Samuelsson #define CONFIG_FLASH_CFI_DRIVER 1 184cb82a532SUlf Samuelsson #define CONFIG_SYS_MAX_FLASH_BANKS 1 185cb82a532SUlf Samuelsson #define CONFIG_SYS_MAX_FLASH_SECT 256 186cb82a532SUlf Samuelsson #define CONFIG_SYS_FLASH_PROTECTION 187cb82a532SUlf Samuelsson 188cb82a532SUlf Samuelsson /* 189cb82a532SUlf Samuelsson * Environment Settings 190cb82a532SUlf Samuelsson */ 191cb82a532SUlf Samuelsson #ifdef CONFIG_ENV_IS_IN_DATAFLASH 192cb82a532SUlf Samuelsson /* 193cb82a532SUlf Samuelsson * Datasflash Environment Settings 194cb82a532SUlf Samuelsson */ 195cb82a532SUlf Samuelsson #define CONFIG_ENV_OFFSET 0x4200 196cb82a532SUlf Samuelsson #define CONFIG_ENV_ADDR \ 197cb82a532SUlf Samuelsson (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) 198cb82a532SUlf Samuelsson /* 8 * 1056 really , but start.s is not OK with this*/ 199cb82a532SUlf Samuelsson #define CONFIG_ENV_SIZE 0x2000 200cb82a532SUlf Samuelsson 201cb82a532SUlf Samuelsson #else 202cb82a532SUlf Samuelsson /* 203cb82a532SUlf Samuelsson * NOR Flash Environment Settings 204cb82a532SUlf Samuelsson */ 205cb82a532SUlf Samuelsson #define CONFIG_ENV_IS_IN_FLASH 1 206cb82a532SUlf Samuelsson 207cb82a532SUlf Samuelsson #ifdef CONFIG_SKIP_LOWLEVEL_INIT 208cb82a532SUlf Samuelsson /* 209cb82a532SUlf Samuelsson * between boot.bin and u-boot.bin.gz 210cb82a532SUlf Samuelsson */ 211cb82a532SUlf Samuelsson #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0xe000) 212cb82a532SUlf Samuelsson #define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */ 213cb82a532SUlf Samuelsson #else 214cb82a532SUlf Samuelsson /* 215cb82a532SUlf Samuelsson * after u-boot.bin 216cb82a532SUlf Samuelsson */ 217cb82a532SUlf Samuelsson #define CONFIG_ENV_ADDR \ 218cb82a532SUlf Samuelsson (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 219cb82a532SUlf Samuelsson #define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */ 220cb82a532SUlf Samuelsson /* The following #defines are needed to get flash environment right */ 221cb82a532SUlf Samuelsson #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 222cb82a532SUlf Samuelsson #define CONFIG_SYS_MONITOR_LEN \ 223cb82a532SUlf Samuelsson (CONFIG_SYS_BOOT_SIZE + CONFIG_SYS_U_BOOT_SIZE) 224cb82a532SUlf Samuelsson #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ 225cb82a532SUlf Samuelsson 226cb82a532SUlf Samuelsson #endif /* CONFIG_ENV_IS_IN_DATAFLASH */ 227cb82a532SUlf Samuelsson 228cb82a532SUlf Samuelsson /* 229cb82a532SUlf Samuelsson * Boot option 230cb82a532SUlf Samuelsson */ 231cb82a532SUlf Samuelsson #define CONFIG_BOOTDELAY 3 232cb82a532SUlf Samuelsson 233cb82a532SUlf Samuelsson #ifdef CONFIG_SKIP_LOWLEVEL_INIT 234cb82a532SUlf Samuelsson /* boot.bin, env, u-boot.bin.gz */ 235cb82a532SUlf Samuelsson #define CONFIG_SYS_BOOT_SIZE 0x6000 /* 24 KBytes */ 236cb82a532SUlf Samuelsson #define CONFIG_SYS_U_BOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x10000) 237cb82a532SUlf Samuelsson #define CONFIG_SYS_U_BOOT_SIZE 0x10000 /* 64 KBytes */ 238cb82a532SUlf Samuelsson #else 239cb82a532SUlf Samuelsson /* u-boot.bin */ 240cb82a532SUlf Samuelsson #define CONFIG_SYS_BOOT_SIZE 0x0 /* 0 KBytes */ 241cb82a532SUlf Samuelsson #define CONFIG_SYS_U_BOOT_BASE CONFIG_SYS_FLASH_BASE 242cb82a532SUlf Samuelsson #define CONFIG_SYS_U_BOOT_SIZE 0x40000 /* 128 KBytes */ 243cb82a532SUlf Samuelsson #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ 244cb82a532SUlf Samuelsson 245cb82a532SUlf Samuelsson #define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */ 246cb82a532SUlf Samuelsson #define CONFIG_ENV_OVERWRITE 1 247cb82a532SUlf Samuelsson 248cb82a532SUlf Samuelsson /* 249cb82a532SUlf Samuelsson * USB Config 250cb82a532SUlf Samuelsson */ 251cb82a532SUlf Samuelsson #define CONFIG_CMD_USB 252cb82a532SUlf Samuelsson #define CONFIG_USB_OHCI_NEW 1 253cb82a532SUlf Samuelsson #define CONFIG_USB_KEYBOARD 1 254cb82a532SUlf Samuelsson #define CONFIG_USB_STORAGE 1 255cb82a532SUlf Samuelsson #define CONFIG_DOS_PARTITION 1 256cb82a532SUlf Samuelsson 257cb82a532SUlf Samuelsson #undef CONFIG_SYS_USB_OHCI_BOARD_INIT 258cb82a532SUlf Samuelsson #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 259cb82a532SUlf Samuelsson #define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE 260cb82a532SUlf Samuelsson #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200" 261cb82a532SUlf Samuelsson #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 262cb82a532SUlf Samuelsson 263cb82a532SUlf Samuelsson /* 264cb82a532SUlf Samuelsson * I2C 265cb82a532SUlf Samuelsson */ 266cb82a532SUlf Samuelsson #define CONFIG_HARD_I2C 267cb82a532SUlf Samuelsson 268cb82a532SUlf Samuelsson #ifdef CONFIG_HARD_I2C 269cb82a532SUlf Samuelsson #define CONFIG_CMD_I2C 270cb82a532SUlf Samuelsson #define CONFIG_SYS_I2C_SPEED 0 /* not used */ 271cb82a532SUlf Samuelsson #define CONFIG_SYS_I2C_SLAVE 0 /* not used */ 272cb82a532SUlf Samuelsson #endif 273cb82a532SUlf Samuelsson 274cb82a532SUlf Samuelsson /* 275cb82a532SUlf Samuelsson * Shell Settings 276cb82a532SUlf Samuelsson */ 277cb82a532SUlf Samuelsson #define CONFIG_CMDLINE_EDITING 1 278cb82a532SUlf Samuelsson #define CONFIG_SYS_LONGHELP 1 279cb82a532SUlf Samuelsson #define CONFIG_AUTO_COMPLETE 1 280cb82a532SUlf Samuelsson #define CONFIG_SYS_HUSH_PARSER 1 281cb82a532SUlf Samuelsson #define CONFIG_SYS_PROMPT "U-Boot> " 282cb82a532SUlf Samuelsson #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 283cb82a532SUlf Samuelsson #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 284cb82a532SUlf Samuelsson #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 285cb82a532SUlf Samuelsson /* Print Buffer Size */ 286cb82a532SUlf Samuelsson #define CONFIG_SYS_PBSIZE \ 287cb82a532SUlf Samuelsson (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 288cb82a532SUlf Samuelsson 289cb82a532SUlf Samuelsson #ifndef __ASSEMBLY__ 290cb82a532SUlf Samuelsson /*----------------------------------------------------------------------- 291cb82a532SUlf Samuelsson * Board specific extension for bd_info 292cb82a532SUlf Samuelsson * 293cb82a532SUlf Samuelsson * This structure is embedded in the global bd_info (bd_t) structure 294cb82a532SUlf Samuelsson * and can be used by the board specific code (eg board/...) 295cb82a532SUlf Samuelsson */ 296cb82a532SUlf Samuelsson 297cb82a532SUlf Samuelsson struct bd_info_ext { 298cb82a532SUlf Samuelsson /* helper variable for board environment handling 299cb82a532SUlf Samuelsson * 300cb82a532SUlf Samuelsson * env_crc_valid == 0 => uninitialised 301cb82a532SUlf Samuelsson * env_crc_valid > 0 => environment crc in flash is valid 302cb82a532SUlf Samuelsson * env_crc_valid < 0 => environment crc in flash is invalid 303cb82a532SUlf Samuelsson */ 304cb82a532SUlf Samuelsson int env_crc_valid; 305cb82a532SUlf Samuelsson }; 306cb82a532SUlf Samuelsson #endif 307cb82a532SUlf Samuelsson 308cb82a532SUlf Samuelsson #define CONFIG_SYS_HZ 1000 309cb82a532SUlf Samuelsson /* 310cb82a532SUlf Samuelsson * AT91C_TC0_CMR is implicitly set to 311cb82a532SUlf Samuelsson * AT91C_TC_TIMER_DIV1_CLOCK 312cb82a532SUlf Samuelsson */ 313cb82a532SUlf Samuelsson #define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2) 314cb82a532SUlf Samuelsson 315cb82a532SUlf Samuelsson /* 316cb82a532SUlf Samuelsson * Size of malloc() pool 317cb82a532SUlf Samuelsson */ 318cb82a532SUlf Samuelsson #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024 \ 319cb82a532SUlf Samuelsson , 0x1000) 320cb82a532SUlf Samuelsson /* size in bytes reserved for initial data */ 321cb82a532SUlf Samuelsson #define CONFIG_SYS_GBL_DATA_SIZE 128 322cb82a532SUlf Samuelsson 323cb82a532SUlf Samuelsson #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ 324cb82a532SUlf Samuelsson #define CONFIG_STACKSIZE_IRQ (4 * 1024) /* Unsure if to big or to small*/ 325cb82a532SUlf Samuelsson #define CONFIG_STACKSIZE_FIQ (4 * 1024) /* Unsure if to big or to small*/ 326cb82a532SUlf Samuelsson #endif 327