1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2a2ac68fbSChander Kashyap /* 3a2ac68fbSChander Kashyap * Copyright (C) 2013 Samsung Electronics 4a2ac68fbSChander Kashyap * 5a2ac68fbSChander Kashyap * Configuration settings for the SAMSUNG Arndale board. 6a2ac68fbSChander Kashyap */ 7a2ac68fbSChander Kashyap 8a2ac68fbSChander Kashyap #ifndef __CONFIG_ARNDALE_H 9a2ac68fbSChander Kashyap #define __CONFIG_ARNDALE_H 10a2ac68fbSChander Kashyap 11e6825e03SIan Campbell #define EXYNOS_FDTFILE_SETTING \ 12e6825e03SIan Campbell "fdtfile=exynos5250-arndale.dtb\0" 13e6825e03SIan Campbell 14f94de733SSimon Glass #include "exynos5250-common.h" 15bf637ea5SSimon Glass #include <configs/exynos5-common.h> 16a2ac68fbSChander Kashyap 17a2ac68fbSChander Kashyap /* SD/MMC configuration */ 18a2ac68fbSChander Kashyap #define CONFIG_SUPPORT_EMMC_BOOT 19a2ac68fbSChander Kashyap 20a2ac68fbSChander Kashyap /* allow to overwrite serial and ethaddr */ 21a2ac68fbSChander Kashyap #define CONFIG_ENV_OVERWRITE 22a2ac68fbSChander Kashyap 23a2ac68fbSChander Kashyap /* MMC SPL */ 24e106bd9bSRajeshwari Birje #define CONFIG_EXYNOS_SPL 25a2ac68fbSChander Kashyap 26a2ac68fbSChander Kashyap /* Miscellaneous configurable options */ 27a2ac68fbSChander Kashyap #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" 28a2ac68fbSChander Kashyap 29a2ac68fbSChander Kashyap #define CONFIG_ENV_OFFSET (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE) 30a2ac68fbSChander Kashyap 31a2ac68fbSChander Kashyap #define CONFIG_IRAM_STACK 0x02050000 32a2ac68fbSChander Kashyap 33a2ac68fbSChander Kashyap #define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK 34a2ac68fbSChander Kashyap 35a2ac68fbSChander Kashyap /* PMIC */ 36bf637ea5SSimon Glass #define CONFIG_POWER 37913702caSSimon Glass #define CONFIG_POWER_I2C 38a2ac68fbSChander Kashyap 39f8caed31STushar Behera #define CONFIG_PREBOOT 40f8caed31STushar Behera 41fafbc6c0SAndre Przywara #define CONFIG_S5P_PA_SYSRAM 0x02020000 42fafbc6c0SAndre Przywara #define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM 43fafbc6c0SAndre Przywara 44fafbc6c0SAndre Przywara /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ 45fafbc6c0SAndre Przywara #define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000 46fafbc6c0SAndre Przywara 47d4061aa0SSimon Glass /* Power */ 48d4061aa0SSimon Glass #define CONFIG_POWER 49d4061aa0SSimon Glass #define CONFIG_POWER_I2C 50d4061aa0SSimon Glass 51a2ac68fbSChander Kashyap #endif /* __CONFIG_H */ 52