15c7f10fdSOliver Schinagl /* 25c7f10fdSOliver Schinagl * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl> 35c7f10fdSOliver Schinagl * 45c7f10fdSOliver Schinagl * X-Powers AXP221 Power Management IC driver 55c7f10fdSOliver Schinagl * 65c7f10fdSOliver Schinagl * SPDX-License-Identifier: GPL-2.0+ 75c7f10fdSOliver Schinagl */ 85c7f10fdSOliver Schinagl 9f3fba566SHans de Goede /* Page 0 addresses */ 105c7f10fdSOliver Schinagl #define AXP221_CHIP_ID 0x03 115c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL1 0x10 1250e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC0_EN (1 << 0) 1350e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC1_EN (1 << 1) 1450e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC2_EN (1 << 2) 1550e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC3_EN (1 << 3) 1650e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC4_EN (1 << 4) 1750e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC5_EN (1 << 5) 185c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL1_ALDO1_EN (1 << 6) 195c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL1_ALDO2_EN (1 << 7) 205c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL2 0x12 216906df1aSSiarhei Siamashka #define AXP221_OUTPUT_CTRL2_ELDO1_EN (1 << 0) 226906df1aSSiarhei Siamashka #define AXP221_OUTPUT_CTRL2_ELDO2_EN (1 << 1) 236906df1aSSiarhei Siamashka #define AXP221_OUTPUT_CTRL2_ELDO3_EN (1 << 2) 245c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL2_DLDO1_EN (1 << 3) 255c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL2_DLDO2_EN (1 << 4) 265c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL2_DLDO3_EN (1 << 5) 275c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL2_DLDO4_EN (1 << 6) 2850e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL2_DCDC1SW_EN (1 << 7) 295c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL3 0x13 305c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL3_ALDO3_EN (1 << 7) 315c7f10fdSOliver Schinagl #define AXP221_DLDO1_CTRL 0x15 325c7f10fdSOliver Schinagl #define AXP221_DLDO2_CTRL 0x16 335c7f10fdSOliver Schinagl #define AXP221_DLDO3_CTRL 0x17 345c7f10fdSOliver Schinagl #define AXP221_DLDO4_CTRL 0x18 356906df1aSSiarhei Siamashka #define AXP221_ELDO1_CTRL 0x19 366906df1aSSiarhei Siamashka #define AXP221_ELDO2_CTRL 0x1a 376906df1aSSiarhei Siamashka #define AXP221_ELDO3_CTRL 0x1b 385c7f10fdSOliver Schinagl #define AXP221_DCDC1_CTRL 0x21 395c7f10fdSOliver Schinagl #define AXP221_DCDC2_CTRL 0x22 405c7f10fdSOliver Schinagl #define AXP221_DCDC3_CTRL 0x23 415c7f10fdSOliver Schinagl #define AXP221_DCDC4_CTRL 0x24 425c7f10fdSOliver Schinagl #define AXP221_DCDC5_CTRL 0x25 435c7f10fdSOliver Schinagl #define AXP221_ALDO1_CTRL 0x28 445ba47194SHans de Goede #define AXP221_ALDO2_CTRL 0x29 455c7f10fdSOliver Schinagl #define AXP221_ALDO3_CTRL 0x2a 462abac621SHans de Goede #define AXP221_VBUS_IPSOUT 0x30 472abac621SHans de Goede #define AXP221_VBUS_IPSOUT_DRIVEBUS (1 << 2) 48*fe4b71b2SHans de Goede #define AXP221_SHUTDOWN 0x32 49*fe4b71b2SHans de Goede #define AXP221_SHUTDOWN_POWEROFF (1 << 7) 502abac621SHans de Goede #define AXP221_MISC_CTRL 0x8f 512abac621SHans de Goede #define AXP221_MISC_CTRL_N_VBUSEN_FUNC (1 << 4) 52f3fba566SHans de Goede #define AXP221_PAGE 0xff 53f3fba566SHans de Goede 54f3fba566SHans de Goede /* Page 1 addresses */ 55f3fba566SHans de Goede #define AXP221_SID 0x20 565c7f10fdSOliver Schinagl 572fcf033dSHans de Goede /* For axp_gpio.c */ 582fcf033dSHans de Goede #define AXP_POWER_STATUS 0x00 592fcf033dSHans de Goede #define AXP_POWER_STATUS_VBUS_PRESENT (1 << 5) 602fcf033dSHans de Goede #define AXP_GPIO0_CTRL 0x90 612fcf033dSHans de Goede #define AXP_GPIO1_CTRL 0x92 622fcf033dSHans de Goede #define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ 632fcf033dSHans de Goede #define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ 642fcf033dSHans de Goede #define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ 652fcf033dSHans de Goede #define AXP_GPIO_STATE 0x94 662fcf033dSHans de Goede #define AXP_GPIO_STATE_OFFSET 0 67