xref: /openbmc/u-boot/drivers/video/da8xx-fb.h (revision 83d290c56fab2d38cd1ab4c4cc7099559c1d5046)
1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */
20017f9eeSHeiko Schocher /*
30017f9eeSHeiko Schocher  * Porting to u-boot:
40017f9eeSHeiko Schocher  *
50017f9eeSHeiko Schocher  * (C) Copyright 2011
60017f9eeSHeiko Schocher  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
70017f9eeSHeiko Schocher  *
80017f9eeSHeiko Schocher  * Copyright (C) 2008-2009 MontaVista Software Inc.
90017f9eeSHeiko Schocher  * Copyright (C) 2008-2009 Texas Instruments Inc
100017f9eeSHeiko Schocher  *
110017f9eeSHeiko Schocher  * Based on the LCD driver for TI Avalanche processors written by
120017f9eeSHeiko Schocher  * Ajay Singh and Shalom Hai.
130017f9eeSHeiko Schocher  */
140017f9eeSHeiko Schocher 
150017f9eeSHeiko Schocher #ifndef DA8XX_FB_H
160017f9eeSHeiko Schocher #define DA8XX_FB_H
170017f9eeSHeiko Schocher 
180017f9eeSHeiko Schocher enum panel_type {
190017f9eeSHeiko Schocher 	QVGA = 0,
200017f9eeSHeiko Schocher 	WVGA
210017f9eeSHeiko Schocher };
220017f9eeSHeiko Schocher 
230017f9eeSHeiko Schocher enum panel_shade {
240017f9eeSHeiko Schocher 	MONOCHROME = 0,
250017f9eeSHeiko Schocher 	COLOR_ACTIVE,
260017f9eeSHeiko Schocher 	COLOR_PASSIVE,
270017f9eeSHeiko Schocher };
280017f9eeSHeiko Schocher 
290017f9eeSHeiko Schocher enum raster_load_mode {
300017f9eeSHeiko Schocher 	LOAD_DATA = 1,
310017f9eeSHeiko Schocher 	LOAD_PALETTE,
320017f9eeSHeiko Schocher };
330017f9eeSHeiko Schocher 
340017f9eeSHeiko Schocher struct display_panel {
350017f9eeSHeiko Schocher 	enum panel_type panel_type; /* QVGA */
360017f9eeSHeiko Schocher 	int max_bpp;
370017f9eeSHeiko Schocher 	int min_bpp;
380017f9eeSHeiko Schocher 	enum panel_shade panel_shade;
390017f9eeSHeiko Schocher };
400017f9eeSHeiko Schocher 
410017f9eeSHeiko Schocher struct da8xx_panel {
420017f9eeSHeiko Schocher 	const char	name[25];	/* Full name <vendor>_<model> */
430017f9eeSHeiko Schocher 	unsigned short	width;
440017f9eeSHeiko Schocher 	unsigned short	height;
450017f9eeSHeiko Schocher 	int		hfp;		/* Horizontal front porch */
460017f9eeSHeiko Schocher 	int		hbp;		/* Horizontal back porch */
470017f9eeSHeiko Schocher 	int		hsw;		/* Horizontal Sync Pulse Width */
480017f9eeSHeiko Schocher 	int		vfp;		/* Vertical front porch */
490017f9eeSHeiko Schocher 	int		vbp;		/* Vertical back porch */
500017f9eeSHeiko Schocher 	int		vsw;		/* Vertical Sync Pulse Width */
510017f9eeSHeiko Schocher 	unsigned int	pxl_clk;	/* Pixel clock */
520017f9eeSHeiko Schocher 	unsigned char	invert_pxl_clk;	/* Invert Pixel clock */
530017f9eeSHeiko Schocher };
540017f9eeSHeiko Schocher 
550017f9eeSHeiko Schocher struct da8xx_lcdc_platform_data {
560017f9eeSHeiko Schocher 	const char manu_name[10];
570017f9eeSHeiko Schocher 	void *controller_data;
580017f9eeSHeiko Schocher 	const char type[25];
590017f9eeSHeiko Schocher 	void (*panel_power_ctrl)(int);
600017f9eeSHeiko Schocher };
610017f9eeSHeiko Schocher 
620017f9eeSHeiko Schocher struct lcd_ctrl_config {
630017f9eeSHeiko Schocher 	const struct display_panel *p_disp_panel;
640017f9eeSHeiko Schocher 
650017f9eeSHeiko Schocher 	/* AC Bias Pin Frequency */
660017f9eeSHeiko Schocher 	int ac_bias;
670017f9eeSHeiko Schocher 
680017f9eeSHeiko Schocher 	/* AC Bias Pin Transitions per Interrupt */
690017f9eeSHeiko Schocher 	int ac_bias_intrpt;
700017f9eeSHeiko Schocher 
710017f9eeSHeiko Schocher 	/* DMA burst size */
720017f9eeSHeiko Schocher 	int dma_burst_sz;
730017f9eeSHeiko Schocher 
740017f9eeSHeiko Schocher 	/* Bits per pixel */
750017f9eeSHeiko Schocher 	int bpp;
760017f9eeSHeiko Schocher 
770017f9eeSHeiko Schocher 	/* FIFO DMA Request Delay */
780017f9eeSHeiko Schocher 	int fdd;
790017f9eeSHeiko Schocher 
800017f9eeSHeiko Schocher 	/* TFT Alternative Signal Mapping (Only for active) */
810017f9eeSHeiko Schocher 	unsigned char tft_alt_mode;
820017f9eeSHeiko Schocher 
830017f9eeSHeiko Schocher 	/* 12 Bit Per Pixel (5-6-5) Mode (Only for passive) */
840017f9eeSHeiko Schocher 	unsigned char stn_565_mode;
850017f9eeSHeiko Schocher 
860017f9eeSHeiko Schocher 	/* Mono 8-bit Mode: 1=D0-D7 or 0=D0-D3 */
870017f9eeSHeiko Schocher 	unsigned char mono_8bit_mode;
880017f9eeSHeiko Schocher 
890017f9eeSHeiko Schocher 	/* Invert line clock */
900017f9eeSHeiko Schocher 	unsigned char invert_line_clock;
910017f9eeSHeiko Schocher 
920017f9eeSHeiko Schocher 	/* Invert frame clock  */
930017f9eeSHeiko Schocher 	unsigned char invert_frm_clock;
940017f9eeSHeiko Schocher 
950017f9eeSHeiko Schocher 	/* Horizontal and Vertical Sync Edge: 0=rising 1=falling */
960017f9eeSHeiko Schocher 	unsigned char sync_edge;
970017f9eeSHeiko Schocher 
980017f9eeSHeiko Schocher 	/* Horizontal and Vertical Sync: Control: 0=ignore */
990017f9eeSHeiko Schocher 	unsigned char sync_ctrl;
1000017f9eeSHeiko Schocher 
1010017f9eeSHeiko Schocher 	/* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */
1020017f9eeSHeiko Schocher 	unsigned char raster_order;
1030017f9eeSHeiko Schocher };
1040017f9eeSHeiko Schocher 
1050017f9eeSHeiko Schocher struct lcd_sync_arg {
1060017f9eeSHeiko Schocher 	int back_porch;
1070017f9eeSHeiko Schocher 	int front_porch;
1080017f9eeSHeiko Schocher 	int pulse_width;
1090017f9eeSHeiko Schocher };
1100017f9eeSHeiko Schocher 
111765f2f08SHeiko Schocher void da8xx_video_init(const struct da8xx_panel *panel,
112765f2f08SHeiko Schocher 		      const struct lcd_ctrl_config *lcd_cfg,
113765f2f08SHeiko Schocher 		      int bits_pixel);
1140017f9eeSHeiko Schocher 
1150017f9eeSHeiko Schocher #endif  /* ifndef DA8XX_FB_H */
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