1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2f298e4b6STom Rix /*
3f298e4b6STom Rix * Copyright (c) 2009 Wind River Systems, Inc.
4f298e4b6STom Rix * Tom Rix <Tom.Rix@windriver.com>
5f298e4b6STom Rix *
6f298e4b6STom Rix * This file is a rewrite of the usb device part of
7f298e4b6STom Rix * repository git.omapzoom.org/repo/u-boot.git, branch master,
8f298e4b6STom Rix * file cpu/omap3/fastboot.c
9f298e4b6STom Rix *
10f298e4b6STom Rix * This is the unique part of its copyright :
11f298e4b6STom Rix *
12f298e4b6STom Rix * -------------------------------------------------------------------------
13f298e4b6STom Rix *
14f298e4b6STom Rix * (C) Copyright 2008 - 2009
15f298e4b6STom Rix * Windriver, <www.windriver.com>
16f298e4b6STom Rix * Tom Rix <Tom.Rix@windriver.com>
17f298e4b6STom Rix *
18f298e4b6STom Rix * -------------------------------------------------------------------------
19f298e4b6STom Rix *
20f298e4b6STom Rix * The details of connecting the device to the uboot usb device subsystem
21f298e4b6STom Rix * came from the old omap3 repository www.sakoman.net/u-boot-omap3.git,
22f298e4b6STom Rix * branch omap3-dev-usb, file drivers/usb/usbdcore_musb.c
23f298e4b6STom Rix *
24f298e4b6STom Rix * This is the unique part of its copyright :
25f298e4b6STom Rix *
26f298e4b6STom Rix * -------------------------------------------------------------------------
27f298e4b6STom Rix *
28f298e4b6STom Rix * (C) Copyright 2008 Texas Instruments Incorporated.
29f298e4b6STom Rix *
30f298e4b6STom Rix * Based on
31f298e4b6STom Rix * u-boot OMAP1510 USB drivers (drivers/usbdcore_omap1510.c)
32f298e4b6STom Rix * twl4030 init based on linux (drivers/i2c/chips/twl4030_usb.c)
33f298e4b6STom Rix *
34f298e4b6STom Rix * Author: Diego Dompe (diego.dompe@ridgerun.com)
35f298e4b6STom Rix * Atin Malaviya (atin.malaviya@gmail.com)
36f298e4b6STom Rix *
37f298e4b6STom Rix * -------------------------------------------------------------------------
38f298e4b6STom Rix */
39f298e4b6STom Rix
40f298e4b6STom Rix #include <common.h>
41449697f1STroy Kisky #include <usbdevice.h>
42449697f1STroy Kisky #include <usb/udc.h>
43f298e4b6STom Rix #include "../gadget/ep0.h"
44f298e4b6STom Rix #include "musb_core.h"
45f298e4b6STom Rix #if defined(CONFIG_USB_OMAP3)
46f298e4b6STom Rix #include "omap3.h"
47dbea3242SAjay Kumar Gupta #elif defined(CONFIG_USB_AM35X)
48dbea3242SAjay Kumar Gupta #include "am35x.h"
49f298e4b6STom Rix #endif
50f298e4b6STom Rix
51f298e4b6STom Rix /* Define MUSB_DEBUG for debugging */
52f298e4b6STom Rix /* #define MUSB_DEBUG */
53f298e4b6STom Rix #include "musb_debug.h"
54f298e4b6STom Rix
55f298e4b6STom Rix #define MAX_ENDPOINT 15
56f298e4b6STom Rix
57f298e4b6STom Rix #define GET_ENDPOINT(dev,ep) \
58f298e4b6STom Rix (((struct usb_device_instance *)(dev))->bus->endpoint_array + ep)
59f298e4b6STom Rix
60f298e4b6STom Rix #define SET_EP0_STATE(s) \
61f298e4b6STom Rix do { \
62f298e4b6STom Rix if ((0 <= (s)) && (SET_ADDRESS >= (s))) { \
63f298e4b6STom Rix if ((s) != ep0_state) { \
64f298e4b6STom Rix if ((debug_setup) && (debug_level > 1)) \
65f298e4b6STom Rix serial_printf("INFO : Changing state " \
66f298e4b6STom Rix "from %s to %s in %s at " \
67f298e4b6STom Rix "line %d\n", \
68f298e4b6STom Rix ep0_state_strings[ep0_state],\
69f298e4b6STom Rix ep0_state_strings[s], \
70f298e4b6STom Rix __PRETTY_FUNCTION__, \
71f298e4b6STom Rix __LINE__); \
72f298e4b6STom Rix ep0_state = s; \
73f298e4b6STom Rix } \
74f298e4b6STom Rix } else { \
75f298e4b6STom Rix if (debug_level > 0) \
76f298e4b6STom Rix serial_printf("Error at %s %d with setting " \
77f298e4b6STom Rix "state %d is invalid\n", \
78f298e4b6STom Rix __PRETTY_FUNCTION__, __LINE__, s); \
79f298e4b6STom Rix } \
80f298e4b6STom Rix } while (0)
81f298e4b6STom Rix
82f298e4b6STom Rix /* static implies these initialized to 0 or NULL */
83f298e4b6STom Rix static int debug_setup;
84f298e4b6STom Rix static int debug_level;
857f2e59aeSHeinrich Schuchardt static struct musb_epinfo epinfo[MAX_ENDPOINT * 2 + 2];
86f298e4b6STom Rix static enum ep0_state_enum {
87f298e4b6STom Rix IDLE = 0,
88f298e4b6STom Rix TX,
89f298e4b6STom Rix RX,
90f298e4b6STom Rix SET_ADDRESS
91f298e4b6STom Rix } ep0_state = IDLE;
92f298e4b6STom Rix static char *ep0_state_strings[4] = {
93f298e4b6STom Rix "IDLE",
94f298e4b6STom Rix "TX",
95f298e4b6STom Rix "RX",
96f298e4b6STom Rix "SET_ADDRESS",
97f298e4b6STom Rix };
98f298e4b6STom Rix
99f298e4b6STom Rix static struct urb *ep0_urb;
100f298e4b6STom Rix struct usb_endpoint_instance *ep0_endpoint;
101f298e4b6STom Rix static struct usb_device_instance *udc_device;
102f298e4b6STom Rix static int enabled;
103f298e4b6STom Rix
104f298e4b6STom Rix #ifdef MUSB_DEBUG
musb_db_regs(void)105f298e4b6STom Rix static void musb_db_regs(void)
106f298e4b6STom Rix {
107f298e4b6STom Rix u8 b;
108f298e4b6STom Rix u16 w;
109f298e4b6STom Rix
110f298e4b6STom Rix b = readb(&musbr->faddr);
111f298e4b6STom Rix serial_printf("\tfaddr 0x%2.2x\n", b);
112f298e4b6STom Rix
113f298e4b6STom Rix b = readb(&musbr->power);
114f298e4b6STom Rix musb_print_pwr(b);
115f298e4b6STom Rix
116f298e4b6STom Rix w = readw(&musbr->ep[0].ep0.csr0);
117f298e4b6STom Rix musb_print_csr0(w);
118f298e4b6STom Rix
119f298e4b6STom Rix b = readb(&musbr->devctl);
120f298e4b6STom Rix musb_print_devctl(b);
121f298e4b6STom Rix
122f298e4b6STom Rix b = readb(&musbr->ep[0].ep0.configdata);
123f298e4b6STom Rix musb_print_config(b);
124f298e4b6STom Rix
125f298e4b6STom Rix w = readw(&musbr->frame);
126f298e4b6STom Rix serial_printf("\tframe 0x%4.4x\n", w);
127f298e4b6STom Rix
128f298e4b6STom Rix b = readb(&musbr->index);
129f298e4b6STom Rix serial_printf("\tindex 0x%2.2x\n", b);
130f298e4b6STom Rix
131f298e4b6STom Rix w = readw(&musbr->ep[1].epN.rxmaxp);
132f298e4b6STom Rix musb_print_rxmaxp(w);
133f298e4b6STom Rix
134f298e4b6STom Rix w = readw(&musbr->ep[1].epN.rxcsr);
135f298e4b6STom Rix musb_print_rxcsr(w);
136f298e4b6STom Rix
137f298e4b6STom Rix w = readw(&musbr->ep[1].epN.txmaxp);
138f298e4b6STom Rix musb_print_txmaxp(w);
139f298e4b6STom Rix
140f298e4b6STom Rix w = readw(&musbr->ep[1].epN.txcsr);
141f298e4b6STom Rix musb_print_txcsr(w);
142f298e4b6STom Rix }
143f298e4b6STom Rix #else
144f298e4b6STom Rix #define musb_db_regs()
145f298e4b6STom Rix #endif /* DEBUG_MUSB */
146f298e4b6STom Rix
musb_peri_softconnect(void)147f298e4b6STom Rix static void musb_peri_softconnect(void)
148f298e4b6STom Rix {
149f298e4b6STom Rix u8 power, devctl;
150f298e4b6STom Rix
151f298e4b6STom Rix /* Power off MUSB */
152f298e4b6STom Rix power = readb(&musbr->power);
153f298e4b6STom Rix power &= ~MUSB_POWER_SOFTCONN;
154f298e4b6STom Rix writeb(power, &musbr->power);
155f298e4b6STom Rix
156f298e4b6STom Rix /* Read intr to clear */
157c594a8deSAnatolij Gustschin readb(&musbr->intrusb);
158c594a8deSAnatolij Gustschin readw(&musbr->intrrx);
159c594a8deSAnatolij Gustschin readw(&musbr->intrtx);
160f298e4b6STom Rix
161f298e4b6STom Rix udelay(1000 * 1000); /* 1 sec */
162f298e4b6STom Rix
163f298e4b6STom Rix /* Power on MUSB */
164f298e4b6STom Rix power = readb(&musbr->power);
165f298e4b6STom Rix power |= MUSB_POWER_SOFTCONN;
166f298e4b6STom Rix /*
167f298e4b6STom Rix * The usb device interface is usb 1.1
168f298e4b6STom Rix * Disable 2.0 high speed by clearring the hsenable bit.
169f298e4b6STom Rix */
170f298e4b6STom Rix power &= ~MUSB_POWER_HSENAB;
171f298e4b6STom Rix writeb(power, &musbr->power);
172f298e4b6STom Rix
173f298e4b6STom Rix /* Check if device is in b-peripheral mode */
174f298e4b6STom Rix devctl = readb(&musbr->devctl);
175f298e4b6STom Rix if (!(devctl & MUSB_DEVCTL_BDEVICE) ||
176f298e4b6STom Rix (devctl & MUSB_DEVCTL_HM)) {
177f298e4b6STom Rix serial_printf("ERROR : Unsupport USB mode\n");
178f298e4b6STom Rix serial_printf("Check that mini-B USB cable is attached "
179f298e4b6STom Rix "to the device\n");
180f298e4b6STom Rix }
181f298e4b6STom Rix
182f298e4b6STom Rix if (debug_setup && (debug_level > 1))
183f298e4b6STom Rix musb_db_regs();
184f298e4b6STom Rix }
185f298e4b6STom Rix
musb_peri_reset(void)186f298e4b6STom Rix static void musb_peri_reset(void)
187f298e4b6STom Rix {
188f298e4b6STom Rix if ((debug_setup) && (debug_level > 1))
189f298e4b6STom Rix serial_printf("INFO : %s reset\n", __PRETTY_FUNCTION__);
190f298e4b6STom Rix
191f298e4b6STom Rix if (ep0_endpoint)
192f298e4b6STom Rix ep0_endpoint->endpoint_address = 0xff;
193f298e4b6STom Rix
194f298e4b6STom Rix /* Sync sw and hw addresses */
195f298e4b6STom Rix writeb(udc_device->address, &musbr->faddr);
196f298e4b6STom Rix
197f298e4b6STom Rix SET_EP0_STATE(IDLE);
198f298e4b6STom Rix }
199f298e4b6STom Rix
musb_peri_resume(void)200f298e4b6STom Rix static void musb_peri_resume(void)
201f298e4b6STom Rix {
202f298e4b6STom Rix /* noop */
203f298e4b6STom Rix }
204f298e4b6STom Rix
musb_peri_ep0_stall(void)205f298e4b6STom Rix static void musb_peri_ep0_stall(void)
206f298e4b6STom Rix {
207f298e4b6STom Rix u16 csr0;
208f298e4b6STom Rix
209f298e4b6STom Rix csr0 = readw(&musbr->ep[0].ep0.csr0);
210f298e4b6STom Rix csr0 |= MUSB_CSR0_P_SENDSTALL;
211f298e4b6STom Rix writew(csr0, &musbr->ep[0].ep0.csr0);
212f298e4b6STom Rix if ((debug_setup) && (debug_level > 1))
213f298e4b6STom Rix serial_printf("INFO : %s stall\n", __PRETTY_FUNCTION__);
214f298e4b6STom Rix }
215f298e4b6STom Rix
musb_peri_ep0_ack_req(void)216f298e4b6STom Rix static void musb_peri_ep0_ack_req(void)
217f298e4b6STom Rix {
218f298e4b6STom Rix u16 csr0;
219f298e4b6STom Rix
220f298e4b6STom Rix csr0 = readw(&musbr->ep[0].ep0.csr0);
221f298e4b6STom Rix csr0 |= MUSB_CSR0_P_SVDRXPKTRDY;
222f298e4b6STom Rix writew(csr0, &musbr->ep[0].ep0.csr0);
223f298e4b6STom Rix }
224f298e4b6STom Rix
musb_ep0_tx_ready(void)225f298e4b6STom Rix static void musb_ep0_tx_ready(void)
226f298e4b6STom Rix {
227f298e4b6STom Rix u16 csr0;
228f298e4b6STom Rix
229f298e4b6STom Rix csr0 = readw(&musbr->ep[0].ep0.csr0);
230f298e4b6STom Rix csr0 |= MUSB_CSR0_TXPKTRDY;
231f298e4b6STom Rix writew(csr0, &musbr->ep[0].ep0.csr0);
232f298e4b6STom Rix }
233f298e4b6STom Rix
musb_ep0_tx_ready_and_last(void)234f298e4b6STom Rix static void musb_ep0_tx_ready_and_last(void)
235f298e4b6STom Rix {
236f298e4b6STom Rix u16 csr0;
237f298e4b6STom Rix
238f298e4b6STom Rix csr0 = readw(&musbr->ep[0].ep0.csr0);
239f298e4b6STom Rix csr0 |= (MUSB_CSR0_TXPKTRDY | MUSB_CSR0_P_DATAEND);
240f298e4b6STom Rix writew(csr0, &musbr->ep[0].ep0.csr0);
241f298e4b6STom Rix }
242f298e4b6STom Rix
musb_peri_ep0_last(void)243f298e4b6STom Rix static void musb_peri_ep0_last(void)
244f298e4b6STom Rix {
245f298e4b6STom Rix u16 csr0;
246f298e4b6STom Rix
247f298e4b6STom Rix csr0 = readw(&musbr->ep[0].ep0.csr0);
248f298e4b6STom Rix csr0 |= MUSB_CSR0_P_DATAEND;
249f298e4b6STom Rix writew(csr0, &musbr->ep[0].ep0.csr0);
250f298e4b6STom Rix }
251f298e4b6STom Rix
musb_peri_ep0_set_address(void)252f298e4b6STom Rix static void musb_peri_ep0_set_address(void)
253f298e4b6STom Rix {
254f298e4b6STom Rix u8 faddr;
255f298e4b6STom Rix writeb(udc_device->address, &musbr->faddr);
256f298e4b6STom Rix
257f298e4b6STom Rix /* Verify */
258f298e4b6STom Rix faddr = readb(&musbr->faddr);
259f298e4b6STom Rix if (udc_device->address == faddr) {
260f298e4b6STom Rix SET_EP0_STATE(IDLE);
261f298e4b6STom Rix usbd_device_event_irq(udc_device, DEVICE_ADDRESS_ASSIGNED, 0);
262f298e4b6STom Rix if ((debug_setup) && (debug_level > 1))
263f298e4b6STom Rix serial_printf("INFO : %s Address set to %d\n",
264f298e4b6STom Rix __PRETTY_FUNCTION__, udc_device->address);
265f298e4b6STom Rix } else {
266f298e4b6STom Rix if (debug_level > 0)
267f298e4b6STom Rix serial_printf("ERROR : %s Address missmatch "
268f298e4b6STom Rix "sw %d vs hw %d\n",
269f298e4b6STom Rix __PRETTY_FUNCTION__,
270f298e4b6STom Rix udc_device->address, faddr);
271f298e4b6STom Rix }
272f298e4b6STom Rix }
273f298e4b6STom Rix
musb_peri_rx_ack(unsigned int ep)274f298e4b6STom Rix static void musb_peri_rx_ack(unsigned int ep)
275f298e4b6STom Rix {
276f298e4b6STom Rix u16 peri_rxcsr;
277f298e4b6STom Rix
278f298e4b6STom Rix peri_rxcsr = readw(&musbr->ep[ep].epN.rxcsr);
279f298e4b6STom Rix peri_rxcsr &= ~MUSB_RXCSR_RXPKTRDY;
280f298e4b6STom Rix writew(peri_rxcsr, &musbr->ep[ep].epN.rxcsr);
281f298e4b6STom Rix }
282f298e4b6STom Rix
musb_peri_tx_ready(unsigned int ep)283f298e4b6STom Rix static void musb_peri_tx_ready(unsigned int ep)
284f298e4b6STom Rix {
285f298e4b6STom Rix u16 peri_txcsr;
286f298e4b6STom Rix
287f298e4b6STom Rix peri_txcsr = readw(&musbr->ep[ep].epN.txcsr);
288f298e4b6STom Rix peri_txcsr |= MUSB_TXCSR_TXPKTRDY;
289f298e4b6STom Rix writew(peri_txcsr, &musbr->ep[ep].epN.txcsr);
290f298e4b6STom Rix }
291f298e4b6STom Rix
musb_peri_ep0_zero_data_request(int err)292f298e4b6STom Rix static void musb_peri_ep0_zero_data_request(int err)
293f298e4b6STom Rix {
294f298e4b6STom Rix musb_peri_ep0_ack_req();
295f298e4b6STom Rix
296f298e4b6STom Rix if (err) {
297f298e4b6STom Rix musb_peri_ep0_stall();
298f298e4b6STom Rix SET_EP0_STATE(IDLE);
299f298e4b6STom Rix } else {
300f298e4b6STom Rix
301f298e4b6STom Rix musb_peri_ep0_last();
302f298e4b6STom Rix
303f298e4b6STom Rix /* USBD state */
304f298e4b6STom Rix switch (ep0_urb->device_request.bRequest) {
305f298e4b6STom Rix case USB_REQ_SET_ADDRESS:
306f298e4b6STom Rix if ((debug_setup) && (debug_level > 1))
307f298e4b6STom Rix serial_printf("INFO : %s received set "
308f298e4b6STom Rix "address\n", __PRETTY_FUNCTION__);
309f298e4b6STom Rix break;
310f298e4b6STom Rix
311f298e4b6STom Rix case USB_REQ_SET_CONFIGURATION:
312f298e4b6STom Rix if ((debug_setup) && (debug_level > 1))
313f298e4b6STom Rix serial_printf("INFO : %s Configured\n",
314f298e4b6STom Rix __PRETTY_FUNCTION__);
315f298e4b6STom Rix usbd_device_event_irq(udc_device, DEVICE_CONFIGURED, 0);
316f298e4b6STom Rix break;
317f298e4b6STom Rix }
318f298e4b6STom Rix
319f298e4b6STom Rix /* EP0 state */
320f298e4b6STom Rix if (USB_REQ_SET_ADDRESS == ep0_urb->device_request.bRequest) {
321f298e4b6STom Rix SET_EP0_STATE(SET_ADDRESS);
322f298e4b6STom Rix } else {
323f298e4b6STom Rix SET_EP0_STATE(IDLE);
324f298e4b6STom Rix }
325f298e4b6STom Rix }
326f298e4b6STom Rix }
327f298e4b6STom Rix
musb_peri_ep0_rx_data_request(void)328f298e4b6STom Rix static void musb_peri_ep0_rx_data_request(void)
329f298e4b6STom Rix {
330f298e4b6STom Rix /*
331f298e4b6STom Rix * This is the completion of the data OUT / RX
332f298e4b6STom Rix *
333f298e4b6STom Rix * Host is sending data to ep0 that is not
334f298e4b6STom Rix * part of setup. This comes from the cdc_recv_setup
335f298e4b6STom Rix * op that is device specific.
336f298e4b6STom Rix *
337f298e4b6STom Rix */
338f298e4b6STom Rix musb_peri_ep0_ack_req();
339f298e4b6STom Rix
340f298e4b6STom Rix ep0_endpoint->rcv_urb = ep0_urb;
341f298e4b6STom Rix ep0_urb->actual_length = 0;
342f298e4b6STom Rix SET_EP0_STATE(RX);
343f298e4b6STom Rix }
344f298e4b6STom Rix
musb_peri_ep0_tx_data_request(int err)345f298e4b6STom Rix static void musb_peri_ep0_tx_data_request(int err)
346f298e4b6STom Rix {
347f298e4b6STom Rix if (err) {
348f298e4b6STom Rix musb_peri_ep0_stall();
349f298e4b6STom Rix SET_EP0_STATE(IDLE);
350f298e4b6STom Rix } else {
351f298e4b6STom Rix musb_peri_ep0_ack_req();
352f298e4b6STom Rix
353f298e4b6STom Rix ep0_endpoint->tx_urb = ep0_urb;
354f298e4b6STom Rix ep0_endpoint->sent = 0;
355f298e4b6STom Rix SET_EP0_STATE(TX);
356f298e4b6STom Rix }
357f298e4b6STom Rix }
358f298e4b6STom Rix
musb_peri_ep0_idle(void)359f298e4b6STom Rix static void musb_peri_ep0_idle(void)
360f298e4b6STom Rix {
361f298e4b6STom Rix u16 count0;
362f298e4b6STom Rix int err;
363f298e4b6STom Rix u16 csr0;
364f298e4b6STom Rix
365f298e4b6STom Rix /*
366f298e4b6STom Rix * Verify addresses
367f298e4b6STom Rix * A lot of confusion can be caused if the address
368f298e4b6STom Rix * in software, udc layer, does not agree with the
369f298e4b6STom Rix * hardware. Since the setting of the hardware address
370f298e4b6STom Rix * must be set after the set address request, the
371f298e4b6STom Rix * usb state machine is out of sync for a few frame.
372f298e4b6STom Rix * It is a good idea to run this check when changes
373f298e4b6STom Rix * are made to the state machine.
374f298e4b6STom Rix */
375f298e4b6STom Rix if ((debug_level > 0) &&
376f298e4b6STom Rix (ep0_state != SET_ADDRESS)) {
377f298e4b6STom Rix u8 faddr;
378f298e4b6STom Rix
379f298e4b6STom Rix faddr = readb(&musbr->faddr);
380f298e4b6STom Rix if (udc_device->address != faddr) {
381f298e4b6STom Rix serial_printf("ERROR : %s addresses do not"
382f298e4b6STom Rix "match sw %d vs hw %d\n",
383f298e4b6STom Rix __PRETTY_FUNCTION__,
384f298e4b6STom Rix udc_device->address, faddr);
385f298e4b6STom Rix udelay(1000 * 1000);
386f298e4b6STom Rix hang();
387f298e4b6STom Rix }
388f298e4b6STom Rix }
389f298e4b6STom Rix
390f298e4b6STom Rix csr0 = readw(&musbr->ep[0].ep0.csr0);
391f298e4b6STom Rix
392f298e4b6STom Rix if (!(MUSB_CSR0_RXPKTRDY & csr0))
393f298e4b6STom Rix goto end;
394f298e4b6STom Rix
395f298e4b6STom Rix count0 = readw(&musbr->ep[0].ep0.count0);
396f298e4b6STom Rix if (count0 == 0)
397f298e4b6STom Rix goto end;
398f298e4b6STom Rix
399f298e4b6STom Rix if (count0 != 8) {
400f298e4b6STom Rix if ((debug_setup) && (debug_level > 1))
401f298e4b6STom Rix serial_printf("WARN : %s SETUP incorrect size %d\n",
402f298e4b6STom Rix __PRETTY_FUNCTION__, count0);
403f298e4b6STom Rix musb_peri_ep0_stall();
404f298e4b6STom Rix goto end;
405f298e4b6STom Rix }
406f298e4b6STom Rix
407f298e4b6STom Rix read_fifo(0, count0, &ep0_urb->device_request);
408f298e4b6STom Rix
409f298e4b6STom Rix if (debug_level > 2)
410f298e4b6STom Rix print_usb_device_request(&ep0_urb->device_request);
411f298e4b6STom Rix
412f298e4b6STom Rix if (ep0_urb->device_request.wLength == 0) {
413f298e4b6STom Rix err = ep0_recv_setup(ep0_urb);
414f298e4b6STom Rix
415f298e4b6STom Rix /* Zero data request */
416f298e4b6STom Rix musb_peri_ep0_zero_data_request(err);
417f298e4b6STom Rix } else {
418f298e4b6STom Rix /* Is data coming or going ? */
419f298e4b6STom Rix u8 reqType = ep0_urb->device_request.bmRequestType;
420f298e4b6STom Rix
421f298e4b6STom Rix if (USB_REQ_DEVICE2HOST == (reqType & USB_REQ_DIRECTION_MASK)) {
422f298e4b6STom Rix err = ep0_recv_setup(ep0_urb);
423f298e4b6STom Rix /* Device to host */
424f298e4b6STom Rix musb_peri_ep0_tx_data_request(err);
425f298e4b6STom Rix } else {
426f298e4b6STom Rix /*
427f298e4b6STom Rix * Host to device
428f298e4b6STom Rix *
429f298e4b6STom Rix * The RX routine will call ep0_recv_setup
430f298e4b6STom Rix * when the data packet has arrived.
431f298e4b6STom Rix */
432f298e4b6STom Rix musb_peri_ep0_rx_data_request();
433f298e4b6STom Rix }
434f298e4b6STom Rix }
435f298e4b6STom Rix
436f298e4b6STom Rix end:
437f298e4b6STom Rix return;
438f298e4b6STom Rix }
439f298e4b6STom Rix
musb_peri_ep0_rx(void)440f298e4b6STom Rix static void musb_peri_ep0_rx(void)
441f298e4b6STom Rix {
442f298e4b6STom Rix /*
443f298e4b6STom Rix * This is the completion of the data OUT / RX
444f298e4b6STom Rix *
445f298e4b6STom Rix * Host is sending data to ep0 that is not
446f298e4b6STom Rix * part of setup. This comes from the cdc_recv_setup
447f298e4b6STom Rix * op that is device specific.
448f298e4b6STom Rix *
449f298e4b6STom Rix * Pass the data back to driver ep0_recv_setup which
450f298e4b6STom Rix * should give the cdc_recv_setup the chance to handle
451f298e4b6STom Rix * the rx
452f298e4b6STom Rix */
453f298e4b6STom Rix u16 csr0;
454f298e4b6STom Rix u16 count0;
455f298e4b6STom Rix
456f298e4b6STom Rix if (debug_level > 3) {
457f298e4b6STom Rix if (0 != ep0_urb->actual_length) {
458f298e4b6STom Rix serial_printf("%s finished ? %d of %d\n",
459f298e4b6STom Rix __PRETTY_FUNCTION__,
460f298e4b6STom Rix ep0_urb->actual_length,
461f298e4b6STom Rix ep0_urb->device_request.wLength);
462f298e4b6STom Rix }
463f298e4b6STom Rix }
464f298e4b6STom Rix
465f298e4b6STom Rix if (ep0_urb->device_request.wLength == ep0_urb->actual_length) {
466f298e4b6STom Rix musb_peri_ep0_last();
467f298e4b6STom Rix SET_EP0_STATE(IDLE);
468f298e4b6STom Rix ep0_recv_setup(ep0_urb);
469f298e4b6STom Rix return;
470f298e4b6STom Rix }
471f298e4b6STom Rix
472f298e4b6STom Rix csr0 = readw(&musbr->ep[0].ep0.csr0);
473f298e4b6STom Rix if (!(MUSB_CSR0_RXPKTRDY & csr0))
474f298e4b6STom Rix return;
475f298e4b6STom Rix
476f298e4b6STom Rix count0 = readw(&musbr->ep[0].ep0.count0);
477f298e4b6STom Rix
478f298e4b6STom Rix if (count0) {
479f298e4b6STom Rix struct usb_endpoint_instance *endpoint;
480f298e4b6STom Rix u32 length;
481f298e4b6STom Rix u8 *data;
482f298e4b6STom Rix
483f298e4b6STom Rix endpoint = ep0_endpoint;
484f298e4b6STom Rix if (endpoint && endpoint->rcv_urb) {
485f298e4b6STom Rix struct urb *urb = endpoint->rcv_urb;
486f298e4b6STom Rix unsigned int remaining_space = urb->buffer_length -
487f298e4b6STom Rix urb->actual_length;
488f298e4b6STom Rix
489f298e4b6STom Rix if (remaining_space) {
490f298e4b6STom Rix int urb_bad = 0; /* urb is good */
491f298e4b6STom Rix
492f298e4b6STom Rix if (count0 > remaining_space)
493f298e4b6STom Rix length = remaining_space;
494f298e4b6STom Rix else
495f298e4b6STom Rix length = count0;
496f298e4b6STom Rix
497f298e4b6STom Rix data = (u8 *) urb->buffer_data;
498f298e4b6STom Rix data += urb->actual_length;
499f298e4b6STom Rix
500f298e4b6STom Rix /* The common musb fifo reader */
501f298e4b6STom Rix read_fifo(0, length, data);
502f298e4b6STom Rix
503f298e4b6STom Rix musb_peri_ep0_ack_req();
504f298e4b6STom Rix
505f298e4b6STom Rix /*
506f298e4b6STom Rix * urb's actual_length is updated in
507f298e4b6STom Rix * usbd_rcv_complete
508f298e4b6STom Rix */
509f298e4b6STom Rix usbd_rcv_complete(endpoint, length, urb_bad);
510f298e4b6STom Rix
511f298e4b6STom Rix } else {
512f298e4b6STom Rix if (debug_level > 0)
513f298e4b6STom Rix serial_printf("ERROR : %s no space in "
514f298e4b6STom Rix "rcv buffer\n",
515f298e4b6STom Rix __PRETTY_FUNCTION__);
516f298e4b6STom Rix }
517f298e4b6STom Rix } else {
518f298e4b6STom Rix if (debug_level > 0)
519f298e4b6STom Rix serial_printf("ERROR : %s problem with "
520f298e4b6STom Rix "endpoint\n",
521f298e4b6STom Rix __PRETTY_FUNCTION__);
522f298e4b6STom Rix }
523f298e4b6STom Rix } else {
524f298e4b6STom Rix if (debug_level > 0)
525f298e4b6STom Rix serial_printf("ERROR : %s with nothing to do\n",
526f298e4b6STom Rix __PRETTY_FUNCTION__);
527f298e4b6STom Rix }
528f298e4b6STom Rix }
529f298e4b6STom Rix
musb_peri_ep0_tx(void)530f298e4b6STom Rix static void musb_peri_ep0_tx(void)
531f298e4b6STom Rix {
532f298e4b6STom Rix u16 csr0;
533f298e4b6STom Rix int transfer_size = 0;
534f298e4b6STom Rix unsigned int p, pm;
535f298e4b6STom Rix
536f298e4b6STom Rix csr0 = readw(&musbr->ep[0].ep0.csr0);
537f298e4b6STom Rix
538f298e4b6STom Rix /* Check for pending tx */
539f298e4b6STom Rix if (csr0 & MUSB_CSR0_TXPKTRDY)
540f298e4b6STom Rix goto end;
541f298e4b6STom Rix
542f298e4b6STom Rix /* Check if this is the last packet sent */
543f298e4b6STom Rix if (ep0_endpoint->sent >= ep0_urb->actual_length) {
544f298e4b6STom Rix SET_EP0_STATE(IDLE);
545f298e4b6STom Rix goto end;
546f298e4b6STom Rix }
547f298e4b6STom Rix
548f298e4b6STom Rix transfer_size = ep0_urb->actual_length - ep0_endpoint->sent;
549f298e4b6STom Rix /* Is the transfer size negative ? */
550f298e4b6STom Rix if (transfer_size <= 0) {
551f298e4b6STom Rix if (debug_level > 0)
552f298e4b6STom Rix serial_printf("ERROR : %s problem with the"
553f298e4b6STom Rix " transfer size %d\n",
554f298e4b6STom Rix __PRETTY_FUNCTION__,
555f298e4b6STom Rix transfer_size);
556f298e4b6STom Rix SET_EP0_STATE(IDLE);
557f298e4b6STom Rix goto end;
558f298e4b6STom Rix }
559f298e4b6STom Rix
560f298e4b6STom Rix /* Truncate large transfers to the fifo size */
561f298e4b6STom Rix if (transfer_size > ep0_endpoint->tx_packetSize)
562f298e4b6STom Rix transfer_size = ep0_endpoint->tx_packetSize;
563f298e4b6STom Rix
564f298e4b6STom Rix write_fifo(0, transfer_size, &ep0_urb->buffer[ep0_endpoint->sent]);
565f298e4b6STom Rix ep0_endpoint->sent += transfer_size;
566f298e4b6STom Rix
567f298e4b6STom Rix /* Done or more to send ? */
568f298e4b6STom Rix if (ep0_endpoint->sent >= ep0_urb->actual_length)
569f298e4b6STom Rix musb_ep0_tx_ready_and_last();
570f298e4b6STom Rix else
571f298e4b6STom Rix musb_ep0_tx_ready();
572f298e4b6STom Rix
573f298e4b6STom Rix /* Wait a bit */
574f298e4b6STom Rix pm = 10;
575f298e4b6STom Rix for (p = 0; p < pm; p++) {
576f298e4b6STom Rix csr0 = readw(&musbr->ep[0].ep0.csr0);
577f298e4b6STom Rix if (!(csr0 & MUSB_CSR0_TXPKTRDY))
578f298e4b6STom Rix break;
579f298e4b6STom Rix
580f298e4b6STom Rix /* Double the delay. */
581f298e4b6STom Rix udelay(1 << pm);
582f298e4b6STom Rix }
583f298e4b6STom Rix
584f298e4b6STom Rix if ((ep0_endpoint->sent >= ep0_urb->actual_length) && (p < pm))
585f298e4b6STom Rix SET_EP0_STATE(IDLE);
586f298e4b6STom Rix
587f298e4b6STom Rix end:
588f298e4b6STom Rix return;
589f298e4b6STom Rix }
590f298e4b6STom Rix
musb_peri_ep0(void)591f298e4b6STom Rix static void musb_peri_ep0(void)
592f298e4b6STom Rix {
593f298e4b6STom Rix u16 csr0;
594f298e4b6STom Rix
595f298e4b6STom Rix if (SET_ADDRESS == ep0_state)
596f298e4b6STom Rix return;
597f298e4b6STom Rix
598f298e4b6STom Rix csr0 = readw(&musbr->ep[0].ep0.csr0);
599f298e4b6STom Rix
600f298e4b6STom Rix /* Error conditions */
601f298e4b6STom Rix if (MUSB_CSR0_P_SENTSTALL & csr0) {
602f298e4b6STom Rix csr0 &= ~MUSB_CSR0_P_SENTSTALL;
603f298e4b6STom Rix writew(csr0, &musbr->ep[0].ep0.csr0);
604f298e4b6STom Rix SET_EP0_STATE(IDLE);
605f298e4b6STom Rix }
606f298e4b6STom Rix if (MUSB_CSR0_P_SETUPEND & csr0) {
607f298e4b6STom Rix csr0 |= MUSB_CSR0_P_SVDSETUPEND;
608f298e4b6STom Rix writew(csr0, &musbr->ep[0].ep0.csr0);
609f298e4b6STom Rix SET_EP0_STATE(IDLE);
610f298e4b6STom Rix if ((debug_setup) && (debug_level > 1))
611f298e4b6STom Rix serial_printf("WARN: %s SETUPEND\n",
612f298e4b6STom Rix __PRETTY_FUNCTION__);
613f298e4b6STom Rix }
614f298e4b6STom Rix
615f298e4b6STom Rix /* Normal states */
616f298e4b6STom Rix if (IDLE == ep0_state)
617f298e4b6STom Rix musb_peri_ep0_idle();
618f298e4b6STom Rix
619f298e4b6STom Rix if (TX == ep0_state)
620f298e4b6STom Rix musb_peri_ep0_tx();
621f298e4b6STom Rix
622f298e4b6STom Rix if (RX == ep0_state)
623f298e4b6STom Rix musb_peri_ep0_rx();
624f298e4b6STom Rix }
625f298e4b6STom Rix
musb_peri_rx_ep(unsigned int ep)626f298e4b6STom Rix static void musb_peri_rx_ep(unsigned int ep)
627f298e4b6STom Rix {
6283f0be8eaSPankaj Bharadiya u16 peri_rxcount;
6293f0be8eaSPankaj Bharadiya u8 peri_rxcsr = readw(&musbr->ep[ep].epN.rxcsr);
630f298e4b6STom Rix
6313f0be8eaSPankaj Bharadiya if (!(peri_rxcsr & MUSB_RXCSR_RXPKTRDY)) {
6323f0be8eaSPankaj Bharadiya if (debug_level > 0)
6333f0be8eaSPankaj Bharadiya serial_printf("ERROR : %s %d without MUSB_RXCSR_RXPKTRDY set\n",
6343f0be8eaSPankaj Bharadiya __PRETTY_FUNCTION__, ep);
6353f0be8eaSPankaj Bharadiya return;
6363f0be8eaSPankaj Bharadiya }
6373f0be8eaSPankaj Bharadiya
6383f0be8eaSPankaj Bharadiya peri_rxcount = readw(&musbr->ep[ep].epN.rxcount);
639f298e4b6STom Rix if (peri_rxcount) {
640f298e4b6STom Rix struct usb_endpoint_instance *endpoint;
641f298e4b6STom Rix u32 length;
642f298e4b6STom Rix u8 *data;
643f298e4b6STom Rix
644f298e4b6STom Rix endpoint = GET_ENDPOINT(udc_device, ep);
645f298e4b6STom Rix if (endpoint && endpoint->rcv_urb) {
646f298e4b6STom Rix struct urb *urb = endpoint->rcv_urb;
647f298e4b6STom Rix unsigned int remaining_space = urb->buffer_length -
648f298e4b6STom Rix urb->actual_length;
649f298e4b6STom Rix
650f298e4b6STom Rix if (remaining_space) {
651f298e4b6STom Rix int urb_bad = 0; /* urb is good */
652f298e4b6STom Rix
653f298e4b6STom Rix if (peri_rxcount > remaining_space)
654f298e4b6STom Rix length = remaining_space;
655f298e4b6STom Rix else
656f298e4b6STom Rix length = peri_rxcount;
657f298e4b6STom Rix
658f298e4b6STom Rix data = (u8 *) urb->buffer_data;
659f298e4b6STom Rix data += urb->actual_length;
660f298e4b6STom Rix
661f298e4b6STom Rix /* The common musb fifo reader */
662f298e4b6STom Rix read_fifo(ep, length, data);
663f298e4b6STom Rix
664f298e4b6STom Rix musb_peri_rx_ack(ep);
665f298e4b6STom Rix
666f298e4b6STom Rix /*
667f298e4b6STom Rix * urb's actual_length is updated in
668f298e4b6STom Rix * usbd_rcv_complete
669f298e4b6STom Rix */
670f298e4b6STom Rix usbd_rcv_complete(endpoint, length, urb_bad);
671f298e4b6STom Rix
672f298e4b6STom Rix } else {
673f298e4b6STom Rix if (debug_level > 0)
674f298e4b6STom Rix serial_printf("ERROR : %s %d no space "
675f298e4b6STom Rix "in rcv buffer\n",
676f298e4b6STom Rix __PRETTY_FUNCTION__, ep);
677f298e4b6STom Rix }
678f298e4b6STom Rix } else {
679f298e4b6STom Rix if (debug_level > 0)
680f298e4b6STom Rix serial_printf("ERROR : %s %d problem with "
681f298e4b6STom Rix "endpoint\n",
682f298e4b6STom Rix __PRETTY_FUNCTION__, ep);
683f298e4b6STom Rix }
684f298e4b6STom Rix
685f298e4b6STom Rix } else {
686f298e4b6STom Rix if (debug_level > 0)
687f298e4b6STom Rix serial_printf("ERROR : %s %d with nothing to do\n",
688f298e4b6STom Rix __PRETTY_FUNCTION__, ep);
689f298e4b6STom Rix }
690f298e4b6STom Rix }
691f298e4b6STom Rix
musb_peri_rx(u16 intr)692f298e4b6STom Rix static void musb_peri_rx(u16 intr)
693f298e4b6STom Rix {
694f298e4b6STom Rix unsigned int ep;
695f298e4b6STom Rix
696f298e4b6STom Rix /* Check for EP0 */
697f298e4b6STom Rix if (0x01 & intr)
698f298e4b6STom Rix musb_peri_ep0();
699f298e4b6STom Rix
700f298e4b6STom Rix for (ep = 1; ep < 16; ep++) {
701f298e4b6STom Rix if ((1 << ep) & intr)
702f298e4b6STom Rix musb_peri_rx_ep(ep);
703f298e4b6STom Rix }
704f298e4b6STom Rix }
705f298e4b6STom Rix
musb_peri_tx(u16 intr)706f298e4b6STom Rix static void musb_peri_tx(u16 intr)
707f298e4b6STom Rix {
708f298e4b6STom Rix /* Check for EP0 */
709f298e4b6STom Rix if (0x01 & intr)
710f298e4b6STom Rix musb_peri_ep0_tx();
711f298e4b6STom Rix
712f298e4b6STom Rix /*
713f298e4b6STom Rix * Use this in the future when handling epN tx
714f298e4b6STom Rix *
715f298e4b6STom Rix * u8 ep;
716f298e4b6STom Rix *
717f298e4b6STom Rix * for (ep = 1; ep < 16; ep++) {
718f298e4b6STom Rix * if ((1 << ep) & intr) {
719f298e4b6STom Rix * / * handle tx for this endpoint * /
720f298e4b6STom Rix * }
721f298e4b6STom Rix * }
722f298e4b6STom Rix */
723f298e4b6STom Rix }
724f298e4b6STom Rix
udc_irq(void)725f298e4b6STom Rix void udc_irq(void)
726f298e4b6STom Rix {
727f298e4b6STom Rix /* This is a high freq called function */
728f298e4b6STom Rix if (enabled) {
729f298e4b6STom Rix u8 intrusb;
730f298e4b6STom Rix
731f298e4b6STom Rix intrusb = readb(&musbr->intrusb);
732f298e4b6STom Rix
733f298e4b6STom Rix /*
734f298e4b6STom Rix * See drivers/usb/gadget/mpc8xx_udc.c for
735f298e4b6STom Rix * state diagram going from detached through
736f298e4b6STom Rix * configuration.
737f298e4b6STom Rix */
738f298e4b6STom Rix if (MUSB_INTR_RESUME & intrusb) {
739f298e4b6STom Rix usbd_device_event_irq(udc_device,
740f298e4b6STom Rix DEVICE_BUS_ACTIVITY, 0);
741f298e4b6STom Rix musb_peri_resume();
742f298e4b6STom Rix }
743f298e4b6STom Rix
744f298e4b6STom Rix musb_peri_ep0();
745f298e4b6STom Rix
746f298e4b6STom Rix if (MUSB_INTR_RESET & intrusb) {
747f298e4b6STom Rix usbd_device_event_irq(udc_device, DEVICE_RESET, 0);
748f298e4b6STom Rix musb_peri_reset();
749f298e4b6STom Rix }
750f298e4b6STom Rix
751f298e4b6STom Rix if (MUSB_INTR_DISCONNECT & intrusb) {
752f298e4b6STom Rix /* cable unplugged from hub/host */
753f298e4b6STom Rix usbd_device_event_irq(udc_device, DEVICE_RESET, 0);
754f298e4b6STom Rix musb_peri_reset();
755f298e4b6STom Rix usbd_device_event_irq(udc_device, DEVICE_HUB_RESET, 0);
756f298e4b6STom Rix }
757f298e4b6STom Rix
758f298e4b6STom Rix if (MUSB_INTR_SOF & intrusb) {
759f298e4b6STom Rix usbd_device_event_irq(udc_device,
760f298e4b6STom Rix DEVICE_BUS_ACTIVITY, 0);
761f298e4b6STom Rix musb_peri_resume();
762f298e4b6STom Rix }
763f298e4b6STom Rix
764f298e4b6STom Rix if (MUSB_INTR_SUSPEND & intrusb) {
765f298e4b6STom Rix usbd_device_event_irq(udc_device,
766f298e4b6STom Rix DEVICE_BUS_INACTIVE, 0);
767f298e4b6STom Rix }
768f298e4b6STom Rix
769f298e4b6STom Rix if (ep0_state != SET_ADDRESS) {
770f298e4b6STom Rix u16 intrrx, intrtx;
771f298e4b6STom Rix
772f298e4b6STom Rix intrrx = readw(&musbr->intrrx);
773f298e4b6STom Rix intrtx = readw(&musbr->intrtx);
774f298e4b6STom Rix
775f298e4b6STom Rix if (intrrx)
776f298e4b6STom Rix musb_peri_rx(intrrx);
777f298e4b6STom Rix
778f298e4b6STom Rix if (intrtx)
779f298e4b6STom Rix musb_peri_tx(intrtx);
780f298e4b6STom Rix } else {
781f298e4b6STom Rix if (MUSB_INTR_SOF & intrusb) {
782f298e4b6STom Rix u8 faddr;
783f298e4b6STom Rix faddr = readb(&musbr->faddr);
784f298e4b6STom Rix /*
785f298e4b6STom Rix * Setting of the address can fail.
786f298e4b6STom Rix * Normally it succeeds the second time.
787f298e4b6STom Rix */
788f298e4b6STom Rix if (udc_device->address != faddr)
789f298e4b6STom Rix musb_peri_ep0_set_address();
790f298e4b6STom Rix }
791f298e4b6STom Rix }
792f298e4b6STom Rix }
793f298e4b6STom Rix }
794f298e4b6STom Rix
udc_set_nak(int ep_num)795f298e4b6STom Rix void udc_set_nak(int ep_num)
796f298e4b6STom Rix {
797f298e4b6STom Rix /* noop */
798f298e4b6STom Rix }
799f298e4b6STom Rix
udc_unset_nak(int ep_num)800f298e4b6STom Rix void udc_unset_nak(int ep_num)
801f298e4b6STom Rix {
802f298e4b6STom Rix /* noop */
803f298e4b6STom Rix }
804f298e4b6STom Rix
udc_endpoint_write(struct usb_endpoint_instance * endpoint)805f298e4b6STom Rix int udc_endpoint_write(struct usb_endpoint_instance *endpoint)
806f298e4b6STom Rix {
807f298e4b6STom Rix int ret = 0;
808f298e4b6STom Rix
809f298e4b6STom Rix /* Transmit only if the hardware is available */
810f298e4b6STom Rix if (endpoint->tx_urb && endpoint->state == 0) {
811f298e4b6STom Rix unsigned int ep = endpoint->endpoint_address &
812f298e4b6STom Rix USB_ENDPOINT_NUMBER_MASK;
813f298e4b6STom Rix
814f298e4b6STom Rix u16 peri_txcsr = readw(&musbr->ep[ep].epN.txcsr);
815f298e4b6STom Rix
816f298e4b6STom Rix /* Error conditions */
817f298e4b6STom Rix if (peri_txcsr & MUSB_TXCSR_P_UNDERRUN) {
818f298e4b6STom Rix peri_txcsr &= ~MUSB_TXCSR_P_UNDERRUN;
819f298e4b6STom Rix writew(peri_txcsr, &musbr->ep[ep].epN.txcsr);
820f298e4b6STom Rix }
821f298e4b6STom Rix
822f298e4b6STom Rix if (debug_level > 1)
823f298e4b6STom Rix musb_print_txcsr(peri_txcsr);
824f298e4b6STom Rix
825f298e4b6STom Rix /* Check if a packet is waiting to be sent */
826f298e4b6STom Rix if (!(peri_txcsr & MUSB_TXCSR_TXPKTRDY)) {
827f298e4b6STom Rix u32 length;
828f298e4b6STom Rix u8 *data;
829f298e4b6STom Rix struct urb *urb = endpoint->tx_urb;
830f298e4b6STom Rix unsigned int remaining_packet = urb->actual_length -
831f298e4b6STom Rix endpoint->sent;
832f298e4b6STom Rix
833f298e4b6STom Rix if (endpoint->tx_packetSize < remaining_packet)
834f298e4b6STom Rix length = endpoint->tx_packetSize;
835f298e4b6STom Rix else
836f298e4b6STom Rix length = remaining_packet;
837f298e4b6STom Rix
838f298e4b6STom Rix data = (u8 *) urb->buffer;
839f298e4b6STom Rix data += endpoint->sent;
840f298e4b6STom Rix
841f298e4b6STom Rix /* common musb fifo function */
842f298e4b6STom Rix write_fifo(ep, length, data);
843f298e4b6STom Rix
844f298e4b6STom Rix musb_peri_tx_ready(ep);
845f298e4b6STom Rix
846f298e4b6STom Rix endpoint->last = length;
847f298e4b6STom Rix /* usbd_tx_complete will take care of updating 'sent' */
848f298e4b6STom Rix usbd_tx_complete(endpoint);
849f298e4b6STom Rix }
850f298e4b6STom Rix } else {
851f298e4b6STom Rix if (debug_level > 0)
852f298e4b6STom Rix serial_printf("ERROR : %s Problem with urb %p "
853f298e4b6STom Rix "or ep state %d\n",
854f298e4b6STom Rix __PRETTY_FUNCTION__,
855f298e4b6STom Rix endpoint->tx_urb, endpoint->state);
856f298e4b6STom Rix }
857f298e4b6STom Rix
858f298e4b6STom Rix return ret;
859f298e4b6STom Rix }
860f298e4b6STom Rix
udc_setup_ep(struct usb_device_instance * device,unsigned int id,struct usb_endpoint_instance * endpoint)861f298e4b6STom Rix void udc_setup_ep(struct usb_device_instance *device, unsigned int id,
862f298e4b6STom Rix struct usb_endpoint_instance *endpoint)
863f298e4b6STom Rix {
864f298e4b6STom Rix if (0 == id) {
865f298e4b6STom Rix /* EP0 */
866f298e4b6STom Rix ep0_endpoint = endpoint;
867f298e4b6STom Rix ep0_endpoint->endpoint_address = 0xff;
868f298e4b6STom Rix ep0_urb = usbd_alloc_urb(device, endpoint);
869f298e4b6STom Rix } else if (MAX_ENDPOINT >= id) {
870f298e4b6STom Rix int ep_addr;
871f298e4b6STom Rix
872f298e4b6STom Rix /* Check the direction */
873f298e4b6STom Rix ep_addr = endpoint->endpoint_address;
874f298e4b6STom Rix if (USB_DIR_IN == (ep_addr & USB_ENDPOINT_DIR_MASK)) {
875f298e4b6STom Rix /* IN */
876f298e4b6STom Rix epinfo[(id * 2) + 1].epsize = endpoint->tx_packetSize;
877f298e4b6STom Rix } else {
878f298e4b6STom Rix /* OUT */
879f298e4b6STom Rix epinfo[id * 2].epsize = endpoint->rcv_packetSize;
880f298e4b6STom Rix }
881f298e4b6STom Rix
882e31dc61eSAxel Lin musb_configure_ep(&epinfo[0], ARRAY_SIZE(epinfo));
883f298e4b6STom Rix } else {
884f298e4b6STom Rix if (debug_level > 0)
885f298e4b6STom Rix serial_printf("ERROR : %s endpoint request %d "
886f298e4b6STom Rix "exceeds maximum %d\n",
887f298e4b6STom Rix __PRETTY_FUNCTION__, id, MAX_ENDPOINT);
888f298e4b6STom Rix }
889f298e4b6STom Rix }
890f298e4b6STom Rix
udc_connect(void)891f298e4b6STom Rix void udc_connect(void)
892f298e4b6STom Rix {
893f298e4b6STom Rix /* noop */
894f298e4b6STom Rix }
895f298e4b6STom Rix
udc_disconnect(void)896f298e4b6STom Rix void udc_disconnect(void)
897f298e4b6STom Rix {
898f298e4b6STom Rix /* noop */
899f298e4b6STom Rix }
900f298e4b6STom Rix
udc_enable(struct usb_device_instance * device)901f298e4b6STom Rix void udc_enable(struct usb_device_instance *device)
902f298e4b6STom Rix {
903f298e4b6STom Rix /* Save the device structure pointer */
904f298e4b6STom Rix udc_device = device;
905f298e4b6STom Rix
906f298e4b6STom Rix enabled = 1;
907f298e4b6STom Rix }
908f298e4b6STom Rix
udc_disable(void)909f298e4b6STom Rix void udc_disable(void)
910f298e4b6STom Rix {
911f298e4b6STom Rix enabled = 0;
912f298e4b6STom Rix }
913f298e4b6STom Rix
udc_startup_events(struct usb_device_instance * device)914f298e4b6STom Rix void udc_startup_events(struct usb_device_instance *device)
915f298e4b6STom Rix {
916f298e4b6STom Rix /* The DEVICE_INIT event puts the USB device in the state STATE_INIT. */
917f298e4b6STom Rix usbd_device_event_irq(device, DEVICE_INIT, 0);
918f298e4b6STom Rix
919f298e4b6STom Rix /*
920f298e4b6STom Rix * The DEVICE_CREATE event puts the USB device in the state
921f298e4b6STom Rix * STATE_ATTACHED.
922f298e4b6STom Rix */
923f298e4b6STom Rix usbd_device_event_irq(device, DEVICE_CREATE, 0);
924f298e4b6STom Rix
925f298e4b6STom Rix /* Resets the address to 0 */
926f298e4b6STom Rix usbd_device_event_irq(device, DEVICE_RESET, 0);
927f298e4b6STom Rix
928f298e4b6STom Rix udc_enable(device);
929f298e4b6STom Rix }
930f298e4b6STom Rix
udc_init(void)931f298e4b6STom Rix int udc_init(void)
932f298e4b6STom Rix {
933f298e4b6STom Rix int ret;
934f298e4b6STom Rix int ep_loop;
935f298e4b6STom Rix
936f298e4b6STom Rix ret = musb_platform_init();
937f298e4b6STom Rix if (ret < 0)
938f298e4b6STom Rix goto end;
939f298e4b6STom Rix
940f298e4b6STom Rix /* Configure all the endpoint FIFO's and start usb controller */
941f298e4b6STom Rix musbr = musb_cfg.regs;
942f298e4b6STom Rix
943f298e4b6STom Rix /* Initialize the endpoints */
9447f2e59aeSHeinrich Schuchardt for (ep_loop = 0; ep_loop <= MAX_ENDPOINT * 2; ep_loop++) {
945f298e4b6STom Rix epinfo[ep_loop].epnum = (ep_loop / 2) + 1;
946f298e4b6STom Rix epinfo[ep_loop].epdir = ep_loop % 2; /* OUT, IN */
947f298e4b6STom Rix epinfo[ep_loop].epsize = 0;
948f298e4b6STom Rix }
949f298e4b6STom Rix
950f298e4b6STom Rix musb_peri_softconnect();
951f298e4b6STom Rix
952f298e4b6STom Rix ret = 0;
953f298e4b6STom Rix end:
954f298e4b6STom Rix
955f298e4b6STom Rix return ret;
956f298e4b6STom Rix }
957