xref: /openbmc/u-boot/drivers/usb/eth/asix88179.c (revision 76b2fad775ee3cb58788b11454655ba5a244ac56)
1e9954b86SRene Griessl /*
2e9954b86SRene Griessl  * Copyright (c) 2014 Rene Griessl <rgriessl@cit-ec.uni-bielefeld.de>
3e9954b86SRene Griessl  * based on the U-Boot Asix driver as well as information
4e9954b86SRene Griessl  * from the Linux AX88179_178a driver
5e9954b86SRene Griessl  *
6e9954b86SRene Griessl  * SPDX-License-Identifier:	GPL-2.0+
7e9954b86SRene Griessl  */
8e9954b86SRene Griessl 
9e9954b86SRene Griessl #include <common.h>
10*76b2fad7SAlban Bedel #include <dm.h>
11e9954b86SRene Griessl #include <usb.h>
12e9954b86SRene Griessl #include <net.h>
13e9954b86SRene Griessl #include <linux/mii.h>
14e9954b86SRene Griessl #include "usb_ether.h"
15e9954b86SRene Griessl #include <malloc.h>
16cf92e05cSSimon Glass #include <memalign.h>
17e9954b86SRene Griessl #include <errno.h>
18e9954b86SRene Griessl 
19e9954b86SRene Griessl /* ASIX AX88179 based USB 3.0 Ethernet Devices */
20e9954b86SRene Griessl #define AX88179_PHY_ID				0x03
21e9954b86SRene Griessl #define AX_EEPROM_LEN				0x100
22e9954b86SRene Griessl #define AX88179_EEPROM_MAGIC			0x17900b95
23e9954b86SRene Griessl #define AX_MCAST_FLTSIZE			8
24e9954b86SRene Griessl #define AX_MAX_MCAST				64
25e9954b86SRene Griessl #define AX_INT_PPLS_LINK			(1 << 16)
26e9954b86SRene Griessl #define AX_RXHDR_L4_TYPE_MASK			0x1c
27e9954b86SRene Griessl #define AX_RXHDR_L4_TYPE_UDP			4
28e9954b86SRene Griessl #define AX_RXHDR_L4_TYPE_TCP			16
29e9954b86SRene Griessl #define AX_RXHDR_L3CSUM_ERR			2
30e9954b86SRene Griessl #define AX_RXHDR_L4CSUM_ERR			1
31e9954b86SRene Griessl #define AX_RXHDR_CRC_ERR			(1 << 29)
32e9954b86SRene Griessl #define AX_RXHDR_DROP_ERR			(1 << 31)
33e9954b86SRene Griessl #define AX_ENDPOINT_INT				0x01
34e9954b86SRene Griessl #define AX_ENDPOINT_IN				0x02
35e9954b86SRene Griessl #define AX_ENDPOINT_OUT				0x03
36e9954b86SRene Griessl #define AX_ACCESS_MAC				0x01
37e9954b86SRene Griessl #define AX_ACCESS_PHY				0x02
38e9954b86SRene Griessl #define AX_ACCESS_EEPROM			0x04
39e9954b86SRene Griessl #define AX_ACCESS_EFUS				0x05
40e9954b86SRene Griessl #define AX_PAUSE_WATERLVL_HIGH			0x54
41e9954b86SRene Griessl #define AX_PAUSE_WATERLVL_LOW			0x55
42e9954b86SRene Griessl 
43e9954b86SRene Griessl #define PHYSICAL_LINK_STATUS			0x02
44e9954b86SRene Griessl 	#define	AX_USB_SS		(1 << 2)
45e9954b86SRene Griessl 	#define	AX_USB_HS		(1 << 1)
46e9954b86SRene Griessl 
47e9954b86SRene Griessl #define GENERAL_STATUS				0x03
48e9954b86SRene Griessl 	#define	AX_SECLD		(1 << 2)
49e9954b86SRene Griessl 
50e9954b86SRene Griessl #define AX_SROM_ADDR				0x07
51e9954b86SRene Griessl #define AX_SROM_CMD				0x0a
52e9954b86SRene Griessl 	#define EEP_RD			(1 << 2)
53e9954b86SRene Griessl 	#define EEP_BUSY		(1 << 4)
54e9954b86SRene Griessl 
55e9954b86SRene Griessl #define AX_SROM_DATA_LOW			0x08
56e9954b86SRene Griessl #define AX_SROM_DATA_HIGH			0x09
57e9954b86SRene Griessl 
58e9954b86SRene Griessl #define AX_RX_CTL				0x0b
59e9954b86SRene Griessl 	#define AX_RX_CTL_DROPCRCERR	(1 << 8)
60e9954b86SRene Griessl 	#define AX_RX_CTL_IPE		(1 << 9)
61e9954b86SRene Griessl 	#define AX_RX_CTL_START		(1 << 7)
62e9954b86SRene Griessl 	#define AX_RX_CTL_AP		(1 << 5)
63e9954b86SRene Griessl 	#define AX_RX_CTL_AM		(1 << 4)
64e9954b86SRene Griessl 	#define AX_RX_CTL_AB		(1 << 3)
65e9954b86SRene Griessl 	#define AX_RX_CTL_AMALL		(1 << 1)
66e9954b86SRene Griessl 	#define AX_RX_CTL_PRO		(1 << 0)
67e9954b86SRene Griessl 	#define AX_RX_CTL_STOP		0
68e9954b86SRene Griessl 
69e9954b86SRene Griessl #define AX_NODE_ID				0x10
70e9954b86SRene Griessl #define AX_MULFLTARY				0x16
71e9954b86SRene Griessl 
72e9954b86SRene Griessl #define AX_MEDIUM_STATUS_MODE			0x22
73e9954b86SRene Griessl 	#define AX_MEDIUM_GIGAMODE	(1 << 0)
74e9954b86SRene Griessl 	#define AX_MEDIUM_FULL_DUPLEX	(1 << 1)
75e9954b86SRene Griessl 	#define AX_MEDIUM_EN_125MHZ	(1 << 3)
76e9954b86SRene Griessl 	#define AX_MEDIUM_RXFLOW_CTRLEN	(1 << 4)
77e9954b86SRene Griessl 	#define AX_MEDIUM_TXFLOW_CTRLEN	(1 << 5)
78e9954b86SRene Griessl 	#define AX_MEDIUM_RECEIVE_EN	(1 << 8)
79e9954b86SRene Griessl 	#define AX_MEDIUM_PS		(1 << 9)
80e9954b86SRene Griessl 	#define AX_MEDIUM_JUMBO_EN	0x8040
81e9954b86SRene Griessl 
82e9954b86SRene Griessl #define AX_MONITOR_MOD				0x24
83e9954b86SRene Griessl 	#define AX_MONITOR_MODE_RWLC	(1 << 1)
84e9954b86SRene Griessl 	#define AX_MONITOR_MODE_RWMP	(1 << 2)
85e9954b86SRene Griessl 	#define AX_MONITOR_MODE_PMEPOL	(1 << 5)
86e9954b86SRene Griessl 	#define AX_MONITOR_MODE_PMETYPE	(1 << 6)
87e9954b86SRene Griessl 
88e9954b86SRene Griessl #define AX_GPIO_CTRL				0x25
89e9954b86SRene Griessl 	#define AX_GPIO_CTRL_GPIO3EN	(1 << 7)
90e9954b86SRene Griessl 	#define AX_GPIO_CTRL_GPIO2EN	(1 << 6)
91e9954b86SRene Griessl 	#define AX_GPIO_CTRL_GPIO1EN	(1 << 5)
92e9954b86SRene Griessl 
93e9954b86SRene Griessl #define AX_PHYPWR_RSTCTL			0x26
94e9954b86SRene Griessl 	#define AX_PHYPWR_RSTCTL_BZ	(1 << 4)
95e9954b86SRene Griessl 	#define AX_PHYPWR_RSTCTL_IPRL	(1 << 5)
96e9954b86SRene Griessl 	#define AX_PHYPWR_RSTCTL_AT	(1 << 12)
97e9954b86SRene Griessl 
98e9954b86SRene Griessl #define AX_RX_BULKIN_QCTRL			0x2e
99e9954b86SRene Griessl #define AX_CLK_SELECT				0x33
100e9954b86SRene Griessl 	#define AX_CLK_SELECT_BCS	(1 << 0)
101e9954b86SRene Griessl 	#define AX_CLK_SELECT_ACS	(1 << 1)
102e9954b86SRene Griessl 	#define AX_CLK_SELECT_ULR	(1 << 3)
103e9954b86SRene Griessl 
104e9954b86SRene Griessl #define AX_RXCOE_CTL				0x34
105e9954b86SRene Griessl 	#define AX_RXCOE_IP		(1 << 0)
106e9954b86SRene Griessl 	#define AX_RXCOE_TCP		(1 << 1)
107e9954b86SRene Griessl 	#define AX_RXCOE_UDP		(1 << 2)
108e9954b86SRene Griessl 	#define AX_RXCOE_TCPV6		(1 << 5)
109e9954b86SRene Griessl 	#define AX_RXCOE_UDPV6		(1 << 6)
110e9954b86SRene Griessl 
111e9954b86SRene Griessl #define AX_TXCOE_CTL				0x35
112e9954b86SRene Griessl 	#define AX_TXCOE_IP		(1 << 0)
113e9954b86SRene Griessl 	#define AX_TXCOE_TCP		(1 << 1)
114e9954b86SRene Griessl 	#define AX_TXCOE_UDP		(1 << 2)
115e9954b86SRene Griessl 	#define AX_TXCOE_TCPV6		(1 << 5)
116e9954b86SRene Griessl 	#define AX_TXCOE_UDPV6		(1 << 6)
117e9954b86SRene Griessl 
118e9954b86SRene Griessl #define AX_LEDCTRL				0x73
119e9954b86SRene Griessl 
120e9954b86SRene Griessl #define GMII_PHY_PHYSR				0x11
121e9954b86SRene Griessl 	#define GMII_PHY_PHYSR_SMASK	0xc000
122e9954b86SRene Griessl 	#define GMII_PHY_PHYSR_GIGA	(1 << 15)
123e9954b86SRene Griessl 	#define GMII_PHY_PHYSR_100	(1 << 14)
124e9954b86SRene Griessl 	#define GMII_PHY_PHYSR_FULL	(1 << 13)
125e9954b86SRene Griessl 	#define GMII_PHY_PHYSR_LINK	(1 << 10)
126e9954b86SRene Griessl 
127e9954b86SRene Griessl #define GMII_LED_ACT				0x1a
128e9954b86SRene Griessl 	#define	GMII_LED_ACTIVE_MASK	0xff8f
129e9954b86SRene Griessl 	#define	GMII_LED0_ACTIVE	(1 << 4)
130e9954b86SRene Griessl 	#define	GMII_LED1_ACTIVE	(1 << 5)
131e9954b86SRene Griessl 	#define	GMII_LED2_ACTIVE	(1 << 6)
132e9954b86SRene Griessl 
133e9954b86SRene Griessl #define GMII_LED_LINK				0x1c
134e9954b86SRene Griessl 	#define	GMII_LED_LINK_MASK	0xf888
135e9954b86SRene Griessl 	#define	GMII_LED0_LINK_10	(1 << 0)
136e9954b86SRene Griessl 	#define	GMII_LED0_LINK_100	(1 << 1)
137e9954b86SRene Griessl 	#define	GMII_LED0_LINK_1000	(1 << 2)
138e9954b86SRene Griessl 	#define	GMII_LED1_LINK_10	(1 << 4)
139e9954b86SRene Griessl 	#define	GMII_LED1_LINK_100	(1 << 5)
140e9954b86SRene Griessl 	#define	GMII_LED1_LINK_1000	(1 << 6)
141e9954b86SRene Griessl 	#define	GMII_LED2_LINK_10	(1 << 8)
142e9954b86SRene Griessl 	#define	GMII_LED2_LINK_100	(1 << 9)
143e9954b86SRene Griessl 	#define	GMII_LED2_LINK_1000	(1 << 10)
144e9954b86SRene Griessl 	#define	LED0_ACTIVE		(1 << 0)
145e9954b86SRene Griessl 	#define	LED0_LINK_10		(1 << 1)
146e9954b86SRene Griessl 	#define	LED0_LINK_100		(1 << 2)
147e9954b86SRene Griessl 	#define	LED0_LINK_1000		(1 << 3)
148e9954b86SRene Griessl 	#define	LED0_FD			(1 << 4)
149e9954b86SRene Griessl 	#define	LED0_USB3_MASK		0x001f
150e9954b86SRene Griessl 	#define	LED1_ACTIVE		(1 << 5)
151e9954b86SRene Griessl 	#define	LED1_LINK_10		(1 << 6)
152e9954b86SRene Griessl 	#define	LED1_LINK_100		(1 << 7)
153e9954b86SRene Griessl 	#define	LED1_LINK_1000		(1 << 8)
154e9954b86SRene Griessl 	#define	LED1_FD			(1 << 9)
155e9954b86SRene Griessl 	#define	LED1_USB3_MASK		0x03e0
156e9954b86SRene Griessl 	#define	LED2_ACTIVE		(1 << 10)
157e9954b86SRene Griessl 	#define	LED2_LINK_1000		(1 << 13)
158e9954b86SRene Griessl 	#define	LED2_LINK_100		(1 << 12)
159e9954b86SRene Griessl 	#define	LED2_LINK_10		(1 << 11)
160e9954b86SRene Griessl 	#define	LED2_FD			(1 << 14)
161e9954b86SRene Griessl 	#define	LED_VALID		(1 << 15)
162e9954b86SRene Griessl 	#define	LED2_USB3_MASK		0x7c00
163e9954b86SRene Griessl 
164e9954b86SRene Griessl #define GMII_PHYPAGE				0x1e
165e9954b86SRene Griessl #define GMII_PHY_PAGE_SELECT			0x1f
166e9954b86SRene Griessl 	#define GMII_PHY_PGSEL_EXT	0x0007
167e9954b86SRene Griessl 	#define GMII_PHY_PGSEL_PAGE0	0x0000
168e9954b86SRene Griessl 
169e9954b86SRene Griessl /* local defines */
170e9954b86SRene Griessl #define ASIX_BASE_NAME "axg"
171e9954b86SRene Griessl #define USB_CTRL_SET_TIMEOUT 5000
172e9954b86SRene Griessl #define USB_CTRL_GET_TIMEOUT 5000
173e9954b86SRene Griessl #define USB_BULK_SEND_TIMEOUT 5000
174e9954b86SRene Griessl #define USB_BULK_RECV_TIMEOUT 5000
175e9954b86SRene Griessl 
176e9954b86SRene Griessl #define AX_RX_URB_SIZE 1024 * 0x12
177e9954b86SRene Griessl #define BLK_FRAME_SIZE 0x200
178e9954b86SRene Griessl #define PHY_CONNECT_TIMEOUT 5000
179e9954b86SRene Griessl 
180e9954b86SRene Griessl #define TIMEOUT_RESOLUTION 50	/* ms */
181e9954b86SRene Griessl 
182e9954b86SRene Griessl #define FLAG_NONE			0
183e9954b86SRene Griessl #define FLAG_TYPE_AX88179	(1U << 0)
184e9954b86SRene Griessl #define FLAG_TYPE_AX88178a	(1U << 1)
185e9954b86SRene Griessl #define FLAG_TYPE_DLINK_DUB1312	(1U << 2)
186e9954b86SRene Griessl #define FLAG_TYPE_SITECOM	(1U << 3)
187e9954b86SRene Griessl #define FLAG_TYPE_SAMSUNG	(1U << 4)
188e9954b86SRene Griessl #define FLAG_TYPE_LENOVO	(1U << 5)
189652b2694SAlban Bedel #define FLAG_TYPE_GX3		(1U << 6)
190e9954b86SRene Griessl 
191e9954b86SRene Griessl /* local vars */
192e9954b86SRene Griessl static const struct {
193e9954b86SRene Griessl 	unsigned char ctrl, timer_l, timer_h, size, ifg;
194e9954b86SRene Griessl } AX88179_BULKIN_SIZE[] =	{
195e9954b86SRene Griessl 	{7, 0x4f, 0,	0x02, 0xff},
196e9954b86SRene Griessl 	{7, 0x20, 3,	0x03, 0xff},
197e9954b86SRene Griessl 	{7, 0xae, 7,	0x04, 0xff},
198e9954b86SRene Griessl 	{7, 0xcc, 0x4c, 0x04, 8},
199e9954b86SRene Griessl };
200e9954b86SRene Griessl 
201*76b2fad7SAlban Bedel #ifndef CONFIG_DM_ETH
202e9954b86SRene Griessl static int curr_eth_dev; /* index for name of next device detected */
203*76b2fad7SAlban Bedel #endif
204e9954b86SRene Griessl 
205e9954b86SRene Griessl /* driver private */
206e9954b86SRene Griessl struct asix_private {
207*76b2fad7SAlban Bedel #ifdef CONFIG_DM_ETH
208*76b2fad7SAlban Bedel 	struct ueth_data ueth;
209*76b2fad7SAlban Bedel 	unsigned pkt_cnt;
210*76b2fad7SAlban Bedel 	uint8_t *pkt_data;
211*76b2fad7SAlban Bedel 	uint32_t *pkt_hdr;
212*76b2fad7SAlban Bedel #endif
213e9954b86SRene Griessl 	int flags;
214e9954b86SRene Griessl 	int rx_urb_size;
215e9954b86SRene Griessl 	int maxpacketsize;
216e9954b86SRene Griessl };
217e9954b86SRene Griessl 
218e9954b86SRene Griessl /*
219e9954b86SRene Griessl  * Asix infrastructure commands
220e9954b86SRene Griessl  */
221e9954b86SRene Griessl static int asix_write_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index,
222e9954b86SRene Griessl 			     u16 size, void *data)
223e9954b86SRene Griessl {
224e9954b86SRene Griessl 	int len;
225e9954b86SRene Griessl 	ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, size);
226e9954b86SRene Griessl 
227e9954b86SRene Griessl 	debug("asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
228e9954b86SRene Griessl 	      cmd, value, index, size);
229e9954b86SRene Griessl 
230e9954b86SRene Griessl 	memcpy(buf, data, size);
231e9954b86SRene Griessl 
232e9954b86SRene Griessl 	len = usb_control_msg(
233e9954b86SRene Griessl 		dev->pusb_dev,
234e9954b86SRene Griessl 		usb_sndctrlpipe(dev->pusb_dev, 0),
235e9954b86SRene Griessl 		cmd,
236e9954b86SRene Griessl 		USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
237e9954b86SRene Griessl 		value,
238e9954b86SRene Griessl 		index,
239e9954b86SRene Griessl 		buf,
240e9954b86SRene Griessl 		size,
241e9954b86SRene Griessl 		USB_CTRL_SET_TIMEOUT);
242e9954b86SRene Griessl 
243e9954b86SRene Griessl 	return len == size ? 0 : ECOMM;
244e9954b86SRene Griessl }
245e9954b86SRene Griessl 
246e9954b86SRene Griessl static int asix_read_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index,
247e9954b86SRene Griessl 			    u16 size, void *data)
248e9954b86SRene Griessl {
249e9954b86SRene Griessl 	int len;
250e9954b86SRene Griessl 	ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, size);
251e9954b86SRene Griessl 
252e9954b86SRene Griessl 	debug("asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
253e9954b86SRene Griessl 	      cmd, value, index, size);
254e9954b86SRene Griessl 
255e9954b86SRene Griessl 	len = usb_control_msg(
256e9954b86SRene Griessl 		dev->pusb_dev,
257e9954b86SRene Griessl 		usb_rcvctrlpipe(dev->pusb_dev, 0),
258e9954b86SRene Griessl 		cmd,
259e9954b86SRene Griessl 		USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
260e9954b86SRene Griessl 		value,
261e9954b86SRene Griessl 		index,
262e9954b86SRene Griessl 		buf,
263e9954b86SRene Griessl 		size,
264e9954b86SRene Griessl 		USB_CTRL_GET_TIMEOUT);
265e9954b86SRene Griessl 
266e9954b86SRene Griessl 	memcpy(data, buf, size);
267e9954b86SRene Griessl 
268e9954b86SRene Griessl 	return len == size ? 0 : ECOMM;
269e9954b86SRene Griessl }
270e9954b86SRene Griessl 
271620452e7SAlban Bedel static int asix_read_mac(struct ueth_data *dev, uint8_t *enetaddr)
272e9954b86SRene Griessl {
273620452e7SAlban Bedel 	int ret;
274e9954b86SRene Griessl 
275620452e7SAlban Bedel 	ret = asix_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, 6, 6, enetaddr);
276620452e7SAlban Bedel 	if (ret < 0)
277620452e7SAlban Bedel 		debug("Failed to read MAC address: %02x\n", ret);
278e9954b86SRene Griessl 
279620452e7SAlban Bedel 	return ret;
280e9954b86SRene Griessl }
281e9954b86SRene Griessl 
282620452e7SAlban Bedel static int asix_write_mac(struct ueth_data *dev, uint8_t *enetaddr)
28311933975SRene Griessl {
28411933975SRene Griessl 	int ret;
28511933975SRene Griessl 
28611933975SRene Griessl 	ret = asix_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
287620452e7SAlban Bedel 				 ETH_ALEN, enetaddr);
28811933975SRene Griessl 	if (ret < 0)
28911933975SRene Griessl 		debug("Failed to set MAC address: %02x\n", ret);
29011933975SRene Griessl 
29111933975SRene Griessl 	return ret;
29211933975SRene Griessl }
29311933975SRene Griessl 
294620452e7SAlban Bedel static int asix_basic_reset(struct ueth_data *dev,
295620452e7SAlban Bedel 			struct asix_private *dev_priv)
296e9954b86SRene Griessl {
297e9954b86SRene Griessl 	u8 buf[5];
298e9954b86SRene Griessl 	u16 *tmp16;
299e9954b86SRene Griessl 	u8 *tmp;
300e9954b86SRene Griessl 
301e9954b86SRene Griessl 	tmp16 = (u16 *)buf;
302e9954b86SRene Griessl 	tmp = (u8 *)buf;
303e9954b86SRene Griessl 
304e9954b86SRene Griessl 	/* Power up ethernet PHY */
305e9954b86SRene Griessl 	*tmp16 = 0;
306e9954b86SRene Griessl 	asix_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
307e9954b86SRene Griessl 
308e9954b86SRene Griessl 	*tmp16 = AX_PHYPWR_RSTCTL_IPRL;
309e9954b86SRene Griessl 	asix_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
310e9954b86SRene Griessl 	mdelay(200);
311e9954b86SRene Griessl 
312e9954b86SRene Griessl 	*tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
313e9954b86SRene Griessl 	asix_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
314e9954b86SRene Griessl 	mdelay(200);
315e9954b86SRene Griessl 
316e9954b86SRene Griessl 	/* RX bulk configuration */
317e9954b86SRene Griessl 	memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
318e9954b86SRene Griessl 	asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
319e9954b86SRene Griessl 
320e9954b86SRene Griessl 	dev_priv->rx_urb_size = 128 * 20;
321e9954b86SRene Griessl 
322e9954b86SRene Griessl 	/* Water Level configuration */
323e9954b86SRene Griessl 	*tmp = 0x34;
324e9954b86SRene Griessl 	asix_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
325e9954b86SRene Griessl 
326e9954b86SRene Griessl 	*tmp = 0x52;
327e9954b86SRene Griessl 	asix_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH, 1, 1, tmp);
328e9954b86SRene Griessl 
329e9954b86SRene Griessl 	/* Enable checksum offload */
330e9954b86SRene Griessl 	*tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
331e9954b86SRene Griessl 	       AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
332e9954b86SRene Griessl 	asix_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
333e9954b86SRene Griessl 
334e9954b86SRene Griessl 	*tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
335e9954b86SRene Griessl 	       AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
336e9954b86SRene Griessl 	asix_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
337e9954b86SRene Griessl 
338e9954b86SRene Griessl 	/* Configure RX control register => start operation */
339e9954b86SRene Griessl 	*tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
340e9954b86SRene Griessl 		 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
341e9954b86SRene Griessl 	asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
342e9954b86SRene Griessl 
343e9954b86SRene Griessl 	*tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
344e9954b86SRene Griessl 	       AX_MONITOR_MODE_RWMP;
345e9954b86SRene Griessl 	asix_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
346e9954b86SRene Griessl 
347e9954b86SRene Griessl 	/* Configure default medium type => giga */
348e9954b86SRene Griessl 	*tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
349e9954b86SRene Griessl 		 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
350e9954b86SRene Griessl 		 AX_MEDIUM_GIGAMODE | AX_MEDIUM_JUMBO_EN;
351e9954b86SRene Griessl 	asix_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, tmp16);
352e9954b86SRene Griessl 
353e9954b86SRene Griessl 	u16 adv = 0;
354e9954b86SRene Griessl 	adv = ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_LPACK |
355e9954b86SRene Griessl 	      ADVERTISE_NPAGE | ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP;
356e9954b86SRene Griessl 	asix_write_cmd(dev, AX_ACCESS_PHY, 0x03, MII_ADVERTISE, 2, &adv);
357e9954b86SRene Griessl 
358e9954b86SRene Griessl 	adv = ADVERTISE_1000FULL;
359e9954b86SRene Griessl 	asix_write_cmd(dev, AX_ACCESS_PHY, 0x03, MII_CTRL1000, 2, &adv);
360e9954b86SRene Griessl 
361e9954b86SRene Griessl 	return 0;
362e9954b86SRene Griessl }
363e9954b86SRene Griessl 
364e9954b86SRene Griessl static int asix_wait_link(struct ueth_data *dev)
365e9954b86SRene Griessl {
366e9954b86SRene Griessl 	int timeout = 0;
367e9954b86SRene Griessl 	int link_detected;
368e9954b86SRene Griessl 	u8 buf[2];
369e9954b86SRene Griessl 	u16 *tmp16;
370e9954b86SRene Griessl 
371e9954b86SRene Griessl 	tmp16 = (u16 *)buf;
372e9954b86SRene Griessl 
373e9954b86SRene Griessl 	do {
374e9954b86SRene Griessl 		asix_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
375e9954b86SRene Griessl 			      MII_BMSR, 2, buf);
376e9954b86SRene Griessl 		link_detected = *tmp16 & BMSR_LSTATUS;
377e9954b86SRene Griessl 		if (!link_detected) {
378e9954b86SRene Griessl 			if (timeout == 0)
379e9954b86SRene Griessl 				printf("Waiting for Ethernet connection... ");
380e9954b86SRene Griessl 			mdelay(TIMEOUT_RESOLUTION);
381e9954b86SRene Griessl 			timeout += TIMEOUT_RESOLUTION;
382e9954b86SRene Griessl 		}
383e9954b86SRene Griessl 	} while (!link_detected && timeout < PHY_CONNECT_TIMEOUT);
384e9954b86SRene Griessl 
385e9954b86SRene Griessl 	if (link_detected) {
386e9954b86SRene Griessl 		if (timeout > 0)
387e9954b86SRene Griessl 			printf("done.\n");
388e9954b86SRene Griessl 		return 0;
389e9954b86SRene Griessl 	} else {
390e9954b86SRene Griessl 		printf("unable to connect.\n");
391e9954b86SRene Griessl 		return -ENETUNREACH;
392e9954b86SRene Griessl 	}
393e9954b86SRene Griessl }
394e9954b86SRene Griessl 
395620452e7SAlban Bedel static int asix_init_common(struct ueth_data *dev,
396620452e7SAlban Bedel 			struct asix_private *dev_priv)
397e9954b86SRene Griessl {
398e9954b86SRene Griessl 	u8 buf[2], tmp[5], link_sts;
399e9954b86SRene Griessl 	u16 *tmp16, mode;
400e9954b86SRene Griessl 
401e9954b86SRene Griessl 
402e9954b86SRene Griessl 	tmp16 = (u16 *)buf;
403e9954b86SRene Griessl 
404e9954b86SRene Griessl 	debug("** %s()\n", __func__);
405e9954b86SRene Griessl 
406e9954b86SRene Griessl 	/* Configure RX control register => start operation */
407e9954b86SRene Griessl 	*tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
408e9954b86SRene Griessl 		 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
409e9954b86SRene Griessl 	if (asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16) != 0)
410e9954b86SRene Griessl 		goto out_err;
411e9954b86SRene Griessl 
412e9954b86SRene Griessl 	if (asix_wait_link(dev) != 0) {
413e9954b86SRene Griessl 		/*reset device and try again*/
414e9954b86SRene Griessl 		printf("Reset Ethernet Device\n");
415620452e7SAlban Bedel 		asix_basic_reset(dev, dev_priv);
416e9954b86SRene Griessl 		if (asix_wait_link(dev) != 0)
417e9954b86SRene Griessl 			goto out_err;
418e9954b86SRene Griessl 	}
419e9954b86SRene Griessl 
420e9954b86SRene Griessl 	/* Configure link */
421e9954b86SRene Griessl 	mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
422e9954b86SRene Griessl 	       AX_MEDIUM_RXFLOW_CTRLEN;
423e9954b86SRene Griessl 
424e9954b86SRene Griessl 	asix_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
425e9954b86SRene Griessl 		      1, 1, &link_sts);
426e9954b86SRene Griessl 
427e9954b86SRene Griessl 	asix_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
428e9954b86SRene Griessl 		      GMII_PHY_PHYSR, 2, tmp16);
429e9954b86SRene Griessl 
430e9954b86SRene Griessl 	if (!(*tmp16 & GMII_PHY_PHYSR_LINK)) {
431e9954b86SRene Griessl 		return 0;
432e9954b86SRene Griessl 	} else if (GMII_PHY_PHYSR_GIGA == (*tmp16 & GMII_PHY_PHYSR_SMASK)) {
433e9954b86SRene Griessl 		mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ |
434e9954b86SRene Griessl 			AX_MEDIUM_JUMBO_EN;
435e9954b86SRene Griessl 
436e9954b86SRene Griessl 		if (link_sts & AX_USB_SS)
437e9954b86SRene Griessl 			memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
438e9954b86SRene Griessl 		else if (link_sts & AX_USB_HS)
439e9954b86SRene Griessl 			memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
440e9954b86SRene Griessl 		else
441e9954b86SRene Griessl 			memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
442e9954b86SRene Griessl 	} else if (GMII_PHY_PHYSR_100 == (*tmp16 & GMII_PHY_PHYSR_SMASK)) {
443e9954b86SRene Griessl 		mode |= AX_MEDIUM_PS;
444e9954b86SRene Griessl 
445e9954b86SRene Griessl 		if (link_sts & (AX_USB_SS | AX_USB_HS))
446e9954b86SRene Griessl 			memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
447e9954b86SRene Griessl 		else
448e9954b86SRene Griessl 			memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
449e9954b86SRene Griessl 	} else {
450e9954b86SRene Griessl 		memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
451e9954b86SRene Griessl 	}
452e9954b86SRene Griessl 
453e9954b86SRene Griessl 	/* RX bulk configuration */
454e9954b86SRene Griessl 	asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
455e9954b86SRene Griessl 
456e9954b86SRene Griessl 	dev_priv->rx_urb_size = (1024 * (tmp[3] + 2));
457e9954b86SRene Griessl 	if (*tmp16 & GMII_PHY_PHYSR_FULL)
458e9954b86SRene Griessl 		mode |= AX_MEDIUM_FULL_DUPLEX;
459e9954b86SRene Griessl 	asix_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
460e9954b86SRene Griessl 		       2, 2, &mode);
461e9954b86SRene Griessl 
462e9954b86SRene Griessl 	return 0;
463e9954b86SRene Griessl out_err:
464e9954b86SRene Griessl 	return -1;
465e9954b86SRene Griessl }
466e9954b86SRene Griessl 
467620452e7SAlban Bedel static int asix_send_common(struct ueth_data *dev,
468620452e7SAlban Bedel 			struct asix_private *dev_priv,
469620452e7SAlban Bedel 			void *packet, int length)
470e9954b86SRene Griessl {
471e9954b86SRene Griessl 	int err;
472e9954b86SRene Griessl 	u32 packet_len, tx_hdr2;
473e9954b86SRene Griessl 	int actual_len, framesize;
474e9954b86SRene Griessl 	ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg,
475e9954b86SRene Griessl 				 PKTSIZE + (2 * sizeof(packet_len)));
476e9954b86SRene Griessl 
477e9954b86SRene Griessl 	debug("** %s(), len %d\n", __func__, length);
478e9954b86SRene Griessl 
479e9954b86SRene Griessl 	packet_len = length;
480e9954b86SRene Griessl 	cpu_to_le32s(&packet_len);
481e9954b86SRene Griessl 
482e9954b86SRene Griessl 	memcpy(msg, &packet_len, sizeof(packet_len));
483e9954b86SRene Griessl 	framesize = dev_priv->maxpacketsize;
484e9954b86SRene Griessl 	tx_hdr2 = 0;
485e9954b86SRene Griessl 	if (((length + 8) % framesize) == 0)
486e9954b86SRene Griessl 		tx_hdr2 |= 0x80008000;	/* Enable padding */
487e9954b86SRene Griessl 
488e9954b86SRene Griessl 	cpu_to_le32s(&tx_hdr2);
489e9954b86SRene Griessl 
490e9954b86SRene Griessl 	memcpy(msg + sizeof(packet_len), &tx_hdr2, sizeof(tx_hdr2));
491e9954b86SRene Griessl 
492e9954b86SRene Griessl 	memcpy(msg + sizeof(packet_len) + sizeof(tx_hdr2),
493e9954b86SRene Griessl 	       (void *)packet, length);
494e9954b86SRene Griessl 
495e9954b86SRene Griessl 	err = usb_bulk_msg(dev->pusb_dev,
496e9954b86SRene Griessl 				usb_sndbulkpipe(dev->pusb_dev, dev->ep_out),
497e9954b86SRene Griessl 				(void *)msg,
498e9954b86SRene Griessl 				length + sizeof(packet_len) + sizeof(tx_hdr2),
499e9954b86SRene Griessl 				&actual_len,
500e9954b86SRene Griessl 				USB_BULK_SEND_TIMEOUT);
50164160a54SMateusz Kulikowski 	debug("Tx: len = %zu, actual = %u, err = %d\n",
502e9954b86SRene Griessl 	      length + sizeof(packet_len), actual_len, err);
503e9954b86SRene Griessl 
504e9954b86SRene Griessl 	return err;
505e9954b86SRene Griessl }
506e9954b86SRene Griessl 
507*76b2fad7SAlban Bedel #ifndef CONFIG_DM_ETH
508620452e7SAlban Bedel /*
509620452e7SAlban Bedel  * Asix callbacks
510620452e7SAlban Bedel  */
511620452e7SAlban Bedel static int asix_init(struct eth_device *eth, bd_t *bd)
512620452e7SAlban Bedel {
513620452e7SAlban Bedel 	struct ueth_data *dev = (struct ueth_data *)eth->priv;
514620452e7SAlban Bedel 	struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv;
515620452e7SAlban Bedel 
516620452e7SAlban Bedel 	return asix_init_common(dev, dev_priv);
517620452e7SAlban Bedel }
518620452e7SAlban Bedel 
519620452e7SAlban Bedel static int asix_write_hwaddr(struct eth_device *eth)
520620452e7SAlban Bedel {
521620452e7SAlban Bedel 	struct ueth_data *dev = (struct ueth_data *)eth->priv;
522620452e7SAlban Bedel 
523620452e7SAlban Bedel 	return asix_write_mac(dev, eth->enetaddr);
524620452e7SAlban Bedel }
525620452e7SAlban Bedel 
526620452e7SAlban Bedel static int asix_send(struct eth_device *eth, void *packet, int length)
527620452e7SAlban Bedel {
528620452e7SAlban Bedel 	struct ueth_data *dev = (struct ueth_data *)eth->priv;
529620452e7SAlban Bedel 	struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv;
530620452e7SAlban Bedel 
531620452e7SAlban Bedel 	return asix_send_common(dev, dev_priv, packet, length);
532620452e7SAlban Bedel }
533620452e7SAlban Bedel 
534e9954b86SRene Griessl static int asix_recv(struct eth_device *eth)
535e9954b86SRene Griessl {
536e9954b86SRene Griessl 	struct ueth_data *dev = (struct ueth_data *)eth->priv;
537e9954b86SRene Griessl 	struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv;
538e9954b86SRene Griessl 
539e9954b86SRene Griessl 	u16 frame_pos;
540e9954b86SRene Griessl 	int err;
541e9954b86SRene Griessl 	int actual_len;
542e9954b86SRene Griessl 
543e9954b86SRene Griessl 	int pkt_cnt;
544e9954b86SRene Griessl 	u32 rx_hdr;
545e9954b86SRene Griessl 	u16 hdr_off;
546e9954b86SRene Griessl 	u32 *pkt_hdr;
547e9954b86SRene Griessl 	ALLOC_CACHE_ALIGN_BUFFER(u8, recv_buf, dev_priv->rx_urb_size);
548e9954b86SRene Griessl 
549e9954b86SRene Griessl 	actual_len = -1;
550e9954b86SRene Griessl 
551e9954b86SRene Griessl 	debug("** %s()\n", __func__);
552e9954b86SRene Griessl 
553e9954b86SRene Griessl 	err = usb_bulk_msg(dev->pusb_dev,
554e9954b86SRene Griessl 				usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in),
555e9954b86SRene Griessl 				(void *)recv_buf,
556e9954b86SRene Griessl 				dev_priv->rx_urb_size,
557e9954b86SRene Griessl 				&actual_len,
558e9954b86SRene Griessl 				USB_BULK_RECV_TIMEOUT);
559e9954b86SRene Griessl 	debug("Rx: len = %u, actual = %u, err = %d\n", dev_priv->rx_urb_size,
560e9954b86SRene Griessl 	      actual_len, err);
561e9954b86SRene Griessl 
562e9954b86SRene Griessl 	if (err != 0) {
563e9954b86SRene Griessl 		debug("Rx: failed to receive\n");
564e9954b86SRene Griessl 		return -ECOMM;
565e9954b86SRene Griessl 	}
566e9954b86SRene Griessl 	if (actual_len > dev_priv->rx_urb_size) {
567e9954b86SRene Griessl 		debug("Rx: received too many bytes %d\n", actual_len);
568e9954b86SRene Griessl 		return -EMSGSIZE;
569e9954b86SRene Griessl 	}
570e9954b86SRene Griessl 
571e9954b86SRene Griessl 
572e9954b86SRene Griessl 	rx_hdr = *(u32 *)(recv_buf + actual_len - 4);
57350f5bb25SAlban Bedel 	le32_to_cpus(&rx_hdr);
574e9954b86SRene Griessl 
575e9954b86SRene Griessl 	pkt_cnt = (u16)rx_hdr;
576e9954b86SRene Griessl 	hdr_off = (u16)(rx_hdr >> 16);
577e9954b86SRene Griessl 	pkt_hdr = (u32 *)(recv_buf + hdr_off);
578e9954b86SRene Griessl 
579e9954b86SRene Griessl 
580e9954b86SRene Griessl 	frame_pos = 0;
581e9954b86SRene Griessl 
582e9954b86SRene Griessl 	while (pkt_cnt--) {
583e9954b86SRene Griessl 		u16 pkt_len;
584e9954b86SRene Griessl 
585e9954b86SRene Griessl 		le32_to_cpus(pkt_hdr);
586e9954b86SRene Griessl 		pkt_len = (*pkt_hdr >> 16) & 0x1fff;
587e9954b86SRene Griessl 
588e9954b86SRene Griessl 		frame_pos += 2;
589e9954b86SRene Griessl 
5901fd92db8SJoe Hershberger 		net_process_received_packet(recv_buf + frame_pos, pkt_len);
591e9954b86SRene Griessl 
592e9954b86SRene Griessl 		pkt_hdr++;
593e9954b86SRene Griessl 		frame_pos += ((pkt_len + 7) & 0xFFF8)-2;
594e9954b86SRene Griessl 
595e9954b86SRene Griessl 		if (pkt_cnt == 0)
596e9954b86SRene Griessl 			return 0;
597e9954b86SRene Griessl 	}
598e9954b86SRene Griessl 	return err;
599e9954b86SRene Griessl }
600e9954b86SRene Griessl 
601e9954b86SRene Griessl static void asix_halt(struct eth_device *eth)
602e9954b86SRene Griessl {
603e9954b86SRene Griessl 	debug("** %s()\n", __func__);
604e9954b86SRene Griessl }
605e9954b86SRene Griessl 
606e9954b86SRene Griessl /*
607e9954b86SRene Griessl  * Asix probing functions
608e9954b86SRene Griessl  */
609e9954b86SRene Griessl void ax88179_eth_before_probe(void)
610e9954b86SRene Griessl {
611e9954b86SRene Griessl 	curr_eth_dev = 0;
612e9954b86SRene Griessl }
613e9954b86SRene Griessl 
614e9954b86SRene Griessl struct asix_dongle {
615e9954b86SRene Griessl 	unsigned short vendor;
616e9954b86SRene Griessl 	unsigned short product;
617e9954b86SRene Griessl 	int flags;
618e9954b86SRene Griessl };
619e9954b86SRene Griessl 
620e9954b86SRene Griessl static const struct asix_dongle asix_dongles[] = {
621e9954b86SRene Griessl 	{ 0x0b95, 0x1790, FLAG_TYPE_AX88179 },
622e9954b86SRene Griessl 	{ 0x0b95, 0x178a, FLAG_TYPE_AX88178a },
623e9954b86SRene Griessl 	{ 0x2001, 0x4a00, FLAG_TYPE_DLINK_DUB1312 },
624e9954b86SRene Griessl 	{ 0x0df6, 0x0072, FLAG_TYPE_SITECOM },
625e9954b86SRene Griessl 	{ 0x04e8, 0xa100, FLAG_TYPE_SAMSUNG },
626e9954b86SRene Griessl 	{ 0x17ef, 0x304b, FLAG_TYPE_LENOVO },
627652b2694SAlban Bedel 	{ 0x04b4, 0x3610, FLAG_TYPE_GX3 },
628e9954b86SRene Griessl 	{ 0x0000, 0x0000, FLAG_NONE }	/* END - Do not remove */
629e9954b86SRene Griessl };
630e9954b86SRene Griessl 
631e9954b86SRene Griessl /* Probe to see if a new device is actually an asix device */
632e9954b86SRene Griessl int ax88179_eth_probe(struct usb_device *dev, unsigned int ifnum,
633e9954b86SRene Griessl 		      struct ueth_data *ss)
634e9954b86SRene Griessl {
635e9954b86SRene Griessl 	struct usb_interface *iface;
636e9954b86SRene Griessl 	struct usb_interface_descriptor *iface_desc;
637e9954b86SRene Griessl 	struct asix_private *dev_priv;
638e9954b86SRene Griessl 	int ep_in_found = 0, ep_out_found = 0;
639e9954b86SRene Griessl 	int i;
640e9954b86SRene Griessl 
641e9954b86SRene Griessl 	/* let's examine the device now */
642e9954b86SRene Griessl 	iface = &dev->config.if_desc[ifnum];
643e9954b86SRene Griessl 	iface_desc = &dev->config.if_desc[ifnum].desc;
644e9954b86SRene Griessl 
645e9954b86SRene Griessl 	for (i = 0; asix_dongles[i].vendor != 0; i++) {
646e9954b86SRene Griessl 		if (dev->descriptor.idVendor == asix_dongles[i].vendor &&
647e9954b86SRene Griessl 		    dev->descriptor.idProduct == asix_dongles[i].product)
648e9954b86SRene Griessl 			/* Found a supported dongle */
649e9954b86SRene Griessl 			break;
650e9954b86SRene Griessl 	}
651e9954b86SRene Griessl 
652e9954b86SRene Griessl 	if (asix_dongles[i].vendor == 0)
653e9954b86SRene Griessl 		return 0;
654e9954b86SRene Griessl 
655e9954b86SRene Griessl 	memset(ss, 0, sizeof(struct ueth_data));
656e9954b86SRene Griessl 
657e9954b86SRene Griessl 	/* At this point, we know we've got a live one */
658e9954b86SRene Griessl 	debug("\n\nUSB Ethernet device detected: %#04x:%#04x\n",
659e9954b86SRene Griessl 	      dev->descriptor.idVendor, dev->descriptor.idProduct);
660e9954b86SRene Griessl 
661e9954b86SRene Griessl 	/* Initialize the ueth_data structure with some useful info */
662e9954b86SRene Griessl 	ss->ifnum = ifnum;
663e9954b86SRene Griessl 	ss->pusb_dev = dev;
664e9954b86SRene Griessl 	ss->subclass = iface_desc->bInterfaceSubClass;
665e9954b86SRene Griessl 	ss->protocol = iface_desc->bInterfaceProtocol;
666e9954b86SRene Griessl 
667e9954b86SRene Griessl 	/* alloc driver private */
668e9954b86SRene Griessl 	ss->dev_priv = calloc(1, sizeof(struct asix_private));
669e9954b86SRene Griessl 	if (!ss->dev_priv)
670e9954b86SRene Griessl 		return 0;
671e9954b86SRene Griessl 	dev_priv = ss->dev_priv;
672e9954b86SRene Griessl 	dev_priv->flags = asix_dongles[i].flags;
673e9954b86SRene Griessl 
674e9954b86SRene Griessl 	/*
675e9954b86SRene Griessl 	 * We are expecting a minimum of 3 endpoints - in, out (bulk), and
676e9954b86SRene Griessl 	 * int. We will ignore any others.
677e9954b86SRene Griessl 	 */
678e9954b86SRene Griessl 	for (i = 0; i < iface_desc->bNumEndpoints; i++) {
679e9954b86SRene Griessl 		/* is it an interrupt endpoint? */
680e9954b86SRene Griessl 		if ((iface->ep_desc[i].bmAttributes &
681e9954b86SRene Griessl 		    USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) {
682e9954b86SRene Griessl 			ss->ep_int = iface->ep_desc[i].bEndpointAddress &
683e9954b86SRene Griessl 				USB_ENDPOINT_NUMBER_MASK;
684e9954b86SRene Griessl 			ss->irqinterval = iface->ep_desc[i].bInterval;
685e9954b86SRene Griessl 			continue;
686e9954b86SRene Griessl 		}
687e9954b86SRene Griessl 
688e9954b86SRene Griessl 		/* is it an BULK endpoint? */
689e9954b86SRene Griessl 		if (!((iface->ep_desc[i].bmAttributes &
690e9954b86SRene Griessl 		     USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK))
691e9954b86SRene Griessl 			continue;
692e9954b86SRene Griessl 
693e9954b86SRene Griessl 		u8 ep_addr = iface->ep_desc[i].bEndpointAddress;
694e9954b86SRene Griessl 		if ((ep_addr & USB_DIR_IN) && !ep_in_found) {
695e9954b86SRene Griessl 			ss->ep_in = ep_addr &
696e9954b86SRene Griessl 				USB_ENDPOINT_NUMBER_MASK;
697e9954b86SRene Griessl 			ep_in_found = 1;
698e9954b86SRene Griessl 		}
699e9954b86SRene Griessl 		if (!(ep_addr & USB_DIR_IN) && !ep_out_found) {
700e9954b86SRene Griessl 			ss->ep_out = ep_addr &
701e9954b86SRene Griessl 				USB_ENDPOINT_NUMBER_MASK;
702e9954b86SRene Griessl 			dev_priv->maxpacketsize =
703e9954b86SRene Griessl 				dev->epmaxpacketout[AX_ENDPOINT_OUT];
704e9954b86SRene Griessl 			ep_out_found = 1;
705e9954b86SRene Griessl 		}
706e9954b86SRene Griessl 	}
707e9954b86SRene Griessl 	debug("Endpoints In %d Out %d Int %d\n",
708e9954b86SRene Griessl 	      ss->ep_in, ss->ep_out, ss->ep_int);
709e9954b86SRene Griessl 
710e9954b86SRene Griessl 	/* Do some basic sanity checks, and bail if we find a problem */
711e9954b86SRene Griessl 	if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) ||
712e9954b86SRene Griessl 	    !ss->ep_in || !ss->ep_out || !ss->ep_int) {
713e9954b86SRene Griessl 		debug("Problems with device\n");
714e9954b86SRene Griessl 		return 0;
715e9954b86SRene Griessl 	}
716e9954b86SRene Griessl 	dev->privptr = (void *)ss;
717e9954b86SRene Griessl 	return 1;
718e9954b86SRene Griessl }
719e9954b86SRene Griessl 
720e9954b86SRene Griessl int ax88179_eth_get_info(struct usb_device *dev, struct ueth_data *ss,
721e9954b86SRene Griessl 				struct eth_device *eth)
722e9954b86SRene Griessl {
723620452e7SAlban Bedel 	struct asix_private *dev_priv = (struct asix_private *)ss->dev_priv;
724620452e7SAlban Bedel 
725e9954b86SRene Griessl 	if (!eth) {
726e9954b86SRene Griessl 		debug("%s: missing parameter.\n", __func__);
727e9954b86SRene Griessl 		return 0;
728e9954b86SRene Griessl 	}
729e9954b86SRene Griessl 	sprintf(eth->name, "%s%d", ASIX_BASE_NAME, curr_eth_dev++);
730e9954b86SRene Griessl 	eth->init = asix_init;
731e9954b86SRene Griessl 	eth->send = asix_send;
732e9954b86SRene Griessl 	eth->recv = asix_recv;
733e9954b86SRene Griessl 	eth->halt = asix_halt;
734620452e7SAlban Bedel 	eth->write_hwaddr = asix_write_hwaddr;
735e9954b86SRene Griessl 	eth->priv = ss;
736e9954b86SRene Griessl 
737620452e7SAlban Bedel 	if (asix_basic_reset(ss, dev_priv))
738e9954b86SRene Griessl 		return 0;
739e9954b86SRene Griessl 
740e9954b86SRene Griessl 	/* Get the MAC address */
741620452e7SAlban Bedel 	if (asix_read_mac(ss, eth->enetaddr))
742e9954b86SRene Griessl 		return 0;
743e9954b86SRene Griessl 	debug("MAC %pM\n", eth->enetaddr);
744e9954b86SRene Griessl 
745e9954b86SRene Griessl 	return 1;
746e9954b86SRene Griessl }
747*76b2fad7SAlban Bedel 
748*76b2fad7SAlban Bedel #else /* !CONFIG_DM_ETH */
749*76b2fad7SAlban Bedel 
750*76b2fad7SAlban Bedel static int ax88179_eth_start(struct udevice *dev)
751*76b2fad7SAlban Bedel {
752*76b2fad7SAlban Bedel 	struct asix_private *priv = dev_get_priv(dev);
753*76b2fad7SAlban Bedel 
754*76b2fad7SAlban Bedel 	return asix_init_common(&priv->ueth, priv);
755*76b2fad7SAlban Bedel }
756*76b2fad7SAlban Bedel 
757*76b2fad7SAlban Bedel void ax88179_eth_stop(struct udevice *dev)
758*76b2fad7SAlban Bedel {
759*76b2fad7SAlban Bedel 	struct asix_private *priv = dev_get_priv(dev);
760*76b2fad7SAlban Bedel 	struct ueth_data *ueth = &priv->ueth;
761*76b2fad7SAlban Bedel 
762*76b2fad7SAlban Bedel 	debug("** %s()\n", __func__);
763*76b2fad7SAlban Bedel 
764*76b2fad7SAlban Bedel 	usb_ether_advance_rxbuf(ueth, -1);
765*76b2fad7SAlban Bedel 	priv->pkt_cnt = 0;
766*76b2fad7SAlban Bedel 	priv->pkt_data = NULL;
767*76b2fad7SAlban Bedel 	priv->pkt_hdr = NULL;
768*76b2fad7SAlban Bedel }
769*76b2fad7SAlban Bedel 
770*76b2fad7SAlban Bedel int ax88179_eth_send(struct udevice *dev, void *packet, int length)
771*76b2fad7SAlban Bedel {
772*76b2fad7SAlban Bedel 	struct asix_private *priv = dev_get_priv(dev);
773*76b2fad7SAlban Bedel 
774*76b2fad7SAlban Bedel 	return asix_send_common(&priv->ueth, priv, packet, length);
775*76b2fad7SAlban Bedel }
776*76b2fad7SAlban Bedel 
777*76b2fad7SAlban Bedel int ax88179_eth_recv(struct udevice *dev, int flags, uchar **packetp)
778*76b2fad7SAlban Bedel {
779*76b2fad7SAlban Bedel 	struct asix_private *priv = dev_get_priv(dev);
780*76b2fad7SAlban Bedel 	struct ueth_data *ueth = &priv->ueth;
781*76b2fad7SAlban Bedel 	int ret, len;
782*76b2fad7SAlban Bedel 	u16 pkt_len;
783*76b2fad7SAlban Bedel 
784*76b2fad7SAlban Bedel 	/* No packet left, get a new one */
785*76b2fad7SAlban Bedel 	if (priv->pkt_cnt == 0) {
786*76b2fad7SAlban Bedel 		uint8_t *ptr;
787*76b2fad7SAlban Bedel 		u16 pkt_cnt;
788*76b2fad7SAlban Bedel 		u16 hdr_off;
789*76b2fad7SAlban Bedel 		u32 rx_hdr;
790*76b2fad7SAlban Bedel 
791*76b2fad7SAlban Bedel 		len = usb_ether_get_rx_bytes(ueth, &ptr);
792*76b2fad7SAlban Bedel 		debug("%s: first try, len=%d\n", __func__, len);
793*76b2fad7SAlban Bedel 		if (!len) {
794*76b2fad7SAlban Bedel 			if (!(flags & ETH_RECV_CHECK_DEVICE))
795*76b2fad7SAlban Bedel 				return -EAGAIN;
796*76b2fad7SAlban Bedel 
797*76b2fad7SAlban Bedel 			ret = usb_ether_receive(ueth, priv->rx_urb_size);
798*76b2fad7SAlban Bedel 			if (ret < 0)
799*76b2fad7SAlban Bedel 				return ret;
800*76b2fad7SAlban Bedel 
801*76b2fad7SAlban Bedel 			len = usb_ether_get_rx_bytes(ueth, &ptr);
802*76b2fad7SAlban Bedel 			debug("%s: second try, len=%d\n", __func__, len);
803*76b2fad7SAlban Bedel 		}
804*76b2fad7SAlban Bedel 
805*76b2fad7SAlban Bedel 		if (len < 4) {
806*76b2fad7SAlban Bedel 			usb_ether_advance_rxbuf(ueth, -1);
807*76b2fad7SAlban Bedel 			return -EMSGSIZE;
808*76b2fad7SAlban Bedel 		}
809*76b2fad7SAlban Bedel 
810*76b2fad7SAlban Bedel 		rx_hdr = *(u32 *)(ptr + len - 4);
811*76b2fad7SAlban Bedel 		le32_to_cpus(&rx_hdr);
812*76b2fad7SAlban Bedel 
813*76b2fad7SAlban Bedel 		pkt_cnt = (u16)rx_hdr;
814*76b2fad7SAlban Bedel 		if (pkt_cnt == 0) {
815*76b2fad7SAlban Bedel 			usb_ether_advance_rxbuf(ueth, -1);
816*76b2fad7SAlban Bedel 			return 0;
817*76b2fad7SAlban Bedel 		}
818*76b2fad7SAlban Bedel 
819*76b2fad7SAlban Bedel 		hdr_off = (u16)(rx_hdr >> 16);
820*76b2fad7SAlban Bedel 		if (hdr_off > len - 4) {
821*76b2fad7SAlban Bedel 			usb_ether_advance_rxbuf(ueth, -1);
822*76b2fad7SAlban Bedel 			return -EIO;
823*76b2fad7SAlban Bedel 		}
824*76b2fad7SAlban Bedel 
825*76b2fad7SAlban Bedel 		priv->pkt_cnt = pkt_cnt;
826*76b2fad7SAlban Bedel 		priv->pkt_data = ptr;
827*76b2fad7SAlban Bedel 		priv->pkt_hdr = (u32 *)(ptr + hdr_off);
828*76b2fad7SAlban Bedel 		debug("%s: %d packets received, pkt header at %d\n",
829*76b2fad7SAlban Bedel 		      __func__, (int)priv->pkt_cnt, (int)hdr_off);
830*76b2fad7SAlban Bedel 	}
831*76b2fad7SAlban Bedel 
832*76b2fad7SAlban Bedel 	le32_to_cpus(priv->pkt_hdr);
833*76b2fad7SAlban Bedel 	pkt_len = (*priv->pkt_hdr >> 16) & 0x1fff;
834*76b2fad7SAlban Bedel 
835*76b2fad7SAlban Bedel 	*packetp = priv->pkt_data + 2;
836*76b2fad7SAlban Bedel 
837*76b2fad7SAlban Bedel 	priv->pkt_data += (pkt_len + 7) & 0xFFF8;
838*76b2fad7SAlban Bedel 	priv->pkt_cnt--;
839*76b2fad7SAlban Bedel 	priv->pkt_hdr++;
840*76b2fad7SAlban Bedel 
841*76b2fad7SAlban Bedel 	debug("%s: return packet of %d bytes (%d packets left)\n",
842*76b2fad7SAlban Bedel 	      __func__, (int)pkt_len, priv->pkt_cnt);
843*76b2fad7SAlban Bedel 	return pkt_len;
844*76b2fad7SAlban Bedel }
845*76b2fad7SAlban Bedel 
846*76b2fad7SAlban Bedel static int ax88179_free_pkt(struct udevice *dev, uchar *packet, int packet_len)
847*76b2fad7SAlban Bedel {
848*76b2fad7SAlban Bedel 	struct asix_private *priv = dev_get_priv(dev);
849*76b2fad7SAlban Bedel 	struct ueth_data *ueth = &priv->ueth;
850*76b2fad7SAlban Bedel 
851*76b2fad7SAlban Bedel 	if (priv->pkt_cnt == 0)
852*76b2fad7SAlban Bedel 		usb_ether_advance_rxbuf(ueth, -1);
853*76b2fad7SAlban Bedel 
854*76b2fad7SAlban Bedel 	return 0;
855*76b2fad7SAlban Bedel }
856*76b2fad7SAlban Bedel 
857*76b2fad7SAlban Bedel int ax88179_write_hwaddr(struct udevice *dev)
858*76b2fad7SAlban Bedel {
859*76b2fad7SAlban Bedel 	struct eth_pdata *pdata = dev_get_platdata(dev);
860*76b2fad7SAlban Bedel 	struct asix_private *priv = dev_get_priv(dev);
861*76b2fad7SAlban Bedel 	struct ueth_data *ueth = &priv->ueth;
862*76b2fad7SAlban Bedel 
863*76b2fad7SAlban Bedel 	return asix_write_mac(ueth, pdata->enetaddr);
864*76b2fad7SAlban Bedel }
865*76b2fad7SAlban Bedel 
866*76b2fad7SAlban Bedel static int ax88179_eth_probe(struct udevice *dev)
867*76b2fad7SAlban Bedel {
868*76b2fad7SAlban Bedel 	struct eth_pdata *pdata = dev_get_platdata(dev);
869*76b2fad7SAlban Bedel 	struct asix_private *priv = dev_get_priv(dev);
870*76b2fad7SAlban Bedel 	struct usb_device *usb_dev;
871*76b2fad7SAlban Bedel 	int ret;
872*76b2fad7SAlban Bedel 
873*76b2fad7SAlban Bedel 	priv->flags = dev->driver_data;
874*76b2fad7SAlban Bedel 	ret = usb_ether_register(dev, &priv->ueth, AX_RX_URB_SIZE);
875*76b2fad7SAlban Bedel 	if (ret)
876*76b2fad7SAlban Bedel 		return ret;
877*76b2fad7SAlban Bedel 
878*76b2fad7SAlban Bedel 	usb_dev = priv->ueth.pusb_dev;
879*76b2fad7SAlban Bedel 	priv->maxpacketsize = usb_dev->epmaxpacketout[AX_ENDPOINT_OUT];
880*76b2fad7SAlban Bedel 
881*76b2fad7SAlban Bedel 	/* Get the MAC address */
882*76b2fad7SAlban Bedel 	ret = asix_read_mac(&priv->ueth, pdata->enetaddr);
883*76b2fad7SAlban Bedel 	if (ret)
884*76b2fad7SAlban Bedel 		return ret;
885*76b2fad7SAlban Bedel 	debug("MAC %pM\n", pdata->enetaddr);
886*76b2fad7SAlban Bedel 
887*76b2fad7SAlban Bedel 	return 0;
888*76b2fad7SAlban Bedel }
889*76b2fad7SAlban Bedel 
890*76b2fad7SAlban Bedel static const struct eth_ops ax88179_eth_ops = {
891*76b2fad7SAlban Bedel 	.start = ax88179_eth_start,
892*76b2fad7SAlban Bedel 	.send = ax88179_eth_send,
893*76b2fad7SAlban Bedel 	.recv = ax88179_eth_recv,
894*76b2fad7SAlban Bedel 	.free_pkt = ax88179_free_pkt,
895*76b2fad7SAlban Bedel 	.stop = ax88179_eth_stop,
896*76b2fad7SAlban Bedel 	.write_hwaddr = ax88179_write_hwaddr,
897*76b2fad7SAlban Bedel };
898*76b2fad7SAlban Bedel 
899*76b2fad7SAlban Bedel U_BOOT_DRIVER(ax88179_eth) = {
900*76b2fad7SAlban Bedel 	.name = "ax88179_eth",
901*76b2fad7SAlban Bedel 	.id = UCLASS_ETH,
902*76b2fad7SAlban Bedel 	.probe = ax88179_eth_probe,
903*76b2fad7SAlban Bedel 	.ops = &ax88179_eth_ops,
904*76b2fad7SAlban Bedel 	.priv_auto_alloc_size = sizeof(struct asix_private),
905*76b2fad7SAlban Bedel 	.platdata_auto_alloc_size = sizeof(struct eth_pdata),
906*76b2fad7SAlban Bedel };
907*76b2fad7SAlban Bedel 
908*76b2fad7SAlban Bedel static const struct usb_device_id ax88179_eth_id_table[] = {
909*76b2fad7SAlban Bedel 	{ USB_DEVICE(0x0b95, 0x1790), .driver_info = FLAG_TYPE_AX88179 },
910*76b2fad7SAlban Bedel 	{ USB_DEVICE(0x0b95, 0x178a), .driver_info = FLAG_TYPE_AX88178a },
911*76b2fad7SAlban Bedel 	{ USB_DEVICE(0x2001, 0x4a00), .driver_info = FLAG_TYPE_DLINK_DUB1312 },
912*76b2fad7SAlban Bedel 	{ USB_DEVICE(0x0df6, 0x0072), .driver_info = FLAG_TYPE_SITECOM },
913*76b2fad7SAlban Bedel 	{ USB_DEVICE(0x04e8, 0xa100), .driver_info = FLAG_TYPE_SAMSUNG },
914*76b2fad7SAlban Bedel 	{ USB_DEVICE(0x17ef, 0x304b), .driver_info = FLAG_TYPE_LENOVO },
915*76b2fad7SAlban Bedel 	{ USB_DEVICE(0x04b4, 0x3610), .driver_info = FLAG_TYPE_GX3 },
916*76b2fad7SAlban Bedel 	{ }		/* Terminating entry */
917*76b2fad7SAlban Bedel };
918*76b2fad7SAlban Bedel 
919*76b2fad7SAlban Bedel U_BOOT_USB_DEVICE(ax88179_eth, ax88179_eth_id_table);
920*76b2fad7SAlban Bedel #endif /* !CONFIG_DM_ETH */
921