xref: /openbmc/u-boot/drivers/spi/spi-mem-nodm.c (revision 50e24381c097579ff2a8b171838347c82c2fba04)
1*6430eea6SVignesh R // SPDX-License-Identifier: GPL-2.0+
2*6430eea6SVignesh R /*
3*6430eea6SVignesh R  * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
4*6430eea6SVignesh R  */
5*6430eea6SVignesh R 
6*6430eea6SVignesh R #include <spi.h>
7*6430eea6SVignesh R #include <spi-mem.h>
8*6430eea6SVignesh R 
spi_mem_exec_op(struct spi_slave * slave,const struct spi_mem_op * op)9*6430eea6SVignesh R int spi_mem_exec_op(struct spi_slave *slave,
10*6430eea6SVignesh R 		    const struct spi_mem_op *op)
11*6430eea6SVignesh R {
12*6430eea6SVignesh R 	unsigned int pos = 0;
13*6430eea6SVignesh R 	const u8 *tx_buf = NULL;
14*6430eea6SVignesh R 	u8 *rx_buf = NULL;
15*6430eea6SVignesh R 	u8 *op_buf;
16*6430eea6SVignesh R 	int op_len;
17*6430eea6SVignesh R 	u32 flag;
18*6430eea6SVignesh R 	int ret;
19*6430eea6SVignesh R 	int i;
20*6430eea6SVignesh R 
21*6430eea6SVignesh R 	if (op->data.nbytes) {
22*6430eea6SVignesh R 		if (op->data.dir == SPI_MEM_DATA_IN)
23*6430eea6SVignesh R 			rx_buf = op->data.buf.in;
24*6430eea6SVignesh R 		else
25*6430eea6SVignesh R 			tx_buf = op->data.buf.out;
26*6430eea6SVignesh R 	}
27*6430eea6SVignesh R 
28*6430eea6SVignesh R 	op_len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes;
29*6430eea6SVignesh R 	op_buf = calloc(1, op_len);
30*6430eea6SVignesh R 
31*6430eea6SVignesh R 	ret = spi_claim_bus(slave);
32*6430eea6SVignesh R 	if (ret < 0)
33*6430eea6SVignesh R 		return ret;
34*6430eea6SVignesh R 
35*6430eea6SVignesh R 	op_buf[pos++] = op->cmd.opcode;
36*6430eea6SVignesh R 
37*6430eea6SVignesh R 	if (op->addr.nbytes) {
38*6430eea6SVignesh R 		for (i = 0; i < op->addr.nbytes; i++)
39*6430eea6SVignesh R 			op_buf[pos + i] = op->addr.val >>
40*6430eea6SVignesh R 				(8 * (op->addr.nbytes - i - 1));
41*6430eea6SVignesh R 
42*6430eea6SVignesh R 		pos += op->addr.nbytes;
43*6430eea6SVignesh R 	}
44*6430eea6SVignesh R 
45*6430eea6SVignesh R 	if (op->dummy.nbytes)
46*6430eea6SVignesh R 		memset(op_buf + pos, 0xff, op->dummy.nbytes);
47*6430eea6SVignesh R 
48*6430eea6SVignesh R 	/* 1st transfer: opcode + address + dummy cycles */
49*6430eea6SVignesh R 	flag = SPI_XFER_BEGIN;
50*6430eea6SVignesh R 	/* Make sure to set END bit if no tx or rx data messages follow */
51*6430eea6SVignesh R 	if (!tx_buf && !rx_buf)
52*6430eea6SVignesh R 		flag |= SPI_XFER_END;
53*6430eea6SVignesh R 
54*6430eea6SVignesh R 	ret = spi_xfer(slave, op_len * 8, op_buf, NULL, flag);
55*6430eea6SVignesh R 	if (ret)
56*6430eea6SVignesh R 		return ret;
57*6430eea6SVignesh R 
58*6430eea6SVignesh R 	/* 2nd transfer: rx or tx data path */
59*6430eea6SVignesh R 	if (tx_buf || rx_buf) {
60*6430eea6SVignesh R 		ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf,
61*6430eea6SVignesh R 			       rx_buf, SPI_XFER_END);
62*6430eea6SVignesh R 		if (ret)
63*6430eea6SVignesh R 			return ret;
64*6430eea6SVignesh R 	}
65*6430eea6SVignesh R 
66*6430eea6SVignesh R 	spi_release_bus(slave);
67*6430eea6SVignesh R 
68*6430eea6SVignesh R 	for (i = 0; i < pos; i++)
69*6430eea6SVignesh R 		debug("%02x ", op_buf[i]);
70*6430eea6SVignesh R 	debug("| [%dB %s] ",
71*6430eea6SVignesh R 	      tx_buf || rx_buf ? op->data.nbytes : 0,
72*6430eea6SVignesh R 	      tx_buf || rx_buf ? (tx_buf ? "out" : "in") : "-");
73*6430eea6SVignesh R 	for (i = 0; i < op->data.nbytes; i++)
74*6430eea6SVignesh R 		debug("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]);
75*6430eea6SVignesh R 	debug("[ret %d]\n", ret);
76*6430eea6SVignesh R 
77*6430eea6SVignesh R 	free(op_buf);
78*6430eea6SVignesh R 
79*6430eea6SVignesh R 	if (ret < 0)
80*6430eea6SVignesh R 		return ret;
81*6430eea6SVignesh R 
82*6430eea6SVignesh R 	return 0;
83*6430eea6SVignesh R }
84*6430eea6SVignesh R 
spi_mem_adjust_op_size(struct spi_slave * slave,struct spi_mem_op * op)85*6430eea6SVignesh R int spi_mem_adjust_op_size(struct spi_slave *slave,
86*6430eea6SVignesh R 			   struct spi_mem_op *op)
87*6430eea6SVignesh R {
88*6430eea6SVignesh R 	unsigned int len;
89*6430eea6SVignesh R 
90*6430eea6SVignesh R 	len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes;
91*6430eea6SVignesh R 	if (slave->max_write_size && len > slave->max_write_size)
92*6430eea6SVignesh R 		return -EINVAL;
93*6430eea6SVignesh R 
94*6430eea6SVignesh R 	if (op->data.dir == SPI_MEM_DATA_IN && slave->max_read_size)
95*6430eea6SVignesh R 		op->data.nbytes = min(op->data.nbytes,
96*6430eea6SVignesh R 				      slave->max_read_size);
97*6430eea6SVignesh R 	else if (slave->max_write_size)
98*6430eea6SVignesh R 		op->data.nbytes = min(op->data.nbytes,
99*6430eea6SVignesh R 				      slave->max_write_size - len);
100*6430eea6SVignesh R 
101*6430eea6SVignesh R 	if (!op->data.nbytes)
102*6430eea6SVignesh R 		return -EINVAL;
103*6430eea6SVignesh R 
104*6430eea6SVignesh R 	return 0;
105*6430eea6SVignesh R }
106