1 /* 2 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved 3 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef _SERIAL_STM32_ 9 #define _SERIAL_STM32_ 10 11 #define CR1_OFFSET(x) (x ? 0x0c : 0x00) 12 #define CR3_OFFSET(x) (x ? 0x14 : 0x08) 13 #define BRR_OFFSET(x) (x ? 0x08 : 0x0c) 14 #define ISR_OFFSET(x) (x ? 0x00 : 0x1c) 15 16 #define ICR_OFFSET 0x20 17 /* 18 * STM32F4 has one Data Register (DR) for received or transmitted 19 * data, so map Receive Data Register (RDR) and Transmit Data 20 * Register (TDR) at the same offset 21 */ 22 #define RDR_OFFSET(x) (x ? 0x04 : 0x24) 23 #define TDR_OFFSET(x) (x ? 0x04 : 0x28) 24 25 struct stm32_uart_info { 26 u8 uart_enable_bit; /* UART_CR1_UE */ 27 bool stm32f4; /* true for STM32F4, false otherwise */ 28 bool has_fifo; 29 }; 30 31 struct stm32_uart_info stm32f4_info = { 32 .stm32f4 = true, 33 .uart_enable_bit = 13, 34 .has_fifo = false, 35 }; 36 37 struct stm32_uart_info stm32f7_info = { 38 .uart_enable_bit = 0, 39 .stm32f4 = false, 40 .has_fifo = false, 41 }; 42 43 struct stm32_uart_info stm32h7_info = { 44 .uart_enable_bit = 0, 45 .stm32f4 = false, 46 .has_fifo = true, 47 }; 48 49 /* Information about a serial port */ 50 struct stm32x7_serial_platdata { 51 fdt_addr_t base; /* address of registers in physical memory */ 52 struct stm32_uart_info *uart_info; 53 unsigned long int clock_rate; 54 }; 55 56 #define USART_CR1_FIFOEN BIT(29) 57 #define USART_CR1_OVER8 BIT(15) 58 #define USART_CR1_TE BIT(3) 59 #define USART_CR1_RE BIT(2) 60 61 #define USART_CR3_OVRDIS BIT(12) 62 63 #define USART_ISR_FLAG_ORE BIT(3) 64 #define USART_ISR_FLAG_RXNE BIT(5) 65 #define USART_ISR_FLAG_TXE BIT(7) 66 67 #define USART_BRR_F_MASK GENMASK(7, 0) 68 #define USART_BRR_M_SHIFT 4 69 #define USART_BRR_M_MASK GENMASK(15, 4) 70 71 #define USART_ICR_OREF BIT(3) 72 #endif 73