1 /* 2 * (C) Copyright 2013-2016 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <dm.h> 9 #include <errno.h> 10 #include <watchdog.h> 11 #include <asm/io.h> 12 #include <serial.h> 13 #include <linux/compiler.h> 14 #include <asm/arch/imx-regs.h> 15 #include <asm/arch/clock.h> 16 17 #define US1_TDRE (1 << 7) 18 #define US1_RDRF (1 << 5) 19 #define UC2_TE (1 << 3) 20 #define LINCR1_INIT (1 << 0) 21 #define LINCR1_MME (1 << 4) 22 #define LINCR1_BF (1 << 7) 23 #define LINSR_LINS_INITMODE (0x00001000) 24 #define LINSR_LINS_MASK (0x0000F000) 25 #define UARTCR_UART (1 << 0) 26 #define UARTCR_WL0 (1 << 1) 27 #define UARTCR_PCE (1 << 2) 28 #define UARTCR_PC0 (1 << 3) 29 #define UARTCR_TXEN (1 << 4) 30 #define UARTCR_RXEN (1 << 5) 31 #define UARTCR_PC1 (1 << 6) 32 #define UARTSR_DTF (1 << 1) 33 #define UARTSR_DRF (1 << 2) 34 #define UARTSR_RMB (1 << 9) 35 36 DECLARE_GLOBAL_DATA_PTR; 37 38 static void _linflex_serial_setbrg(struct linflex_fsl *base, int baudrate) 39 { 40 u32 clk = mxc_get_clock(MXC_UART_CLK); 41 u32 ibr, fbr; 42 43 if (!baudrate) 44 baudrate = CONFIG_BAUDRATE; 45 46 ibr = (u32) (clk / (16 * gd->baudrate)); 47 fbr = (u32) (clk % (16 * gd->baudrate)) * 16; 48 49 __raw_writel(ibr, &base->linibrr); 50 __raw_writel(fbr, &base->linfbrr); 51 } 52 53 static int _linflex_serial_getc(struct linflex_fsl *base) 54 { 55 char c; 56 57 if (!(__raw_readb(&base->uartsr) & UARTSR_DRF)) 58 return -EAGAIN; 59 60 if (!(__raw_readl(&base->uartsr) & UARTSR_RMB)) 61 return -EAGAIN; 62 63 c = __raw_readl(&base->bdrm); 64 __raw_writeb((__raw_readb(&base->uartsr) | (UARTSR_DRF | UARTSR_RMB)), 65 &base->uartsr); 66 return c; 67 } 68 69 static int _linflex_serial_putc(struct linflex_fsl *base, const char c) 70 { 71 __raw_writeb(c, &base->bdrl); 72 73 74 if (!(__raw_readb(&base->uartsr) & UARTSR_DTF)) 75 return -EAGAIN; 76 77 __raw_writeb((__raw_readb(&base->uartsr) | UARTSR_DTF), &base->uartsr); 78 79 return 0; 80 } 81 82 /* 83 * Initialise the serial port with the given baudrate. The settings 84 * are always 8 data bits, no parity, 1 stop bit, no start bits. 85 */ 86 static int _linflex_serial_init(struct linflex_fsl *base) 87 { 88 volatile u32 ctrl; 89 90 /* set the Linflex in master mode amd activate by-pass filter */ 91 ctrl = LINCR1_BF | LINCR1_MME; 92 __raw_writel(ctrl, &base->lincr1); 93 94 /* init mode */ 95 ctrl |= LINCR1_INIT; 96 __raw_writel(ctrl, &base->lincr1); 97 98 /* waiting for init mode entry - TODO: add a timeout */ 99 while ((__raw_readl(&base->linsr) & LINSR_LINS_MASK) != 100 LINSR_LINS_INITMODE); 101 102 /* set UART bit to allow writing other bits */ 103 __raw_writel(UARTCR_UART, &base->uartcr); 104 105 /* provide data bits, parity, stop bit, etc */ 106 serial_setbrg(); 107 108 /* 8 bit data, no parity, Tx and Rx enabled, UART mode */ 109 __raw_writel(UARTCR_PC1 | UARTCR_RXEN | UARTCR_TXEN | UARTCR_PC0 110 | UARTCR_WL0 | UARTCR_UART, &base->uartcr); 111 112 ctrl = __raw_readl(&base->lincr1); 113 ctrl &= ~LINCR1_INIT; 114 __raw_writel(ctrl, &base->lincr1); /* end init mode */ 115 116 return 0; 117 } 118 119 struct linflex_serial_platdata { 120 struct linflex_fsl *base_addr; 121 u8 port_id; /* do we need this? */ 122 }; 123 124 struct linflex_serial_priv { 125 struct linflex_fsl *lfuart; 126 }; 127 128 int linflex_serial_setbrg(struct udevice *dev, int baudrate) 129 { 130 struct linflex_serial_priv *priv = dev_get_priv(dev); 131 132 _linflex_serial_setbrg(priv->lfuart, baudrate); 133 134 return 0; 135 } 136 137 static int linflex_serial_getc(struct udevice *dev) 138 { 139 struct linflex_serial_priv *priv = dev_get_priv(dev); 140 141 return _linflex_serial_getc(priv->lfuart); 142 } 143 144 static int linflex_serial_putc(struct udevice *dev, const char ch) 145 { 146 147 struct linflex_serial_priv *priv = dev_get_priv(dev); 148 149 return _linflex_serial_putc(priv->lfuart, ch); 150 } 151 152 static int linflex_serial_pending(struct udevice *dev, bool input) 153 { 154 struct linflex_serial_priv *priv = dev_get_priv(dev); 155 uint32_t uartsr = __raw_readl(&priv->lfuart->uartsr); 156 157 if (input) 158 return ((uartsr & UARTSR_DRF) && (uartsr & UARTSR_RMB)) ? 1 : 0; 159 else 160 return uartsr & UARTSR_DTF ? 0 : 1; 161 } 162 163 static void linflex_serial_init_internal(struct linflex_fsl *lfuart) 164 { 165 _linflex_serial_init(lfuart); 166 _linflex_serial_setbrg(lfuart, CONFIG_BAUDRATE); 167 return; 168 } 169 170 static int linflex_serial_probe(struct udevice *dev) 171 { 172 struct linflex_serial_platdata *plat = dev->platdata; 173 struct linflex_serial_priv *priv = dev_get_priv(dev); 174 175 priv->lfuart = (struct linflex_fsl *)plat->base_addr; 176 linflex_serial_init_internal(priv->lfuart); 177 178 return 0; 179 } 180 181 static const struct dm_serial_ops linflex_serial_ops = { 182 .putc = linflex_serial_putc, 183 .pending = linflex_serial_pending, 184 .getc = linflex_serial_getc, 185 .setbrg = linflex_serial_setbrg, 186 }; 187 188 U_BOOT_DRIVER(serial_linflex) = { 189 .name = "serial_linflex", 190 .id = UCLASS_SERIAL, 191 .probe = linflex_serial_probe, 192 .ops = &linflex_serial_ops, 193 .flags = DM_FLAG_PRE_RELOC, 194 .priv_auto_alloc_size = sizeof(struct linflex_serial_priv), 195 }; 196 197 #ifdef CONFIG_DEBUG_UART_LINFLEXUART 198 199 #include <debug_uart.h> 200 201 202 static inline void _debug_uart_init(void) 203 { 204 struct linflex_fsl *base = (struct linflex_fsl *)CONFIG_DEBUG_UART_BASE; 205 206 linflex_serial_init_internal(base); 207 } 208 209 static inline void _debug_uart_putc(int ch) 210 { 211 struct linflex_fsl *base = (struct linflex_fsl *)CONFIG_DEBUG_UART_BASE; 212 213 /* XXX: Is this OK? Should this use the non-DM version? */ 214 _linflex_serial_putc(base, ch); 215 } 216 217 DEBUG_UART_FUNCS 218 219 #endif /* CONFIG_DEBUG_UART_LINFLEXUART */ 220