1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2c9d4f46bSScott McNutt /*
3c9d4f46bSScott McNutt * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
4c9d4f46bSScott McNutt * Scott McNutt <smcnutt@psyent.com>
5c9d4f46bSScott McNutt */
6c9d4f46bSScott McNutt
7c9d4f46bSScott McNutt #include <common.h>
8da2f838dSThomas Chou #include <dm.h>
9da2f838dSThomas Chou #include <errno.h>
10b207d645SMarek Vasut #include <serial.h>
1189241482SThomas Chou #include <asm/io.h>
1289241482SThomas Chou
1389241482SThomas Chou DECLARE_GLOBAL_DATA_PTR;
1489241482SThomas Chou
1589241482SThomas Chou /* status register */
1689241482SThomas Chou #define ALTERA_UART_TMT BIT(5) /* tx empty */
1789241482SThomas Chou #define ALTERA_UART_TRDY BIT(6) /* tx ready */
1889241482SThomas Chou #define ALTERA_UART_RRDY BIT(7) /* rx ready */
19c9d4f46bSScott McNutt
20da2f838dSThomas Chou struct altera_uart_regs {
21da2f838dSThomas Chou u32 rxdata; /* Rx data reg */
22da2f838dSThomas Chou u32 txdata; /* Tx data reg */
23da2f838dSThomas Chou u32 status; /* Status reg */
24da2f838dSThomas Chou u32 control; /* Control reg */
25da2f838dSThomas Chou u32 divisor; /* Baud rate divisor reg */
26da2f838dSThomas Chou u32 endofpacket; /* End-of-packet reg */
27da2f838dSThomas Chou };
28da2f838dSThomas Chou
29da2f838dSThomas Chou struct altera_uart_platdata {
30da2f838dSThomas Chou struct altera_uart_regs *regs;
31da2f838dSThomas Chou unsigned int uartclk;
32da2f838dSThomas Chou };
3386450710SThomas Chou
altera_uart_setbrg(struct udevice * dev,int baudrate)34da2f838dSThomas Chou static int altera_uart_setbrg(struct udevice *dev, int baudrate)
35b207d645SMarek Vasut {
36da2f838dSThomas Chou struct altera_uart_platdata *plat = dev->platdata;
37da2f838dSThomas Chou struct altera_uart_regs *const regs = plat->regs;
38da2f838dSThomas Chou u32 div;
39da2f838dSThomas Chou
40da2f838dSThomas Chou div = (plat->uartclk / baudrate) - 1;
41da2f838dSThomas Chou writel(div, ®s->divisor);
42da2f838dSThomas Chou
43da2f838dSThomas Chou return 0;
44b207d645SMarek Vasut }
45b207d645SMarek Vasut
altera_uart_putc(struct udevice * dev,const char ch)46da2f838dSThomas Chou static int altera_uart_putc(struct udevice *dev, const char ch)
47da2f838dSThomas Chou {
48da2f838dSThomas Chou struct altera_uart_platdata *plat = dev->platdata;
49da2f838dSThomas Chou struct altera_uart_regs *const regs = plat->regs;
50da2f838dSThomas Chou
51da2f838dSThomas Chou if (!(readl(®s->status) & ALTERA_UART_TRDY))
52da2f838dSThomas Chou return -EAGAIN;
53da2f838dSThomas Chou
54da2f838dSThomas Chou writel(ch, ®s->txdata);
55da2f838dSThomas Chou
56da2f838dSThomas Chou return 0;
57da2f838dSThomas Chou }
58da2f838dSThomas Chou
altera_uart_pending(struct udevice * dev,bool input)59da2f838dSThomas Chou static int altera_uart_pending(struct udevice *dev, bool input)
60da2f838dSThomas Chou {
61da2f838dSThomas Chou struct altera_uart_platdata *plat = dev->platdata;
62da2f838dSThomas Chou struct altera_uart_regs *const regs = plat->regs;
63da2f838dSThomas Chou u32 st = readl(®s->status);
64da2f838dSThomas Chou
65da2f838dSThomas Chou if (input)
66da2f838dSThomas Chou return st & ALTERA_UART_RRDY ? 1 : 0;
67da2f838dSThomas Chou else
68da2f838dSThomas Chou return !(st & ALTERA_UART_TMT);
69da2f838dSThomas Chou }
70da2f838dSThomas Chou
altera_uart_getc(struct udevice * dev)71da2f838dSThomas Chou static int altera_uart_getc(struct udevice *dev)
72da2f838dSThomas Chou {
73da2f838dSThomas Chou struct altera_uart_platdata *plat = dev->platdata;
74da2f838dSThomas Chou struct altera_uart_regs *const regs = plat->regs;
75da2f838dSThomas Chou
76da2f838dSThomas Chou if (!(readl(®s->status) & ALTERA_UART_RRDY))
77da2f838dSThomas Chou return -EAGAIN;
78da2f838dSThomas Chou
79da2f838dSThomas Chou return readl(®s->rxdata) & 0xff;
80da2f838dSThomas Chou }
81da2f838dSThomas Chou
altera_uart_probe(struct udevice * dev)82da2f838dSThomas Chou static int altera_uart_probe(struct udevice *dev)
83b207d645SMarek Vasut {
84b207d645SMarek Vasut return 0;
85b207d645SMarek Vasut }
86c9d4f46bSScott McNutt
altera_uart_ofdata_to_platdata(struct udevice * dev)87da2f838dSThomas Chou static int altera_uart_ofdata_to_platdata(struct udevice *dev)
88c9d4f46bSScott McNutt {
89da2f838dSThomas Chou struct altera_uart_platdata *plat = dev_get_platdata(dev);
90c9d4f46bSScott McNutt
91a821c4afSSimon Glass plat->regs = map_physmem(devfdt_get_addr(dev),
921ec60b93SThomas Chou sizeof(struct altera_uart_regs),
931ec60b93SThomas Chou MAP_NOCACHE);
94e160f7d4SSimon Glass plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
95da2f838dSThomas Chou "clock-frequency", 0);
96c9d4f46bSScott McNutt
97b207d645SMarek Vasut return 0;
98c9d4f46bSScott McNutt }
99c9d4f46bSScott McNutt
100da2f838dSThomas Chou static const struct dm_serial_ops altera_uart_ops = {
101da2f838dSThomas Chou .putc = altera_uart_putc,
102da2f838dSThomas Chou .pending = altera_uart_pending,
103da2f838dSThomas Chou .getc = altera_uart_getc,
104da2f838dSThomas Chou .setbrg = altera_uart_setbrg,
105b207d645SMarek Vasut };
106b207d645SMarek Vasut
107da2f838dSThomas Chou static const struct udevice_id altera_uart_ids[] = {
10889241482SThomas Chou { .compatible = "altr,uart-1.0" },
109da2f838dSThomas Chou {}
110da2f838dSThomas Chou };
111da2f838dSThomas Chou
112da2f838dSThomas Chou U_BOOT_DRIVER(altera_uart) = {
113da2f838dSThomas Chou .name = "altera_uart",
114da2f838dSThomas Chou .id = UCLASS_SERIAL,
115da2f838dSThomas Chou .of_match = altera_uart_ids,
116da2f838dSThomas Chou .ofdata_to_platdata = altera_uart_ofdata_to_platdata,
117da2f838dSThomas Chou .platdata_auto_alloc_size = sizeof(struct altera_uart_platdata),
118da2f838dSThomas Chou .probe = altera_uart_probe,
119da2f838dSThomas Chou .ops = &altera_uart_ops,
120da2f838dSThomas Chou };
121da2f838dSThomas Chou
122da2f838dSThomas Chou #ifdef CONFIG_DEBUG_UART_ALTERA_UART
123da2f838dSThomas Chou
124da2f838dSThomas Chou #include <debug_uart.h>
125da2f838dSThomas Chou
_debug_uart_init(void)126e03c17d0SThomas Chou static inline void _debug_uart_init(void)
127b207d645SMarek Vasut {
128da2f838dSThomas Chou struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
129da2f838dSThomas Chou u32 div;
130da2f838dSThomas Chou
131da2f838dSThomas Chou div = (CONFIG_DEBUG_UART_CLOCK / CONFIG_BAUDRATE) - 1;
132da2f838dSThomas Chou writel(div, ®s->divisor);
133b207d645SMarek Vasut }
134b207d645SMarek Vasut
_debug_uart_putc(int ch)135da2f838dSThomas Chou static inline void _debug_uart_putc(int ch)
136b207d645SMarek Vasut {
137da2f838dSThomas Chou struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
138da2f838dSThomas Chou
139da2f838dSThomas Chou while (1) {
140da2f838dSThomas Chou u32 st = readl(®s->status);
141da2f838dSThomas Chou
142da2f838dSThomas Chou if (st & ALTERA_UART_TRDY)
143da2f838dSThomas Chou break;
144b207d645SMarek Vasut }
145da2f838dSThomas Chou
146da2f838dSThomas Chou writel(ch, ®s->txdata);
147da2f838dSThomas Chou }
148da2f838dSThomas Chou
149da2f838dSThomas Chou DEBUG_UART_FUNCS
150da2f838dSThomas Chou
151da2f838dSThomas Chou #endif
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