xref: /openbmc/u-boot/drivers/rtc/s35392a.c (revision da5337a61cd41f3bfbaee5b78ba58676bd288073)
1*da5337a6SNandor Han /*
2*da5337a6SNandor Han  * SII Semiconductor Corporation S35392A RTC driver.
3*da5337a6SNandor Han  *
4*da5337a6SNandor Han  * Copyright (c) 2017, General Electric Company
5*da5337a6SNandor Han  *
6*da5337a6SNandor Han  * This program is free software; you can redistribute it and/or modify it
7*da5337a6SNandor Han  * under the terms and conditions of the GNU General Public License,
8*da5337a6SNandor Han  * version 2, as published by the Free Software Foundation.
9*da5337a6SNandor Han  *
10*da5337a6SNandor Han  * This program is distributed in the hope it will be useful, but WITHOUT
11*da5337a6SNandor Han  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12*da5337a6SNandor Han  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13*da5337a6SNandor Han  * more details.
14*da5337a6SNandor Han  *
15*da5337a6SNandor Han  * You should have received a copy of the GNU General Public License
16*da5337a6SNandor Han  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17*da5337a6SNandor Han  *
18*da5337a6SNandor Han  * SPDX-License-Identifier:	GPL-2.0
19*da5337a6SNandor Han  */
20*da5337a6SNandor Han 
21*da5337a6SNandor Han #include <command.h>
22*da5337a6SNandor Han #include <common.h>
23*da5337a6SNandor Han #include <dm.h>
24*da5337a6SNandor Han #include <i2c.h>
25*da5337a6SNandor Han #include <linux/bitrev.h>
26*da5337a6SNandor Han #include <rtc.h>
27*da5337a6SNandor Han 
28*da5337a6SNandor Han #define S35390A_CMD_STATUS1		0x30
29*da5337a6SNandor Han #define S35390A_CMD_STATUS2		0x31
30*da5337a6SNandor Han #define S35390A_CMD_TIME1		0x32
31*da5337a6SNandor Han #define S35390A_CMD_TIME2		0x33
32*da5337a6SNandor Han #define S35390A_CMD_INT2_REG1	0x35
33*da5337a6SNandor Han 
34*da5337a6SNandor Han #define S35390A_BYTE_YEAR	0
35*da5337a6SNandor Han #define S35390A_BYTE_MONTH	1
36*da5337a6SNandor Han #define S35390A_BYTE_DAY	2
37*da5337a6SNandor Han #define S35390A_BYTE_WDAY	3
38*da5337a6SNandor Han #define S35390A_BYTE_HOURS	4
39*da5337a6SNandor Han #define S35390A_BYTE_MINS	5
40*da5337a6SNandor Han #define S35390A_BYTE_SECS	6
41*da5337a6SNandor Han 
42*da5337a6SNandor Han /* flags for STATUS1 */
43*da5337a6SNandor Han #define S35390A_FLAG_POC	0x01
44*da5337a6SNandor Han #define S35390A_FLAG_BLD	0x02
45*da5337a6SNandor Han #define S35390A_FLAG_INT2	0x04
46*da5337a6SNandor Han #define S35390A_FLAG_24H	0x40
47*da5337a6SNandor Han #define S35390A_FLAG_RESET	0x80
48*da5337a6SNandor Han 
49*da5337a6SNandor Han /*
50*da5337a6SNandor Han  * If either BLD or POC is set, then the chip has lost power long enough for
51*da5337a6SNandor Han  * the time value to become invalid.
52*da5337a6SNandor Han  */
53*da5337a6SNandor Han #define S35390A_LOW_VOLTAGE (S35390A_FLAG_POC | S35390A_FLAG_BLD)
54*da5337a6SNandor Han 
55*da5337a6SNandor Han /*---------------------------------------------------------------------*/
56*da5337a6SNandor Han #undef DEBUG_RTC
57*da5337a6SNandor Han 
58*da5337a6SNandor Han #ifdef DEBUG_RTC
59*da5337a6SNandor Han #define DEBUGR(fmt, args...) printf(fmt, ##args)
60*da5337a6SNandor Han #else
61*da5337a6SNandor Han #define DEBUGR(fmt, args...)
62*da5337a6SNandor Han #endif
63*da5337a6SNandor Han /*---------------------------------------------------------------------*/
64*da5337a6SNandor Han 
65*da5337a6SNandor Han #ifdef CONFIG_DM_RTC
66*da5337a6SNandor Han #define DEV_TYPE struct udevice
67*da5337a6SNandor Han #else
68*da5337a6SNandor Han /* Local udevice */
69*da5337a6SNandor Han struct ludevice {
70*da5337a6SNandor Han 	u8 chip;
71*da5337a6SNandor Han };
72*da5337a6SNandor Han 
73*da5337a6SNandor Han #define DEV_TYPE struct ludevice
74*da5337a6SNandor Han struct ludevice dev;
75*da5337a6SNandor Han 
76*da5337a6SNandor Han #endif
77*da5337a6SNandor Han 
78*da5337a6SNandor Han #define msleep(a) udelay(a * 1000)
79*da5337a6SNandor Han 
80*da5337a6SNandor Han int lowvoltage;
81*da5337a6SNandor Han 
82*da5337a6SNandor Han static int s35392a_rtc_reset(DEV_TYPE *dev);
83*da5337a6SNandor Han 
84*da5337a6SNandor Han static int s35392a_rtc_read(DEV_TYPE *dev, u8 reg, u8 *buf, int len)
85*da5337a6SNandor Han {
86*da5337a6SNandor Han 	int ret;
87*da5337a6SNandor Han 
88*da5337a6SNandor Han #ifdef CONFIG_DM_RTC
89*da5337a6SNandor Han 	/* TODO: we need to tweak the chip address to reg */
90*da5337a6SNandor Han 	ret = dm_i2c_read(dev, 0, buf, len);
91*da5337a6SNandor Han #else
92*da5337a6SNandor Han 	(void)dev;
93*da5337a6SNandor Han 	ret = i2c_read(reg, 0, -1, buf, len);
94*da5337a6SNandor Han #endif
95*da5337a6SNandor Han 
96*da5337a6SNandor Han 	return ret;
97*da5337a6SNandor Han }
98*da5337a6SNandor Han 
99*da5337a6SNandor Han static int s35392a_rtc_write(DEV_TYPE *dev, u8 reg, u8 *buf, int len)
100*da5337a6SNandor Han {
101*da5337a6SNandor Han 	int ret;
102*da5337a6SNandor Han 
103*da5337a6SNandor Han #ifdef CONFIG_DM_RTC
104*da5337a6SNandor Han 	/* TODO: we need to tweak the chip address to reg */
105*da5337a6SNandor Han 	ret = dm_i2c_write(dev, 0, buf, 1);
106*da5337a6SNandor Han #else
107*da5337a6SNandor Han 	(void)dev;
108*da5337a6SNandor Han 	ret = i2c_write(reg, 0, 0, buf, len);
109*da5337a6SNandor Han #endif
110*da5337a6SNandor Han 
111*da5337a6SNandor Han 	return ret;
112*da5337a6SNandor Han }
113*da5337a6SNandor Han 
114*da5337a6SNandor Han static int s35392a_rtc_read8(DEV_TYPE *dev, unsigned int reg)
115*da5337a6SNandor Han {
116*da5337a6SNandor Han 	u8 val;
117*da5337a6SNandor Han 	int ret;
118*da5337a6SNandor Han 
119*da5337a6SNandor Han 	ret = s35392a_rtc_read(dev, reg, &val, sizeof(val));
120*da5337a6SNandor Han 	return ret < 0 ? ret : val;
121*da5337a6SNandor Han }
122*da5337a6SNandor Han 
123*da5337a6SNandor Han static int s35392a_rtc_write8(DEV_TYPE *dev, unsigned int reg, int val)
124*da5337a6SNandor Han {
125*da5337a6SNandor Han 	int ret;
126*da5337a6SNandor Han 	u8 lval = val;
127*da5337a6SNandor Han 
128*da5337a6SNandor Han 	ret = s35392a_rtc_write(dev, reg, &lval, sizeof(lval));
129*da5337a6SNandor Han 	return ret < 0 ? ret : 0;
130*da5337a6SNandor Han }
131*da5337a6SNandor Han 
132*da5337a6SNandor Han static int validate_time(const struct rtc_time *tm)
133*da5337a6SNandor Han {
134*da5337a6SNandor Han 	if ((tm->tm_year < 2000) || (tm->tm_year > 2099))
135*da5337a6SNandor Han 		return -EINVAL;
136*da5337a6SNandor Han 
137*da5337a6SNandor Han 	if ((tm->tm_mon < 1) || (tm->tm_mon > 12))
138*da5337a6SNandor Han 		return -EINVAL;
139*da5337a6SNandor Han 
140*da5337a6SNandor Han 	if ((tm->tm_mday < 1) || (tm->tm_mday > 31))
141*da5337a6SNandor Han 		return -EINVAL;
142*da5337a6SNandor Han 
143*da5337a6SNandor Han 	if ((tm->tm_wday < 0) || (tm->tm_wday > 6))
144*da5337a6SNandor Han 		return -EINVAL;
145*da5337a6SNandor Han 
146*da5337a6SNandor Han 	if ((tm->tm_hour < 0) || (tm->tm_hour > 23))
147*da5337a6SNandor Han 		return -EINVAL;
148*da5337a6SNandor Han 
149*da5337a6SNandor Han 	if ((tm->tm_min < 0) || (tm->tm_min > 59))
150*da5337a6SNandor Han 		return -EINVAL;
151*da5337a6SNandor Han 
152*da5337a6SNandor Han 	if ((tm->tm_sec < 0) || (tm->tm_sec > 59))
153*da5337a6SNandor Han 		return -EINVAL;
154*da5337a6SNandor Han 
155*da5337a6SNandor Han 	return 0;
156*da5337a6SNandor Han }
157*da5337a6SNandor Han 
158*da5337a6SNandor Han void s35392a_rtc_init(DEV_TYPE *dev)
159*da5337a6SNandor Han {
160*da5337a6SNandor Han 	int status;
161*da5337a6SNandor Han 
162*da5337a6SNandor Han 	status = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1);
163*da5337a6SNandor Han 	if (status < 0)
164*da5337a6SNandor Han 		goto error;
165*da5337a6SNandor Han 
166*da5337a6SNandor Han 	DEBUGR("init: S35390A_CMD_STATUS1: 0x%x\n", status);
167*da5337a6SNandor Han 
168*da5337a6SNandor Han 	lowvoltage = status & S35390A_LOW_VOLTAGE ? 1 : 0;
169*da5337a6SNandor Han 
170*da5337a6SNandor Han 	if (status & S35390A_FLAG_POC)
171*da5337a6SNandor Han 		/*
172*da5337a6SNandor Han 		 * Do not communicate for 0.5 seconds since the power-on
173*da5337a6SNandor Han 		 * detection circuit is in operation.
174*da5337a6SNandor Han 		 */
175*da5337a6SNandor Han 		msleep(500);
176*da5337a6SNandor Han 
177*da5337a6SNandor Han 	else if (!lowvoltage)
178*da5337a6SNandor Han 		/*
179*da5337a6SNandor Han 		 * If both POC and BLD are unset everything is fine.
180*da5337a6SNandor Han 		 */
181*da5337a6SNandor Han 		return;
182*da5337a6SNandor Han 
183*da5337a6SNandor Han 	if (lowvoltage)
184*da5337a6SNandor Han 		printf("RTC low voltage detected\n");
185*da5337a6SNandor Han 
186*da5337a6SNandor Han 	if (!s35392a_rtc_reset(dev))
187*da5337a6SNandor Han 		return;
188*da5337a6SNandor Han 
189*da5337a6SNandor Han error:
190*da5337a6SNandor Han 	printf("Error RTC init.\n");
191*da5337a6SNandor Han }
192*da5337a6SNandor Han 
193*da5337a6SNandor Han /* Get the current time from the RTC */
194*da5337a6SNandor Han static int s35392a_rtc_get(DEV_TYPE *dev, struct rtc_time *tm)
195*da5337a6SNandor Han {
196*da5337a6SNandor Han 	u8 date[7];
197*da5337a6SNandor Han 	int ret, i;
198*da5337a6SNandor Han 
199*da5337a6SNandor Han 	if (lowvoltage) {
200*da5337a6SNandor Han 		DEBUGR("RTC low voltage detected\n");
201*da5337a6SNandor Han 		return -EINVAL;
202*da5337a6SNandor Han 	}
203*da5337a6SNandor Han 
204*da5337a6SNandor Han 	ret = s35392a_rtc_read(dev, S35390A_CMD_TIME1, date, sizeof(date));
205*da5337a6SNandor Han 	if (ret < 0) {
206*da5337a6SNandor Han 		DEBUGR("Error reading date from RTC\n");
207*da5337a6SNandor Han 		return -EIO;
208*da5337a6SNandor Han 	}
209*da5337a6SNandor Han 
210*da5337a6SNandor Han 	/* This chip returns the bits of each byte in reverse order */
211*da5337a6SNandor Han 	for (i = 0; i < 7; ++i)
212*da5337a6SNandor Han 		date[i] = bitrev8(date[i]);
213*da5337a6SNandor Han 
214*da5337a6SNandor Han 	tm->tm_sec  = bcd2bin(date[S35390A_BYTE_SECS]);
215*da5337a6SNandor Han 	tm->tm_min  = bcd2bin(date[S35390A_BYTE_MINS]);
216*da5337a6SNandor Han 	tm->tm_hour = bcd2bin(date[S35390A_BYTE_HOURS] & ~S35390A_FLAG_24H);
217*da5337a6SNandor Han 	tm->tm_wday = bcd2bin(date[S35390A_BYTE_WDAY]);
218*da5337a6SNandor Han 	tm->tm_mday = bcd2bin(date[S35390A_BYTE_DAY]);
219*da5337a6SNandor Han 	tm->tm_mon  = bcd2bin(date[S35390A_BYTE_MONTH]);
220*da5337a6SNandor Han 	tm->tm_year = bcd2bin(date[S35390A_BYTE_YEAR]) + 2000;
221*da5337a6SNandor Han 
222*da5337a6SNandor Han 	DEBUGR("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
223*da5337a6SNandor Han 	       tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
224*da5337a6SNandor Han 	       tm->tm_hour, tm->tm_min, tm->tm_sec);
225*da5337a6SNandor Han 
226*da5337a6SNandor Han 	return 0;
227*da5337a6SNandor Han }
228*da5337a6SNandor Han 
229*da5337a6SNandor Han /* Set the RTC */
230*da5337a6SNandor Han static int s35392a_rtc_set(DEV_TYPE *dev, const struct rtc_time *tm)
231*da5337a6SNandor Han {
232*da5337a6SNandor Han 	int i, ret;
233*da5337a6SNandor Han 	int status;
234*da5337a6SNandor Han 	u8 date[7];
235*da5337a6SNandor Han 
236*da5337a6SNandor Han 	DEBUGR("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
237*da5337a6SNandor Han 	       tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
238*da5337a6SNandor Han 	       tm->tm_hour, tm->tm_min, tm->tm_sec);
239*da5337a6SNandor Han 
240*da5337a6SNandor Han 	ret = validate_time(tm);
241*da5337a6SNandor Han 	if (ret < 0)
242*da5337a6SNandor Han 		return -EINVAL;
243*da5337a6SNandor Han 
244*da5337a6SNandor Han 	/* We support only 24h mode */
245*da5337a6SNandor Han 	ret = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1);
246*da5337a6SNandor Han 	if (ret < 0)
247*da5337a6SNandor Han 		return -EIO;
248*da5337a6SNandor Han 	status = ret;
249*da5337a6SNandor Han 
250*da5337a6SNandor Han 	ret = s35392a_rtc_write8(dev, S35390A_CMD_STATUS1,
251*da5337a6SNandor Han 				 status | S35390A_FLAG_24H);
252*da5337a6SNandor Han 	if (ret < 0)
253*da5337a6SNandor Han 		return -EIO;
254*da5337a6SNandor Han 
255*da5337a6SNandor Han 	date[S35390A_BYTE_YEAR]  = bin2bcd(tm->tm_year - 2000);
256*da5337a6SNandor Han 	date[S35390A_BYTE_MONTH] = bin2bcd(tm->tm_mon);
257*da5337a6SNandor Han 	date[S35390A_BYTE_DAY]   = bin2bcd(tm->tm_mday);
258*da5337a6SNandor Han 	date[S35390A_BYTE_WDAY]  = bin2bcd(tm->tm_wday);
259*da5337a6SNandor Han 	date[S35390A_BYTE_HOURS] = bin2bcd(tm->tm_hour);
260*da5337a6SNandor Han 	date[S35390A_BYTE_MINS]  = bin2bcd(tm->tm_min);
261*da5337a6SNandor Han 	date[S35390A_BYTE_SECS]  = bin2bcd(tm->tm_sec);
262*da5337a6SNandor Han 
263*da5337a6SNandor Han 	/* This chip expects the bits of each byte to be in reverse order */
264*da5337a6SNandor Han 	for (i = 0; i < 7; ++i)
265*da5337a6SNandor Han 		date[i] = bitrev8(date[i]);
266*da5337a6SNandor Han 
267*da5337a6SNandor Han 	ret = s35392a_rtc_write(dev, S35390A_CMD_TIME1, date, sizeof(date));
268*da5337a6SNandor Han 	if (ret < 0) {
269*da5337a6SNandor Han 		DEBUGR("Error writing date to RTC\n");
270*da5337a6SNandor Han 		return -EIO;
271*da5337a6SNandor Han 	}
272*da5337a6SNandor Han 
273*da5337a6SNandor Han 	/* Now we have time. Reset the low voltage status */
274*da5337a6SNandor Han 	lowvoltage = 0;
275*da5337a6SNandor Han 
276*da5337a6SNandor Han 	return 0;
277*da5337a6SNandor Han }
278*da5337a6SNandor Han 
279*da5337a6SNandor Han /* Reset the RTC. */
280*da5337a6SNandor Han static int s35392a_rtc_reset(DEV_TYPE *dev)
281*da5337a6SNandor Han {
282*da5337a6SNandor Han 	int buf;
283*da5337a6SNandor Han 	int ret;
284*da5337a6SNandor Han 	unsigned int initcount = 0;
285*da5337a6SNandor Han 
286*da5337a6SNandor Han 	buf = S35390A_FLAG_RESET;
287*da5337a6SNandor Han 
288*da5337a6SNandor Han initialize:
289*da5337a6SNandor Han 	ret = s35392a_rtc_write8(dev, S35390A_CMD_STATUS1, buf);
290*da5337a6SNandor Han 	if (ret < 0)
291*da5337a6SNandor Han 		return -EIO;
292*da5337a6SNandor Han 
293*da5337a6SNandor Han 	ret = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1);
294*da5337a6SNandor Han 	if (ret < 0)
295*da5337a6SNandor Han 		return -EIO;
296*da5337a6SNandor Han 	buf = ret;
297*da5337a6SNandor Han 
298*da5337a6SNandor Han 	if (!lowvoltage)
299*da5337a6SNandor Han 		lowvoltage = buf & S35390A_LOW_VOLTAGE ? 1 : 0;
300*da5337a6SNandor Han 
301*da5337a6SNandor Han 	if (buf & S35390A_LOW_VOLTAGE) {
302*da5337a6SNandor Han 		/* Try up to five times to reset the chip */
303*da5337a6SNandor Han 		if (initcount < 5) {
304*da5337a6SNandor Han 			++initcount;
305*da5337a6SNandor Han 			goto initialize;
306*da5337a6SNandor Han 		} else {
307*da5337a6SNandor Han 			return -EIO;
308*da5337a6SNandor Han 		}
309*da5337a6SNandor Han 	}
310*da5337a6SNandor Han 
311*da5337a6SNandor Han 	return 0;
312*da5337a6SNandor Han }
313*da5337a6SNandor Han 
314*da5337a6SNandor Han #ifndef CONFIG_DM_RTC
315*da5337a6SNandor Han 
316*da5337a6SNandor Han int rtc_get(struct rtc_time *tm)
317*da5337a6SNandor Han {
318*da5337a6SNandor Han 	return s35392a_rtc_get(&dev, tm);
319*da5337a6SNandor Han }
320*da5337a6SNandor Han 
321*da5337a6SNandor Han int rtc_set(struct rtc_time *tm)
322*da5337a6SNandor Han {
323*da5337a6SNandor Han 	return s35392a_rtc_set(&dev, tm);
324*da5337a6SNandor Han }
325*da5337a6SNandor Han 
326*da5337a6SNandor Han void rtc_reset(void)
327*da5337a6SNandor Han {
328*da5337a6SNandor Han 	s35392a_rtc_reset(&dev);
329*da5337a6SNandor Han }
330*da5337a6SNandor Han 
331*da5337a6SNandor Han void rtc_init(void)
332*da5337a6SNandor Han {
333*da5337a6SNandor Han 	s35392a_rtc_init(&dev);
334*da5337a6SNandor Han }
335*da5337a6SNandor Han 
336*da5337a6SNandor Han #else
337*da5337a6SNandor Han 
338*da5337a6SNandor Han static int s35392a_probe(struct udevice *dev)
339*da5337a6SNandor Han {
340*da5337a6SNandor Han 	s35392a_rtc_init(dev);
341*da5337a6SNandor Han 	return 0;
342*da5337a6SNandor Han }
343*da5337a6SNandor Han 
344*da5337a6SNandor Han static const struct rtc_ops s35392a_rtc_ops = {
345*da5337a6SNandor Han 	.get = s35392a_rtc_get,
346*da5337a6SNandor Han 	.set = s35392a_rtc_set,
347*da5337a6SNandor Han 	.read8 = s35392a_rtc_read8,
348*da5337a6SNandor Han 	.write8 = s35392a_rtc_write8,
349*da5337a6SNandor Han 	.reset = s35392a_rtc_reset,
350*da5337a6SNandor Han };
351*da5337a6SNandor Han 
352*da5337a6SNandor Han static const struct udevice_id s35392a_rtc_ids[] = {
353*da5337a6SNandor Han 	{ .compatible = "sii,s35392a-rtc" },
354*da5337a6SNandor Han 	{ }
355*da5337a6SNandor Han };
356*da5337a6SNandor Han 
357*da5337a6SNandor Han U_BOOT_DRIVER(s35392a_rtc) = {
358*da5337a6SNandor Han 	.name	  = "s35392a_rtc",
359*da5337a6SNandor Han 	.id	      = UCLASS_RTC,
360*da5337a6SNandor Han 	.probe    = s35392a_probe,
361*da5337a6SNandor Han 	.of_match = s35392a_rtc_ids,
362*da5337a6SNandor Han 	.ops	  = &s35392a_rtc_ops,
363*da5337a6SNandor Han };
364*da5337a6SNandor Han 
365*da5337a6SNandor Han #endif
366