xref: /openbmc/u-boot/drivers/rtc/mc146818.c (revision 406fd7e207d3593f150079514a371dccdc651ce7)
183d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
20c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
30c698dcaSJean-Christophe PLAGNIOL-VILLARD  * (C) Copyright 2001
40c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Denis Peter MPL AG Switzerland. d.peter@mpl.ch
50c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
60c698dcaSJean-Christophe PLAGNIOL-VILLARD 
70c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
80c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Date & Time support for the MC146818 (PIXX4) RTC
90c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
100c698dcaSJean-Christophe PLAGNIOL-VILLARD 
110c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <common.h>
120c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <command.h>
13ed2ac0d5SBin Meng #include <dm.h>
140c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <rtc.h>
150c698dcaSJean-Christophe PLAGNIOL-VILLARD 
163f14f814SSimon Glass #if defined(CONFIG_X86) || defined(CONFIG_MALTA)
1721831001SGraeme Russ #include <asm/io.h>
1821831001SGraeme Russ #define in8(p) inb(p)
1921831001SGraeme Russ #define out8(p, v) outb(v, p)
2021831001SGraeme Russ #endif
2121831001SGraeme Russ 
22c6577f72SSimon Glass /* Set this to 1 to clear the CMOS RAM */
23c6577f72SSimon Glass #define CLEAR_CMOS		0
24c6577f72SSimon Glass 
256d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define RTC_PORT_MC146818	CONFIG_SYS_ISA_IO_BASE_ADDRESS + 0x70
260c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_SECONDS		0x00
270c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_SECONDS_ALARM	0x01
280c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MINUTES		0x02
290c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MINUTES_ALARM	0x03
300c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_HOURS		0x04
310c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_HOURS_ALARM		0x05
320c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_DAY_OF_WEEK		0x06
330c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_DATE_OF_MONTH	0x07
340c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MONTH		0x08
350c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_YEAR		0x09
36ed2ac0d5SBin Meng #define RTC_CONFIG_A		0x0a
37ed2ac0d5SBin Meng #define RTC_CONFIG_B		0x0b
38ed2ac0d5SBin Meng #define RTC_CONFIG_C		0x0c
39ed2ac0d5SBin Meng #define RTC_CONFIG_D		0x0d
40c6577f72SSimon Glass #define RTC_REG_SIZE		0x80
410c698dcaSJean-Christophe PLAGNIOL-VILLARD 
42c6577f72SSimon Glass #define RTC_CONFIG_A_REF_CLCK_32KHZ	(1 << 5)
43c6577f72SSimon Glass #define RTC_CONFIG_A_RATE_1024HZ	6
44c6577f72SSimon Glass 
45c6577f72SSimon Glass #define RTC_CONFIG_B_24H		(1 << 1)
46c6577f72SSimon Glass 
47c6577f72SSimon Glass #define RTC_CONFIG_D_VALID_RAM_AND_TIME	0x80
480c698dcaSJean-Christophe PLAGNIOL-VILLARD 
mc146818_read8(int reg)49ed2ac0d5SBin Meng static int mc146818_read8(int reg)
500c698dcaSJean-Christophe PLAGNIOL-VILLARD {
51fc4860c0SSimon Glass #ifdef CONFIG_SYS_RTC_REG_BASE_ADDR
52c6577f72SSimon Glass 	return in8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg);
530c698dcaSJean-Christophe PLAGNIOL-VILLARD #else
54fc4860c0SSimon Glass 	int ofs = 0;
55fc4860c0SSimon Glass 
56fc4860c0SSimon Glass 	if (reg >= 128) {
57fc4860c0SSimon Glass 		ofs = 2;
58fc4860c0SSimon Glass 		reg -= 128;
59fc4860c0SSimon Glass 	}
60fc4860c0SSimon Glass 	out8(RTC_PORT_MC146818 + ofs, reg);
61fc4860c0SSimon Glass 
62fc4860c0SSimon Glass 	return in8(RTC_PORT_MC146818 + ofs + 1);
63fc4860c0SSimon Glass #endif
640c698dcaSJean-Christophe PLAGNIOL-VILLARD }
650c698dcaSJean-Christophe PLAGNIOL-VILLARD 
mc146818_write8(int reg,uchar val)66ed2ac0d5SBin Meng static void mc146818_write8(int reg, uchar val)
670c698dcaSJean-Christophe PLAGNIOL-VILLARD {
68fc4860c0SSimon Glass #ifdef CONFIG_SYS_RTC_REG_BASE_ADDR
69fc4860c0SSimon Glass 	out8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg, val);
70fc4860c0SSimon Glass #else
71fc4860c0SSimon Glass 	int ofs = 0;
72fc4860c0SSimon Glass 
73fc4860c0SSimon Glass 	if (reg >= 128) {
74fc4860c0SSimon Glass 		ofs = 2;
75fc4860c0SSimon Glass 		reg -= 128;
760c698dcaSJean-Christophe PLAGNIOL-VILLARD 	}
77fc4860c0SSimon Glass 	out8(RTC_PORT_MC146818 + ofs, reg);
78fc4860c0SSimon Glass 	out8(RTC_PORT_MC146818 + ofs + 1, val);
790c698dcaSJean-Christophe PLAGNIOL-VILLARD #endif
80fc4860c0SSimon Glass }
81fc4860c0SSimon Glass 
mc146818_get(struct rtc_time * tmp)82ed2ac0d5SBin Meng static int mc146818_get(struct rtc_time *tmp)
83ed2ac0d5SBin Meng {
84af95a3e7SHeinrich Schuchardt 	uchar sec, min, hour, mday, wday __attribute__((unused)),mon, year;
85ed2ac0d5SBin Meng 
86ed2ac0d5SBin Meng 	/* here check if rtc can be accessed */
87ed2ac0d5SBin Meng 	while ((mc146818_read8(RTC_CONFIG_A) & 0x80) == 0x80)
88ed2ac0d5SBin Meng 		;
89ed2ac0d5SBin Meng 
90ed2ac0d5SBin Meng 	sec	= mc146818_read8(RTC_SECONDS);
91ed2ac0d5SBin Meng 	min	= mc146818_read8(RTC_MINUTES);
92ed2ac0d5SBin Meng 	hour	= mc146818_read8(RTC_HOURS);
93ed2ac0d5SBin Meng 	mday	= mc146818_read8(RTC_DATE_OF_MONTH);
94ed2ac0d5SBin Meng 	wday	= mc146818_read8(RTC_DAY_OF_WEEK);
95ed2ac0d5SBin Meng 	mon	= mc146818_read8(RTC_MONTH);
96ed2ac0d5SBin Meng 	year	= mc146818_read8(RTC_YEAR);
97ed2ac0d5SBin Meng #ifdef RTC_DEBUG
98ed2ac0d5SBin Meng 	printf("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x hr: %02x min: %02x sec: %02x\n",
99ed2ac0d5SBin Meng 	       year, mon, mday, wday, hour, min, sec);
1006087be2bSBin Meng 	printf("Alarms: mday: %02x hour: %02x min: %02x sec: %02x\n",
101ed2ac0d5SBin Meng 	       mc146818_read8(RTC_CONFIG_D) & 0x3f,
102ed2ac0d5SBin Meng 	       mc146818_read8(RTC_HOURS_ALARM),
103ed2ac0d5SBin Meng 	       mc146818_read8(RTC_MINUTES_ALARM),
104ed2ac0d5SBin Meng 	       mc146818_read8(RTC_SECONDS_ALARM));
105ed2ac0d5SBin Meng #endif
106ed2ac0d5SBin Meng 	tmp->tm_sec  = bcd2bin(sec & 0x7f);
107ed2ac0d5SBin Meng 	tmp->tm_min  = bcd2bin(min & 0x7f);
108ed2ac0d5SBin Meng 	tmp->tm_hour = bcd2bin(hour & 0x3f);
109ed2ac0d5SBin Meng 	tmp->tm_mday = bcd2bin(mday & 0x3f);
110ed2ac0d5SBin Meng 	tmp->tm_mon  = bcd2bin(mon & 0x1f);
111ed2ac0d5SBin Meng 	tmp->tm_year = bcd2bin(year);
112ed2ac0d5SBin Meng 
113ed2ac0d5SBin Meng 	if (tmp->tm_year < 70)
114ed2ac0d5SBin Meng 		tmp->tm_year += 2000;
115ed2ac0d5SBin Meng 	else
116ed2ac0d5SBin Meng 		tmp->tm_year += 1900;
117ed2ac0d5SBin Meng 
118ed2ac0d5SBin Meng 	tmp->tm_yday = 0;
119ed2ac0d5SBin Meng 	tmp->tm_isdst = 0;
120af95a3e7SHeinrich Schuchardt 	/*
121af95a3e7SHeinrich Schuchardt 	 * The mc146818 only updates wday if it is non-zero, sunday is 1
122af95a3e7SHeinrich Schuchardt 	 * saturday is 7. So let's use our library routine.
123af95a3e7SHeinrich Schuchardt 	 */
124af95a3e7SHeinrich Schuchardt 	rtc_calc_weekday(tmp);
125ed2ac0d5SBin Meng #ifdef RTC_DEBUG
126ed2ac0d5SBin Meng 	printf("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
127ed2ac0d5SBin Meng 	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
128ed2ac0d5SBin Meng 	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
129ed2ac0d5SBin Meng #endif
130ed2ac0d5SBin Meng 
131ed2ac0d5SBin Meng 	return 0;
132ed2ac0d5SBin Meng }
133ed2ac0d5SBin Meng 
mc146818_set(struct rtc_time * tmp)134ed2ac0d5SBin Meng static int mc146818_set(struct rtc_time *tmp)
135ed2ac0d5SBin Meng {
136ed2ac0d5SBin Meng #ifdef RTC_DEBUG
137ed2ac0d5SBin Meng 	printf("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
138ed2ac0d5SBin Meng 	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
139ed2ac0d5SBin Meng 	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
140ed2ac0d5SBin Meng #endif
141ed2ac0d5SBin Meng 	/* Disable the RTC to update the regs */
142ed2ac0d5SBin Meng 	mc146818_write8(RTC_CONFIG_B, 0x82);
143ed2ac0d5SBin Meng 
144ed2ac0d5SBin Meng 	mc146818_write8(RTC_YEAR, bin2bcd(tmp->tm_year % 100));
145ed2ac0d5SBin Meng 	mc146818_write8(RTC_MONTH, bin2bcd(tmp->tm_mon));
146*c5b53baeSHeinrich Schuchardt 	/* Sunday = 1, Saturday = 7 */
147*c5b53baeSHeinrich Schuchardt 	mc146818_write8(RTC_DAY_OF_WEEK, bin2bcd(tmp->tm_wday + 1));
148ed2ac0d5SBin Meng 	mc146818_write8(RTC_DATE_OF_MONTH, bin2bcd(tmp->tm_mday));
149ed2ac0d5SBin Meng 	mc146818_write8(RTC_HOURS, bin2bcd(tmp->tm_hour));
150ed2ac0d5SBin Meng 	mc146818_write8(RTC_MINUTES, bin2bcd(tmp->tm_min));
151ed2ac0d5SBin Meng 	mc146818_write8(RTC_SECONDS, bin2bcd(tmp->tm_sec));
152ed2ac0d5SBin Meng 
153ed2ac0d5SBin Meng 	/* Enable the RTC to update the regs */
154ed2ac0d5SBin Meng 	mc146818_write8(RTC_CONFIG_B, 0x02);
155ed2ac0d5SBin Meng 
156ed2ac0d5SBin Meng 	return 0;
157ed2ac0d5SBin Meng }
158ed2ac0d5SBin Meng 
mc146818_reset(void)159ed2ac0d5SBin Meng static void mc146818_reset(void)
160ed2ac0d5SBin Meng {
161ed2ac0d5SBin Meng 	/* Disable the RTC to update the regs */
162ed2ac0d5SBin Meng 	mc146818_write8(RTC_CONFIG_B, 0x82);
163ed2ac0d5SBin Meng 
164ed2ac0d5SBin Meng 	/* Normal OP */
165ed2ac0d5SBin Meng 	mc146818_write8(RTC_CONFIG_A, 0x20);
166ed2ac0d5SBin Meng 	mc146818_write8(RTC_CONFIG_B, 0x00);
167ed2ac0d5SBin Meng 	mc146818_write8(RTC_CONFIG_B, 0x00);
168ed2ac0d5SBin Meng 
169ed2ac0d5SBin Meng 	/* Enable the RTC to update the regs */
170ed2ac0d5SBin Meng 	mc146818_write8(RTC_CONFIG_B, 0x02);
171ed2ac0d5SBin Meng }
172ed2ac0d5SBin Meng 
mc146818_init(void)173ed2ac0d5SBin Meng static void mc146818_init(void)
174ed2ac0d5SBin Meng {
175ed2ac0d5SBin Meng #if CLEAR_CMOS
176ed2ac0d5SBin Meng 	int i;
177ed2ac0d5SBin Meng 
178ed2ac0d5SBin Meng 	rtc_write8(RTC_SECONDS_ALARM, 0);
179ed2ac0d5SBin Meng 	rtc_write8(RTC_MINUTES_ALARM, 0);
180ed2ac0d5SBin Meng 	rtc_write8(RTC_HOURS_ALARM, 0);
181ed2ac0d5SBin Meng 	for (i = RTC_CONFIG_A; i < RTC_REG_SIZE; i++)
182ed2ac0d5SBin Meng 		rtc_write8(i, 0);
183ed2ac0d5SBin Meng 	printf("RTC: zeroing CMOS RAM\n");
184ed2ac0d5SBin Meng #endif
185ed2ac0d5SBin Meng 
186ed2ac0d5SBin Meng 	/* Setup the real time clock */
187ed2ac0d5SBin Meng 	mc146818_write8(RTC_CONFIG_B, RTC_CONFIG_B_24H);
188ed2ac0d5SBin Meng 	/* Setup the frequency it operates at */
189ed2ac0d5SBin Meng 	mc146818_write8(RTC_CONFIG_A, RTC_CONFIG_A_REF_CLCK_32KHZ |
190ed2ac0d5SBin Meng 			RTC_CONFIG_A_RATE_1024HZ);
191ed2ac0d5SBin Meng 	/* Ensure all reserved bits are 0 in register D */
192ed2ac0d5SBin Meng 	mc146818_write8(RTC_CONFIG_D, RTC_CONFIG_D_VALID_RAM_AND_TIME);
193ed2ac0d5SBin Meng 
194ed2ac0d5SBin Meng 	/* Clear any pending interrupts */
195ed2ac0d5SBin Meng 	mc146818_read8(RTC_CONFIG_C);
196ed2ac0d5SBin Meng }
197ed2ac0d5SBin Meng 
198ed2ac0d5SBin Meng #ifdef CONFIG_DM_RTC
199ed2ac0d5SBin Meng 
rtc_mc146818_get(struct udevice * dev,struct rtc_time * time)200ed2ac0d5SBin Meng static int rtc_mc146818_get(struct udevice *dev, struct rtc_time *time)
201ed2ac0d5SBin Meng {
202ed2ac0d5SBin Meng 	return mc146818_get(time);
203ed2ac0d5SBin Meng }
204ed2ac0d5SBin Meng 
rtc_mc146818_set(struct udevice * dev,const struct rtc_time * time)205ed2ac0d5SBin Meng static int rtc_mc146818_set(struct udevice *dev, const struct rtc_time *time)
206ed2ac0d5SBin Meng {
207ed2ac0d5SBin Meng 	return mc146818_set((struct rtc_time *)time);
208ed2ac0d5SBin Meng }
209ed2ac0d5SBin Meng 
rtc_mc146818_reset(struct udevice * dev)210ed2ac0d5SBin Meng static int rtc_mc146818_reset(struct udevice *dev)
211ed2ac0d5SBin Meng {
212ed2ac0d5SBin Meng 	mc146818_reset();
213ed2ac0d5SBin Meng 
214ed2ac0d5SBin Meng 	return 0;
215ed2ac0d5SBin Meng }
216ed2ac0d5SBin Meng 
rtc_mc146818_read8(struct udevice * dev,unsigned int reg)217ed2ac0d5SBin Meng static int rtc_mc146818_read8(struct udevice *dev, unsigned int reg)
218ed2ac0d5SBin Meng {
219ed2ac0d5SBin Meng 	return mc146818_read8(reg);
220ed2ac0d5SBin Meng }
221ed2ac0d5SBin Meng 
rtc_mc146818_write8(struct udevice * dev,unsigned int reg,int val)222ed2ac0d5SBin Meng static int rtc_mc146818_write8(struct udevice *dev, unsigned int reg, int val)
223ed2ac0d5SBin Meng {
224ed2ac0d5SBin Meng 	mc146818_write8(reg, val);
225ed2ac0d5SBin Meng 
226ed2ac0d5SBin Meng 	return 0;
227ed2ac0d5SBin Meng }
228ed2ac0d5SBin Meng 
rtc_mc146818_probe(struct udevice * dev)229b26eb886SSimon Glass static int rtc_mc146818_probe(struct udevice *dev)
230ed2ac0d5SBin Meng {
231ed2ac0d5SBin Meng 	mc146818_init();
232ed2ac0d5SBin Meng 
233ed2ac0d5SBin Meng 	return 0;
234ed2ac0d5SBin Meng }
235ed2ac0d5SBin Meng 
236ed2ac0d5SBin Meng static const struct rtc_ops rtc_mc146818_ops = {
237ed2ac0d5SBin Meng 	.get = rtc_mc146818_get,
238ed2ac0d5SBin Meng 	.set = rtc_mc146818_set,
239ed2ac0d5SBin Meng 	.reset = rtc_mc146818_reset,
240ed2ac0d5SBin Meng 	.read8 = rtc_mc146818_read8,
241ed2ac0d5SBin Meng 	.write8 = rtc_mc146818_write8,
242ed2ac0d5SBin Meng };
243ed2ac0d5SBin Meng 
244ed2ac0d5SBin Meng static const struct udevice_id rtc_mc146818_ids[] = {
245ed2ac0d5SBin Meng 	{ .compatible = "motorola,mc146818" },
246ed2ac0d5SBin Meng 	{ }
247ed2ac0d5SBin Meng };
248ed2ac0d5SBin Meng 
249ed2ac0d5SBin Meng U_BOOT_DRIVER(rtc_mc146818) = {
250ed2ac0d5SBin Meng 	.name = "rtc_mc146818",
251ed2ac0d5SBin Meng 	.id = UCLASS_RTC,
252ed2ac0d5SBin Meng 	.of_match = rtc_mc146818_ids,
253b26eb886SSimon Glass 	.probe = rtc_mc146818_probe,
254ed2ac0d5SBin Meng 	.ops = &rtc_mc146818_ops,
255ed2ac0d5SBin Meng };
256ed2ac0d5SBin Meng 
257ed2ac0d5SBin Meng #else /* !CONFIG_DM_RTC */
258ed2ac0d5SBin Meng 
rtc_get(struct rtc_time * tmp)259ed2ac0d5SBin Meng int rtc_get(struct rtc_time *tmp)
260ed2ac0d5SBin Meng {
261ed2ac0d5SBin Meng 	return mc146818_get(tmp);
262ed2ac0d5SBin Meng }
263ed2ac0d5SBin Meng 
rtc_set(struct rtc_time * tmp)264ed2ac0d5SBin Meng int rtc_set(struct rtc_time *tmp)
265ed2ac0d5SBin Meng {
266ed2ac0d5SBin Meng 	return mc146818_set(tmp);
267ed2ac0d5SBin Meng }
268ed2ac0d5SBin Meng 
rtc_reset(void)269ed2ac0d5SBin Meng void rtc_reset(void)
270ed2ac0d5SBin Meng {
271ed2ac0d5SBin Meng 	mc146818_reset();
272ed2ac0d5SBin Meng }
273ed2ac0d5SBin Meng 
rtc_read8(int reg)274ed2ac0d5SBin Meng int rtc_read8(int reg)
275ed2ac0d5SBin Meng {
276ed2ac0d5SBin Meng 	return mc146818_read8(reg);
277ed2ac0d5SBin Meng }
278ed2ac0d5SBin Meng 
rtc_write8(int reg,uchar val)279ed2ac0d5SBin Meng void rtc_write8(int reg, uchar val)
280ed2ac0d5SBin Meng {
281ed2ac0d5SBin Meng 	mc146818_write8(reg, val);
282ed2ac0d5SBin Meng }
283ed2ac0d5SBin Meng 
rtc_read32(int reg)284fc4860c0SSimon Glass u32 rtc_read32(int reg)
285fc4860c0SSimon Glass {
286fc4860c0SSimon Glass 	u32 value = 0;
287fc4860c0SSimon Glass 	int i;
288fc4860c0SSimon Glass 
289fc4860c0SSimon Glass 	for (i = 0; i < sizeof(value); i++)
290fc4860c0SSimon Glass 		value |= rtc_read8(reg + i) << (i << 3);
291fc4860c0SSimon Glass 
292fc4860c0SSimon Glass 	return value;
293fc4860c0SSimon Glass }
294fc4860c0SSimon Glass 
rtc_write32(int reg,u32 value)295fc4860c0SSimon Glass void rtc_write32(int reg, u32 value)
296fc4860c0SSimon Glass {
297fc4860c0SSimon Glass 	int i;
298fc4860c0SSimon Glass 
299fc4860c0SSimon Glass 	for (i = 0; i < sizeof(value); i++)
300fc4860c0SSimon Glass 		rtc_write8(reg + i, (value >> (i << 3)) & 0xff);
301fc4860c0SSimon Glass }
3020c698dcaSJean-Christophe PLAGNIOL-VILLARD 
rtc_init(void)303c6577f72SSimon Glass void rtc_init(void)
304c6577f72SSimon Glass {
305ed2ac0d5SBin Meng 	mc146818_init();
306c6577f72SSimon Glass }
307ed2ac0d5SBin Meng 
308ed2ac0d5SBin Meng #endif /* CONFIG_DM_RTC */
309