1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 20c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 30c698dcaSJean-Christophe PLAGNIOL-VILLARD * (C) Copyright 2001, 2002, 2003 40c698dcaSJean-Christophe PLAGNIOL-VILLARD * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 50c698dcaSJean-Christophe PLAGNIOL-VILLARD * Keith Outwater, keith_outwater@mvis.com` 60c698dcaSJean-Christophe PLAGNIOL-VILLARD * Steven Scholz, steven.scholz@imc-berlin.de 70c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 80c698dcaSJean-Christophe PLAGNIOL-VILLARD 90c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 100c698dcaSJean-Christophe PLAGNIOL-VILLARD * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim) 11412921d2SMarkus Niebel * DS1307 and DS1338/9 Real Time Clock (RTC). 120c698dcaSJean-Christophe PLAGNIOL-VILLARD * 130c698dcaSJean-Christophe PLAGNIOL-VILLARD * based on ds1337.c 140c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 150c698dcaSJean-Christophe PLAGNIOL-VILLARD 160c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <common.h> 170c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <command.h> 18d425d605SChris Packham #include <dm.h> 190c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <rtc.h> 200c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <i2c.h> 210c698dcaSJean-Christophe PLAGNIOL-VILLARD 22d425d605SChris Packham enum ds_type { 23d425d605SChris Packham ds_1307, 24d425d605SChris Packham ds_1337, 25d425d605SChris Packham ds_1340, 26d425d605SChris Packham mcp794xx, 27d425d605SChris Packham }; 280c698dcaSJean-Christophe PLAGNIOL-VILLARD 290c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 300c698dcaSJean-Christophe PLAGNIOL-VILLARD * RTC register addresses 310c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 320c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_SEC_REG_ADDR 0x00 330c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MIN_REG_ADDR 0x01 340c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_HR_REG_ADDR 0x02 350c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_DAY_REG_ADDR 0x03 360c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_DATE_REG_ADDR 0x04 370c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MON_REG_ADDR 0x05 380c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_YR_REG_ADDR 0x06 390c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_REG_ADDR 0x07 400c698dcaSJean-Christophe PLAGNIOL-VILLARD 410c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_SEC_BIT_CH 0x80 /* Clock Halt (in Register 0) */ 420c698dcaSJean-Christophe PLAGNIOL-VILLARD 430c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_RS0 0x01 /* Rate select 0 */ 440c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_RS1 0x02 /* Rate select 1 */ 450c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_SQWE 0x10 /* Square Wave Enable */ 460c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_OUT 0x80 /* Output Control */ 470c698dcaSJean-Christophe PLAGNIOL-VILLARD 48c79e1c1cSAndy Fleming /* MCP7941X-specific bits */ 49c79e1c1cSAndy Fleming #define MCP7941X_BIT_ST 0x80 50c79e1c1cSAndy Fleming #define MCP7941X_BIT_VBATEN 0x08 51c79e1c1cSAndy Fleming 52d425d605SChris Packham #ifndef CONFIG_DM_RTC 53d425d605SChris Packham 54d425d605SChris Packham #if defined(CONFIG_CMD_DATE) 55d425d605SChris Packham 56d425d605SChris Packham /*---------------------------------------------------------------------*/ 57d425d605SChris Packham #undef DEBUG_RTC 58d425d605SChris Packham 59d425d605SChris Packham #ifdef DEBUG_RTC 60d425d605SChris Packham #define DEBUGR(fmt, args...) printf(fmt, ##args) 61d425d605SChris Packham #else 62d425d605SChris Packham #define DEBUGR(fmt, args...) 63d425d605SChris Packham #endif 64d425d605SChris Packham /*---------------------------------------------------------------------*/ 65d425d605SChris Packham 66d425d605SChris Packham #ifndef CONFIG_SYS_I2C_RTC_ADDR 67d425d605SChris Packham # define CONFIG_SYS_I2C_RTC_ADDR 0x68 68d425d605SChris Packham #endif 69d425d605SChris Packham 70d425d605SChris Packham #if defined(CONFIG_RTC_DS1307) && (CONFIG_SYS_I2C_SPEED > 100000) 71d425d605SChris Packham # error The DS1307 is specified only up to 100kHz! 72d425d605SChris Packham #endif 73d425d605SChris Packham 740c698dcaSJean-Christophe PLAGNIOL-VILLARD static uchar rtc_read (uchar reg); 750c698dcaSJean-Christophe PLAGNIOL-VILLARD static void rtc_write (uchar reg, uchar val); 760c698dcaSJean-Christophe PLAGNIOL-VILLARD 770c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 780c698dcaSJean-Christophe PLAGNIOL-VILLARD * Get the current time from the RTC 790c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 80b73a19e1SYuri Tikhonov int rtc_get (struct rtc_time *tmp) 810c698dcaSJean-Christophe PLAGNIOL-VILLARD { 82b73a19e1SYuri Tikhonov int rel = 0; 830c698dcaSJean-Christophe PLAGNIOL-VILLARD uchar sec, min, hour, mday, wday, mon, year; 840c698dcaSJean-Christophe PLAGNIOL-VILLARD 85c79e1c1cSAndy Fleming #ifdef CONFIG_RTC_MCP79411 86c79e1c1cSAndy Fleming read_rtc: 87c79e1c1cSAndy Fleming #endif 880c698dcaSJean-Christophe PLAGNIOL-VILLARD sec = rtc_read (RTC_SEC_REG_ADDR); 890c698dcaSJean-Christophe PLAGNIOL-VILLARD min = rtc_read (RTC_MIN_REG_ADDR); 900c698dcaSJean-Christophe PLAGNIOL-VILLARD hour = rtc_read (RTC_HR_REG_ADDR); 910c698dcaSJean-Christophe PLAGNIOL-VILLARD wday = rtc_read (RTC_DAY_REG_ADDR); 920c698dcaSJean-Christophe PLAGNIOL-VILLARD mday = rtc_read (RTC_DATE_REG_ADDR); 930c698dcaSJean-Christophe PLAGNIOL-VILLARD mon = rtc_read (RTC_MON_REG_ADDR); 940c698dcaSJean-Christophe PLAGNIOL-VILLARD year = rtc_read (RTC_YR_REG_ADDR); 950c698dcaSJean-Christophe PLAGNIOL-VILLARD 960c698dcaSJean-Christophe PLAGNIOL-VILLARD DEBUGR ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x " 970c698dcaSJean-Christophe PLAGNIOL-VILLARD "hr: %02x min: %02x sec: %02x\n", 980c698dcaSJean-Christophe PLAGNIOL-VILLARD year, mon, mday, wday, hour, min, sec); 990c698dcaSJean-Christophe PLAGNIOL-VILLARD 100c79e1c1cSAndy Fleming #ifdef CONFIG_RTC_DS1307 1010c698dcaSJean-Christophe PLAGNIOL-VILLARD if (sec & RTC_SEC_BIT_CH) { 1020c698dcaSJean-Christophe PLAGNIOL-VILLARD printf ("### Warning: RTC oscillator has stopped\n"); 1030c698dcaSJean-Christophe PLAGNIOL-VILLARD /* clear the CH flag */ 1040c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_SEC_REG_ADDR, 1050c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_read (RTC_SEC_REG_ADDR) & ~RTC_SEC_BIT_CH); 106b73a19e1SYuri Tikhonov rel = -1; 1070c698dcaSJean-Christophe PLAGNIOL-VILLARD } 108c79e1c1cSAndy Fleming #endif 109c79e1c1cSAndy Fleming 110c79e1c1cSAndy Fleming #ifdef CONFIG_RTC_MCP79411 111c79e1c1cSAndy Fleming /* make sure that the backup battery is enabled */ 112c79e1c1cSAndy Fleming if (!(wday & MCP7941X_BIT_VBATEN)) { 113c79e1c1cSAndy Fleming rtc_write(RTC_DAY_REG_ADDR, 114c79e1c1cSAndy Fleming wday | MCP7941X_BIT_VBATEN); 115c79e1c1cSAndy Fleming } 116c79e1c1cSAndy Fleming 117c79e1c1cSAndy Fleming /* clock halted? turn it on, so clock can tick. */ 118c79e1c1cSAndy Fleming if (!(sec & MCP7941X_BIT_ST)) { 119c79e1c1cSAndy Fleming rtc_write(RTC_SEC_REG_ADDR, MCP7941X_BIT_ST); 120c79e1c1cSAndy Fleming printf("Started RTC\n"); 121c79e1c1cSAndy Fleming goto read_rtc; 122c79e1c1cSAndy Fleming } 123c79e1c1cSAndy Fleming #endif 124c79e1c1cSAndy Fleming 1250c698dcaSJean-Christophe PLAGNIOL-VILLARD 1260c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_sec = bcd2bin (sec & 0x7F); 1270c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_min = bcd2bin (min & 0x7F); 1280c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_hour = bcd2bin (hour & 0x3F); 1290c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_mday = bcd2bin (mday & 0x3F); 1300c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_mon = bcd2bin (mon & 0x1F); 1310c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000); 1320c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_wday = bcd2bin ((wday - 1) & 0x07); 1330c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_yday = 0; 1340c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_isdst= 0; 1350c698dcaSJean-Christophe PLAGNIOL-VILLARD 1360c698dcaSJean-Christophe PLAGNIOL-VILLARD DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 1370c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 1380c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 139b73a19e1SYuri Tikhonov 140b73a19e1SYuri Tikhonov return rel; 1410c698dcaSJean-Christophe PLAGNIOL-VILLARD } 1420c698dcaSJean-Christophe PLAGNIOL-VILLARD 1430c698dcaSJean-Christophe PLAGNIOL-VILLARD 1440c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 1450c698dcaSJean-Christophe PLAGNIOL-VILLARD * Set the RTC 1460c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 147d1e23194SJean-Christophe PLAGNIOL-VILLARD int rtc_set (struct rtc_time *tmp) 1480c698dcaSJean-Christophe PLAGNIOL-VILLARD { 1490c698dcaSJean-Christophe PLAGNIOL-VILLARD DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 1500c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 1510c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 1520c698dcaSJean-Christophe PLAGNIOL-VILLARD 1530c698dcaSJean-Christophe PLAGNIOL-VILLARD if (tmp->tm_year < 1970 || tmp->tm_year > 2069) 1540c698dcaSJean-Christophe PLAGNIOL-VILLARD printf("WARNING: year should be between 1970 and 2069!\n"); 1550c698dcaSJean-Christophe PLAGNIOL-VILLARD 1560c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100)); 1570c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon)); 158c79e1c1cSAndy Fleming #ifdef CONFIG_RTC_MCP79411 159c79e1c1cSAndy Fleming rtc_write (RTC_DAY_REG_ADDR, 160c79e1c1cSAndy Fleming bin2bcd (tmp->tm_wday + 1) | MCP7941X_BIT_VBATEN); 161c79e1c1cSAndy Fleming #else 1620c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1)); 163c79e1c1cSAndy Fleming #endif 1640c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday)); 1650c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour)); 1660c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min)); 167c79e1c1cSAndy Fleming #ifdef CONFIG_RTC_MCP79411 168c79e1c1cSAndy Fleming rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec) | MCP7941X_BIT_ST); 169c79e1c1cSAndy Fleming #else 1700c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec)); 171c79e1c1cSAndy Fleming #endif 172d1e23194SJean-Christophe PLAGNIOL-VILLARD 173d1e23194SJean-Christophe PLAGNIOL-VILLARD return 0; 1740c698dcaSJean-Christophe PLAGNIOL-VILLARD } 1750c698dcaSJean-Christophe PLAGNIOL-VILLARD 1760c698dcaSJean-Christophe PLAGNIOL-VILLARD 1770c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 1780c698dcaSJean-Christophe PLAGNIOL-VILLARD * Reset the RTC. We setting the date back to 1970-01-01. 1790c698dcaSJean-Christophe PLAGNIOL-VILLARD * We also enable the oscillator output on the SQW/OUT pin and program 1800c698dcaSJean-Christophe PLAGNIOL-VILLARD * it for 32,768 Hz output. Note that according to the datasheet, turning 1810c698dcaSJean-Christophe PLAGNIOL-VILLARD * on the square wave output increases the current drain on the backup 1820c698dcaSJean-Christophe PLAGNIOL-VILLARD * battery to something between 480nA and 800nA. 1830c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 1840c698dcaSJean-Christophe PLAGNIOL-VILLARD void rtc_reset (void) 1850c698dcaSJean-Christophe PLAGNIOL-VILLARD { 1860c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_SEC_REG_ADDR, 0x00); /* clearing Clock Halt */ 1870c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS0); 1880c698dcaSJean-Christophe PLAGNIOL-VILLARD } 1890c698dcaSJean-Christophe PLAGNIOL-VILLARD 1900c698dcaSJean-Christophe PLAGNIOL-VILLARD 1910c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 1920c698dcaSJean-Christophe PLAGNIOL-VILLARD * Helper functions 1930c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 1940c698dcaSJean-Christophe PLAGNIOL-VILLARD 1950c698dcaSJean-Christophe PLAGNIOL-VILLARD static 1960c698dcaSJean-Christophe PLAGNIOL-VILLARD uchar rtc_read (uchar reg) 1970c698dcaSJean-Christophe PLAGNIOL-VILLARD { 1986d0f6bcfSJean-Christophe PLAGNIOL-VILLARD return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); 1990c698dcaSJean-Christophe PLAGNIOL-VILLARD } 2000c698dcaSJean-Christophe PLAGNIOL-VILLARD 2010c698dcaSJean-Christophe PLAGNIOL-VILLARD 2020c698dcaSJean-Christophe PLAGNIOL-VILLARD static void rtc_write (uchar reg, uchar val) 2030c698dcaSJean-Christophe PLAGNIOL-VILLARD { 2046d0f6bcfSJean-Christophe PLAGNIOL-VILLARD i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); 2050c698dcaSJean-Christophe PLAGNIOL-VILLARD } 206d425d605SChris Packham 207d425d605SChris Packham #endif /* CONFIG_CMD_DATE*/ 208d425d605SChris Packham 209d425d605SChris Packham #endif /* !CONFIG_DM_RTC */ 210d425d605SChris Packham 211d425d605SChris Packham #ifdef CONFIG_DM_RTC 212d425d605SChris Packham static int ds1307_rtc_set(struct udevice *dev, const struct rtc_time *tm) 213d425d605SChris Packham { 214d425d605SChris Packham int ret; 215d425d605SChris Packham uchar buf[7]; 216d425d605SChris Packham enum ds_type type = dev_get_driver_data(dev); 217d425d605SChris Packham 218d425d605SChris Packham debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 219d425d605SChris Packham tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, 220d425d605SChris Packham tm->tm_hour, tm->tm_min, tm->tm_sec); 221d425d605SChris Packham 222d425d605SChris Packham if (tm->tm_year < 1970 || tm->tm_year > 2069) 223d425d605SChris Packham printf("WARNING: year should be between 1970 and 2069!\n"); 224d425d605SChris Packham 225d425d605SChris Packham buf[RTC_YR_REG_ADDR] = bin2bcd(tm->tm_year % 100); 226d425d605SChris Packham buf[RTC_MON_REG_ADDR] = bin2bcd(tm->tm_mon); 227d425d605SChris Packham buf[RTC_DAY_REG_ADDR] = bin2bcd(tm->tm_wday + 1); 228d425d605SChris Packham buf[RTC_DATE_REG_ADDR] = bin2bcd(tm->tm_mday); 229d425d605SChris Packham buf[RTC_HR_REG_ADDR] = bin2bcd(tm->tm_hour); 230d425d605SChris Packham buf[RTC_MIN_REG_ADDR] = bin2bcd(tm->tm_min); 231d425d605SChris Packham buf[RTC_SEC_REG_ADDR] = bin2bcd(tm->tm_sec); 232d425d605SChris Packham 233d425d605SChris Packham if (type == mcp794xx) { 234d425d605SChris Packham buf[RTC_DAY_REG_ADDR] |= MCP7941X_BIT_VBATEN; 235d425d605SChris Packham buf[RTC_SEC_REG_ADDR] |= MCP7941X_BIT_ST; 236d425d605SChris Packham } 237d425d605SChris Packham 238d425d605SChris Packham ret = dm_i2c_write(dev, 0, buf, sizeof(buf)); 239d425d605SChris Packham if (ret < 0) 240d425d605SChris Packham return ret; 241d425d605SChris Packham 242d425d605SChris Packham return 0; 243d425d605SChris Packham } 244d425d605SChris Packham 245d425d605SChris Packham static int ds1307_rtc_get(struct udevice *dev, struct rtc_time *tm) 246d425d605SChris Packham { 247d425d605SChris Packham int ret; 248d425d605SChris Packham uchar buf[7]; 249d425d605SChris Packham enum ds_type type = dev_get_driver_data(dev); 250d425d605SChris Packham 251d425d605SChris Packham read_rtc: 252d425d605SChris Packham ret = dm_i2c_read(dev, 0, buf, sizeof(buf)); 253d425d605SChris Packham if (ret < 0) 254d425d605SChris Packham return ret; 255d425d605SChris Packham 256d425d605SChris Packham if (type == ds_1307) { 257d425d605SChris Packham if (buf[RTC_SEC_REG_ADDR] & RTC_SEC_BIT_CH) { 258d425d605SChris Packham printf("### Warning: RTC oscillator has stopped\n"); 259d425d605SChris Packham /* clear the CH flag */ 260d425d605SChris Packham buf[RTC_SEC_REG_ADDR] &= ~RTC_SEC_BIT_CH; 261d425d605SChris Packham dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, 262d425d605SChris Packham buf[RTC_SEC_REG_ADDR]); 263d425d605SChris Packham return -1; 264d425d605SChris Packham } 265d425d605SChris Packham } 266d425d605SChris Packham 267d425d605SChris Packham if (type == mcp794xx) { 268d425d605SChris Packham /* make sure that the backup battery is enabled */ 269d425d605SChris Packham if (!(buf[RTC_DAY_REG_ADDR] & MCP7941X_BIT_VBATEN)) { 270d425d605SChris Packham dm_i2c_reg_write(dev, RTC_DAY_REG_ADDR, 271d425d605SChris Packham buf[RTC_DAY_REG_ADDR] | 272d425d605SChris Packham MCP7941X_BIT_VBATEN); 273d425d605SChris Packham } 274d425d605SChris Packham 275d425d605SChris Packham /* clock halted? turn it on, so clock can tick. */ 276d425d605SChris Packham if (!(buf[RTC_SEC_REG_ADDR] & MCP7941X_BIT_ST)) { 277d425d605SChris Packham dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, 278d425d605SChris Packham MCP7941X_BIT_ST); 279d425d605SChris Packham printf("Started RTC\n"); 280d425d605SChris Packham goto read_rtc; 281d425d605SChris Packham } 282d425d605SChris Packham } 283d425d605SChris Packham 284d425d605SChris Packham tm->tm_sec = bcd2bin(buf[RTC_SEC_REG_ADDR] & 0x7F); 285d425d605SChris Packham tm->tm_min = bcd2bin(buf[RTC_MIN_REG_ADDR] & 0x7F); 286d425d605SChris Packham tm->tm_hour = bcd2bin(buf[RTC_HR_REG_ADDR] & 0x3F); 287d425d605SChris Packham tm->tm_mday = bcd2bin(buf[RTC_DATE_REG_ADDR] & 0x3F); 288d425d605SChris Packham tm->tm_mon = bcd2bin(buf[RTC_MON_REG_ADDR] & 0x1F); 289d425d605SChris Packham tm->tm_year = bcd2bin(buf[RTC_YR_REG_ADDR]) + 290d425d605SChris Packham (bcd2bin(buf[RTC_YR_REG_ADDR]) >= 70 ? 291d425d605SChris Packham 1900 : 2000); 292d425d605SChris Packham tm->tm_wday = bcd2bin((buf[RTC_DAY_REG_ADDR] - 1) & 0x07); 293d425d605SChris Packham tm->tm_yday = 0; 294d425d605SChris Packham tm->tm_isdst = 0; 295d425d605SChris Packham 296d425d605SChris Packham debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 297d425d605SChris Packham tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, 298d425d605SChris Packham tm->tm_hour, tm->tm_min, tm->tm_sec); 299d425d605SChris Packham 300d425d605SChris Packham return 0; 301d425d605SChris Packham } 302d425d605SChris Packham 303d425d605SChris Packham static int ds1307_rtc_reset(struct udevice *dev) 304d425d605SChris Packham { 305d425d605SChris Packham int ret; 306d425d605SChris Packham 307d425d605SChris Packham /* clear Clock Halt */ 308d425d605SChris Packham ret = dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, 0x00); 309d425d605SChris Packham if (ret < 0) 310d425d605SChris Packham return ret; 311d425d605SChris Packham ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR, 312d425d605SChris Packham RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 | 313d425d605SChris Packham RTC_CTL_BIT_RS0); 314d425d605SChris Packham if (ret < 0) 315d425d605SChris Packham return ret; 316d425d605SChris Packham 317d425d605SChris Packham return 0; 318d425d605SChris Packham } 319d425d605SChris Packham 320d425d605SChris Packham static int ds1307_probe(struct udevice *dev) 321d425d605SChris Packham { 322d425d605SChris Packham i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS | 323d425d605SChris Packham DM_I2C_CHIP_WR_ADDRESS); 324d425d605SChris Packham 325d425d605SChris Packham return 0; 326d425d605SChris Packham } 327d425d605SChris Packham 328d425d605SChris Packham static const struct rtc_ops ds1307_rtc_ops = { 329d425d605SChris Packham .get = ds1307_rtc_get, 330d425d605SChris Packham .set = ds1307_rtc_set, 331d425d605SChris Packham .reset = ds1307_rtc_reset, 332d425d605SChris Packham }; 333d425d605SChris Packham 334d425d605SChris Packham static const struct udevice_id ds1307_rtc_ids[] = { 335d425d605SChris Packham { .compatible = "dallas,ds1307", .data = ds_1307 }, 336d425d605SChris Packham { .compatible = "dallas,ds1337", .data = ds_1337 }, 337d425d605SChris Packham { .compatible = "dallas,ds1340", .data = ds_1340 }, 338d425d605SChris Packham { .compatible = "microchip,mcp7941x", .data = mcp794xx }, 339d425d605SChris Packham { } 340d425d605SChris Packham }; 341d425d605SChris Packham 342d425d605SChris Packham U_BOOT_DRIVER(rtc_ds1307) = { 343d425d605SChris Packham .name = "rtc-ds1307", 344d425d605SChris Packham .id = UCLASS_RTC, 345d425d605SChris Packham .probe = ds1307_probe, 346d425d605SChris Packham .of_match = ds1307_rtc_ids, 347d425d605SChris Packham .ops = &ds1307_rtc_ops, 348d425d605SChris Packham }; 349d425d605SChris Packham #endif /* CONFIG_DM_RTC */ 350