xref: /openbmc/u-boot/drivers/rtc/ds1307.c (revision 406fd7e207d3593f150079514a371dccdc651ce7)
1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
20c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
30c698dcaSJean-Christophe PLAGNIOL-VILLARD  * (C) Copyright 2001, 2002, 2003
40c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
50c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Keith Outwater, keith_outwater@mvis.com`
60c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Steven Scholz, steven.scholz@imc-berlin.de
70c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
80c698dcaSJean-Christophe PLAGNIOL-VILLARD 
90c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
100c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
11412921d2SMarkus Niebel  * DS1307 and DS1338/9 Real Time Clock (RTC).
120c698dcaSJean-Christophe PLAGNIOL-VILLARD  *
130c698dcaSJean-Christophe PLAGNIOL-VILLARD  * based on ds1337.c
140c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
150c698dcaSJean-Christophe PLAGNIOL-VILLARD 
160c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <common.h>
170c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <command.h>
18d425d605SChris Packham #include <dm.h>
190c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <rtc.h>
200c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <i2c.h>
210c698dcaSJean-Christophe PLAGNIOL-VILLARD 
22d425d605SChris Packham enum ds_type {
23d425d605SChris Packham 	ds_1307,
24d425d605SChris Packham 	ds_1337,
25d425d605SChris Packham 	ds_1340,
26d425d605SChris Packham 	mcp794xx,
27d425d605SChris Packham };
280c698dcaSJean-Christophe PLAGNIOL-VILLARD 
290c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
300c698dcaSJean-Christophe PLAGNIOL-VILLARD  * RTC register addresses
310c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
320c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_SEC_REG_ADDR	0x00
330c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MIN_REG_ADDR	0x01
340c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_HR_REG_ADDR		0x02
350c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_DAY_REG_ADDR	0x03
360c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_DATE_REG_ADDR	0x04
370c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MON_REG_ADDR	0x05
380c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_YR_REG_ADDR		0x06
390c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_REG_ADDR	0x07
400c698dcaSJean-Christophe PLAGNIOL-VILLARD 
410c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_SEC_BIT_CH		0x80	/* Clock Halt (in Register 0)   */
420c698dcaSJean-Christophe PLAGNIOL-VILLARD 
430c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_RS0		0x01	/* Rate select 0                */
440c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_RS1		0x02	/* Rate select 1                */
450c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_SQWE	0x10	/* Square Wave Enable           */
460c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_OUT		0x80	/* Output Control               */
470c698dcaSJean-Christophe PLAGNIOL-VILLARD 
48c79e1c1cSAndy Fleming /* MCP7941X-specific bits */
49c79e1c1cSAndy Fleming #define MCP7941X_BIT_ST		0x80
50c79e1c1cSAndy Fleming #define MCP7941X_BIT_VBATEN	0x08
51c79e1c1cSAndy Fleming 
52d425d605SChris Packham #ifndef CONFIG_DM_RTC
53d425d605SChris Packham 
54d425d605SChris Packham /*---------------------------------------------------------------------*/
55d425d605SChris Packham #undef DEBUG_RTC
56d425d605SChris Packham 
57d425d605SChris Packham #ifdef DEBUG_RTC
58d425d605SChris Packham #define DEBUGR(fmt, args...) printf(fmt, ##args)
59d425d605SChris Packham #else
60d425d605SChris Packham #define DEBUGR(fmt, args...)
61d425d605SChris Packham #endif
62d425d605SChris Packham /*---------------------------------------------------------------------*/
63d425d605SChris Packham 
64d425d605SChris Packham #ifndef CONFIG_SYS_I2C_RTC_ADDR
65d425d605SChris Packham # define CONFIG_SYS_I2C_RTC_ADDR	0x68
66d425d605SChris Packham #endif
67d425d605SChris Packham 
68d425d605SChris Packham #if defined(CONFIG_RTC_DS1307) && (CONFIG_SYS_I2C_SPEED > 100000)
69d425d605SChris Packham # error The DS1307 is specified only up to 100kHz!
70d425d605SChris Packham #endif
71d425d605SChris Packham 
720c698dcaSJean-Christophe PLAGNIOL-VILLARD static uchar rtc_read (uchar reg);
730c698dcaSJean-Christophe PLAGNIOL-VILLARD static void rtc_write (uchar reg, uchar val);
740c698dcaSJean-Christophe PLAGNIOL-VILLARD 
750c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
760c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Get the current time from the RTC
770c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
rtc_get(struct rtc_time * tmp)78b73a19e1SYuri Tikhonov int rtc_get (struct rtc_time *tmp)
790c698dcaSJean-Christophe PLAGNIOL-VILLARD {
80b73a19e1SYuri Tikhonov 	int rel = 0;
810c698dcaSJean-Christophe PLAGNIOL-VILLARD 	uchar sec, min, hour, mday, wday, mon, year;
820c698dcaSJean-Christophe PLAGNIOL-VILLARD 
83c79e1c1cSAndy Fleming #ifdef CONFIG_RTC_MCP79411
84c79e1c1cSAndy Fleming read_rtc:
85c79e1c1cSAndy Fleming #endif
860c698dcaSJean-Christophe PLAGNIOL-VILLARD 	sec = rtc_read (RTC_SEC_REG_ADDR);
870c698dcaSJean-Christophe PLAGNIOL-VILLARD 	min = rtc_read (RTC_MIN_REG_ADDR);
880c698dcaSJean-Christophe PLAGNIOL-VILLARD 	hour = rtc_read (RTC_HR_REG_ADDR);
890c698dcaSJean-Christophe PLAGNIOL-VILLARD 	wday = rtc_read (RTC_DAY_REG_ADDR);
900c698dcaSJean-Christophe PLAGNIOL-VILLARD 	mday = rtc_read (RTC_DATE_REG_ADDR);
910c698dcaSJean-Christophe PLAGNIOL-VILLARD 	mon = rtc_read (RTC_MON_REG_ADDR);
920c698dcaSJean-Christophe PLAGNIOL-VILLARD 	year = rtc_read (RTC_YR_REG_ADDR);
930c698dcaSJean-Christophe PLAGNIOL-VILLARD 
940c698dcaSJean-Christophe PLAGNIOL-VILLARD 	DEBUGR ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
950c698dcaSJean-Christophe PLAGNIOL-VILLARD 		"hr: %02x min: %02x sec: %02x\n",
960c698dcaSJean-Christophe PLAGNIOL-VILLARD 		year, mon, mday, wday, hour, min, sec);
970c698dcaSJean-Christophe PLAGNIOL-VILLARD 
98c79e1c1cSAndy Fleming #ifdef CONFIG_RTC_DS1307
990c698dcaSJean-Christophe PLAGNIOL-VILLARD 	if (sec & RTC_SEC_BIT_CH) {
1000c698dcaSJean-Christophe PLAGNIOL-VILLARD 		printf ("### Warning: RTC oscillator has stopped\n");
1010c698dcaSJean-Christophe PLAGNIOL-VILLARD 		/* clear the CH flag */
1020c698dcaSJean-Christophe PLAGNIOL-VILLARD 		rtc_write (RTC_SEC_REG_ADDR,
1030c698dcaSJean-Christophe PLAGNIOL-VILLARD 			   rtc_read (RTC_SEC_REG_ADDR) & ~RTC_SEC_BIT_CH);
104b73a19e1SYuri Tikhonov 		rel = -1;
1050c698dcaSJean-Christophe PLAGNIOL-VILLARD 	}
106c79e1c1cSAndy Fleming #endif
107c79e1c1cSAndy Fleming 
108c79e1c1cSAndy Fleming #ifdef CONFIG_RTC_MCP79411
109c79e1c1cSAndy Fleming 	/* make sure that the backup battery is enabled */
110c79e1c1cSAndy Fleming 	if (!(wday & MCP7941X_BIT_VBATEN)) {
111c79e1c1cSAndy Fleming 		rtc_write(RTC_DAY_REG_ADDR,
112c79e1c1cSAndy Fleming 			  wday | MCP7941X_BIT_VBATEN);
113c79e1c1cSAndy Fleming 	}
114c79e1c1cSAndy Fleming 
115c79e1c1cSAndy Fleming 	/* clock halted?  turn it on, so clock can tick. */
116c79e1c1cSAndy Fleming 	if (!(sec & MCP7941X_BIT_ST)) {
117c79e1c1cSAndy Fleming 		rtc_write(RTC_SEC_REG_ADDR, MCP7941X_BIT_ST);
118c79e1c1cSAndy Fleming 		printf("Started RTC\n");
119c79e1c1cSAndy Fleming 		goto read_rtc;
120c79e1c1cSAndy Fleming 	}
121c79e1c1cSAndy Fleming #endif
122c79e1c1cSAndy Fleming 
1230c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1240c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_sec  = bcd2bin (sec & 0x7F);
1250c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_min  = bcd2bin (min & 0x7F);
1260c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_hour = bcd2bin (hour & 0x3F);
1270c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_mday = bcd2bin (mday & 0x3F);
1280c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_mon  = bcd2bin (mon & 0x1F);
1290c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
1300c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
1310c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_yday = 0;
1320c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_isdst= 0;
1330c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1340c698dcaSJean-Christophe PLAGNIOL-VILLARD 	DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
1350c698dcaSJean-Christophe PLAGNIOL-VILLARD 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
1360c698dcaSJean-Christophe PLAGNIOL-VILLARD 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
137b73a19e1SYuri Tikhonov 
138b73a19e1SYuri Tikhonov 	return rel;
1390c698dcaSJean-Christophe PLAGNIOL-VILLARD }
1400c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1410c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1420c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
1430c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Set the RTC
1440c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
rtc_set(struct rtc_time * tmp)145d1e23194SJean-Christophe PLAGNIOL-VILLARD int rtc_set (struct rtc_time *tmp)
1460c698dcaSJean-Christophe PLAGNIOL-VILLARD {
1470c698dcaSJean-Christophe PLAGNIOL-VILLARD 	DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
1480c698dcaSJean-Christophe PLAGNIOL-VILLARD 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
1490c698dcaSJean-Christophe PLAGNIOL-VILLARD 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
1500c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1510c698dcaSJean-Christophe PLAGNIOL-VILLARD 	if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
1520c698dcaSJean-Christophe PLAGNIOL-VILLARD 		printf("WARNING: year should be between 1970 and 2069!\n");
1530c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1540c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
1550c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon));
156c79e1c1cSAndy Fleming #ifdef CONFIG_RTC_MCP79411
157c79e1c1cSAndy Fleming 	rtc_write (RTC_DAY_REG_ADDR,
158c79e1c1cSAndy Fleming 		   bin2bcd (tmp->tm_wday + 1) | MCP7941X_BIT_VBATEN);
159c79e1c1cSAndy Fleming #else
1600c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
161c79e1c1cSAndy Fleming #endif
1620c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
1630c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
1640c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
165c79e1c1cSAndy Fleming #ifdef CONFIG_RTC_MCP79411
166c79e1c1cSAndy Fleming 	rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec) | MCP7941X_BIT_ST);
167c79e1c1cSAndy Fleming #else
1680c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
169c79e1c1cSAndy Fleming #endif
170d1e23194SJean-Christophe PLAGNIOL-VILLARD 
171d1e23194SJean-Christophe PLAGNIOL-VILLARD 	return 0;
1720c698dcaSJean-Christophe PLAGNIOL-VILLARD }
1730c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1740c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1750c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
1760c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Reset the RTC. We setting the date back to 1970-01-01.
1770c698dcaSJean-Christophe PLAGNIOL-VILLARD  * We also enable the oscillator output on the SQW/OUT pin and program
1780c698dcaSJean-Christophe PLAGNIOL-VILLARD  * it for 32,768 Hz output. Note that according to the datasheet, turning
1790c698dcaSJean-Christophe PLAGNIOL-VILLARD  * on the square wave output increases the current drain on the backup
1800c698dcaSJean-Christophe PLAGNIOL-VILLARD  * battery to something between 480nA and 800nA.
1810c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
rtc_reset(void)1820c698dcaSJean-Christophe PLAGNIOL-VILLARD void rtc_reset (void)
1830c698dcaSJean-Christophe PLAGNIOL-VILLARD {
1840c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_SEC_REG_ADDR, 0x00);	/* clearing Clock Halt	*/
1850c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS0);
1860c698dcaSJean-Christophe PLAGNIOL-VILLARD }
1870c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1880c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1890c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
1900c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Helper functions
1910c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
1920c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1930c698dcaSJean-Christophe PLAGNIOL-VILLARD static
rtc_read(uchar reg)1940c698dcaSJean-Christophe PLAGNIOL-VILLARD uchar rtc_read (uchar reg)
1950c698dcaSJean-Christophe PLAGNIOL-VILLARD {
1966d0f6bcfSJean-Christophe PLAGNIOL-VILLARD 	return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
1970c698dcaSJean-Christophe PLAGNIOL-VILLARD }
1980c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1990c698dcaSJean-Christophe PLAGNIOL-VILLARD 
rtc_write(uchar reg,uchar val)2000c698dcaSJean-Christophe PLAGNIOL-VILLARD static void rtc_write (uchar reg, uchar val)
2010c698dcaSJean-Christophe PLAGNIOL-VILLARD {
2026d0f6bcfSJean-Christophe PLAGNIOL-VILLARD 	i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
2030c698dcaSJean-Christophe PLAGNIOL-VILLARD }
204d425d605SChris Packham 
205d425d605SChris Packham #endif /* !CONFIG_DM_RTC */
206d425d605SChris Packham 
207d425d605SChris Packham #ifdef CONFIG_DM_RTC
ds1307_rtc_set(struct udevice * dev,const struct rtc_time * tm)208d425d605SChris Packham static int ds1307_rtc_set(struct udevice *dev, const struct rtc_time *tm)
209d425d605SChris Packham {
210d425d605SChris Packham 	int ret;
211d425d605SChris Packham 	uchar buf[7];
212d425d605SChris Packham 	enum ds_type type = dev_get_driver_data(dev);
213d425d605SChris Packham 
214d425d605SChris Packham 	debug("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
215d425d605SChris Packham 	      tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
216d425d605SChris Packham 	      tm->tm_hour, tm->tm_min, tm->tm_sec);
217d425d605SChris Packham 
218d425d605SChris Packham 	if (tm->tm_year < 1970 || tm->tm_year > 2069)
219d425d605SChris Packham 		printf("WARNING: year should be between 1970 and 2069!\n");
220d425d605SChris Packham 
221d425d605SChris Packham 	buf[RTC_YR_REG_ADDR] = bin2bcd(tm->tm_year % 100);
222d425d605SChris Packham 	buf[RTC_MON_REG_ADDR] = bin2bcd(tm->tm_mon);
223d425d605SChris Packham 	buf[RTC_DAY_REG_ADDR] = bin2bcd(tm->tm_wday + 1);
224d425d605SChris Packham 	buf[RTC_DATE_REG_ADDR] = bin2bcd(tm->tm_mday);
225d425d605SChris Packham 	buf[RTC_HR_REG_ADDR] = bin2bcd(tm->tm_hour);
226d425d605SChris Packham 	buf[RTC_MIN_REG_ADDR] = bin2bcd(tm->tm_min);
227d425d605SChris Packham 	buf[RTC_SEC_REG_ADDR] = bin2bcd(tm->tm_sec);
228d425d605SChris Packham 
229d425d605SChris Packham 	if (type == mcp794xx) {
230d425d605SChris Packham 		buf[RTC_DAY_REG_ADDR] |= MCP7941X_BIT_VBATEN;
231d425d605SChris Packham 		buf[RTC_SEC_REG_ADDR] |= MCP7941X_BIT_ST;
232d425d605SChris Packham 	}
233d425d605SChris Packham 
234d425d605SChris Packham 	ret = dm_i2c_write(dev, 0, buf, sizeof(buf));
235d425d605SChris Packham 	if (ret < 0)
236d425d605SChris Packham 		return ret;
237d425d605SChris Packham 
238d425d605SChris Packham 	return 0;
239d425d605SChris Packham }
240d425d605SChris Packham 
ds1307_rtc_get(struct udevice * dev,struct rtc_time * tm)241d425d605SChris Packham static int ds1307_rtc_get(struct udevice *dev, struct rtc_time *tm)
242d425d605SChris Packham {
243d425d605SChris Packham 	int ret;
244d425d605SChris Packham 	uchar buf[7];
245d425d605SChris Packham 	enum ds_type type = dev_get_driver_data(dev);
246d425d605SChris Packham 
247d425d605SChris Packham read_rtc:
248d425d605SChris Packham 	ret = dm_i2c_read(dev, 0, buf, sizeof(buf));
249d425d605SChris Packham 	if (ret < 0)
250d425d605SChris Packham 		return ret;
251d425d605SChris Packham 
252d425d605SChris Packham 	if (type == ds_1307) {
253d425d605SChris Packham 		if (buf[RTC_SEC_REG_ADDR] & RTC_SEC_BIT_CH) {
254d425d605SChris Packham 			printf("### Warning: RTC oscillator has stopped\n");
255d425d605SChris Packham 			/* clear the CH flag */
256d425d605SChris Packham 			buf[RTC_SEC_REG_ADDR] &= ~RTC_SEC_BIT_CH;
257d425d605SChris Packham 			dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR,
258d425d605SChris Packham 					 buf[RTC_SEC_REG_ADDR]);
259d425d605SChris Packham 			return -1;
260d425d605SChris Packham 		}
261d425d605SChris Packham 	}
262d425d605SChris Packham 
263d425d605SChris Packham 	if (type == mcp794xx) {
264d425d605SChris Packham 		/* make sure that the backup battery is enabled */
265d425d605SChris Packham 		if (!(buf[RTC_DAY_REG_ADDR] & MCP7941X_BIT_VBATEN)) {
266d425d605SChris Packham 			dm_i2c_reg_write(dev, RTC_DAY_REG_ADDR,
267d425d605SChris Packham 					 buf[RTC_DAY_REG_ADDR] |
268d425d605SChris Packham 					 MCP7941X_BIT_VBATEN);
269d425d605SChris Packham 		}
270d425d605SChris Packham 
271d425d605SChris Packham 		/* clock halted?  turn it on, so clock can tick. */
272d425d605SChris Packham 		if (!(buf[RTC_SEC_REG_ADDR] & MCP7941X_BIT_ST)) {
273d425d605SChris Packham 			dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR,
274d425d605SChris Packham 					 MCP7941X_BIT_ST);
275d425d605SChris Packham 			printf("Started RTC\n");
276d425d605SChris Packham 			goto read_rtc;
277d425d605SChris Packham 		}
278d425d605SChris Packham 	}
279d425d605SChris Packham 
280d425d605SChris Packham 	tm->tm_sec  = bcd2bin(buf[RTC_SEC_REG_ADDR] & 0x7F);
281d425d605SChris Packham 	tm->tm_min  = bcd2bin(buf[RTC_MIN_REG_ADDR] & 0x7F);
282d425d605SChris Packham 	tm->tm_hour = bcd2bin(buf[RTC_HR_REG_ADDR] & 0x3F);
283d425d605SChris Packham 	tm->tm_mday = bcd2bin(buf[RTC_DATE_REG_ADDR] & 0x3F);
284d425d605SChris Packham 	tm->tm_mon  = bcd2bin(buf[RTC_MON_REG_ADDR] & 0x1F);
285d425d605SChris Packham 	tm->tm_year = bcd2bin(buf[RTC_YR_REG_ADDR]) +
286d425d605SChris Packham 			      (bcd2bin(buf[RTC_YR_REG_ADDR]) >= 70 ?
287d425d605SChris Packham 			       1900 : 2000);
288d425d605SChris Packham 	tm->tm_wday = bcd2bin((buf[RTC_DAY_REG_ADDR] - 1) & 0x07);
289d425d605SChris Packham 	tm->tm_yday = 0;
290d425d605SChris Packham 	tm->tm_isdst = 0;
291d425d605SChris Packham 
292d425d605SChris Packham 	debug("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
293d425d605SChris Packham 	      tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
294d425d605SChris Packham 	      tm->tm_hour, tm->tm_min, tm->tm_sec);
295d425d605SChris Packham 
296d425d605SChris Packham 	return 0;
297d425d605SChris Packham }
298d425d605SChris Packham 
ds1307_rtc_reset(struct udevice * dev)299d425d605SChris Packham static int ds1307_rtc_reset(struct udevice *dev)
300d425d605SChris Packham {
301d425d605SChris Packham 	int ret;
302d425d605SChris Packham 
303d425d605SChris Packham 	/* clear Clock Halt */
304d425d605SChris Packham 	ret = dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, 0x00);
305d425d605SChris Packham 	if (ret < 0)
306d425d605SChris Packham 		return ret;
307d425d605SChris Packham 	ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR,
308d425d605SChris Packham 			       RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 |
309d425d605SChris Packham 			       RTC_CTL_BIT_RS0);
310d425d605SChris Packham 	if (ret < 0)
311d425d605SChris Packham 		return ret;
312d425d605SChris Packham 
313d425d605SChris Packham 	return 0;
314d425d605SChris Packham }
315d425d605SChris Packham 
ds1307_probe(struct udevice * dev)316d425d605SChris Packham static int ds1307_probe(struct udevice *dev)
317d425d605SChris Packham {
318d425d605SChris Packham 	i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS |
319d425d605SChris Packham 			   DM_I2C_CHIP_WR_ADDRESS);
320d425d605SChris Packham 
321d425d605SChris Packham 	return 0;
322d425d605SChris Packham }
323d425d605SChris Packham 
324d425d605SChris Packham static const struct rtc_ops ds1307_rtc_ops = {
325d425d605SChris Packham 	.get = ds1307_rtc_get,
326d425d605SChris Packham 	.set = ds1307_rtc_set,
327d425d605SChris Packham 	.reset = ds1307_rtc_reset,
328d425d605SChris Packham };
329d425d605SChris Packham 
330d425d605SChris Packham static const struct udevice_id ds1307_rtc_ids[] = {
331d425d605SChris Packham 	{ .compatible = "dallas,ds1307", .data = ds_1307 },
332d425d605SChris Packham 	{ .compatible = "dallas,ds1337", .data = ds_1337 },
333d425d605SChris Packham 	{ .compatible = "dallas,ds1340", .data = ds_1340 },
334d425d605SChris Packham 	{ .compatible = "microchip,mcp7941x", .data = mcp794xx },
335d425d605SChris Packham 	{ }
336d425d605SChris Packham };
337d425d605SChris Packham 
338d425d605SChris Packham U_BOOT_DRIVER(rtc_ds1307) = {
339d425d605SChris Packham 	.name	= "rtc-ds1307",
340d425d605SChris Packham 	.id	= UCLASS_RTC,
341d425d605SChris Packham 	.probe	= ds1307_probe,
342d425d605SChris Packham 	.of_match = ds1307_rtc_ids,
343d425d605SChris Packham 	.ops	= &ds1307_rtc_ops,
344d425d605SChris Packham };
345d425d605SChris Packham #endif /* CONFIG_DM_RTC */
346