xref: /openbmc/u-boot/drivers/rtc/ds1306.c (revision d255bb0e78d1cac5b7c8c98cb77a095f5f16de0d)
10c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
20c698dcaSJean-Christophe PLAGNIOL-VILLARD  * (C) Copyright 2002 SIXNET, dge@sixnetio.com.
30c698dcaSJean-Christophe PLAGNIOL-VILLARD  *
40c698dcaSJean-Christophe PLAGNIOL-VILLARD  * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
50c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Stephan Linz <linz@li-pro.net>
60c698dcaSJean-Christophe PLAGNIOL-VILLARD  *
70c698dcaSJean-Christophe PLAGNIOL-VILLARD  * See file CREDITS for list of people who contributed to this
80c698dcaSJean-Christophe PLAGNIOL-VILLARD  * project.
90c698dcaSJean-Christophe PLAGNIOL-VILLARD  *
100c698dcaSJean-Christophe PLAGNIOL-VILLARD  * This program is free software; you can redistribute it and/or
110c698dcaSJean-Christophe PLAGNIOL-VILLARD  * modify it under the terms of the GNU General Public License as
120c698dcaSJean-Christophe PLAGNIOL-VILLARD  * published by the Free Software Foundation; either version 2 of
130c698dcaSJean-Christophe PLAGNIOL-VILLARD  * the License, or (at your option) any later version.
140c698dcaSJean-Christophe PLAGNIOL-VILLARD  *
150c698dcaSJean-Christophe PLAGNIOL-VILLARD  * This program is distributed in the hope that it will be useful,
160c698dcaSJean-Christophe PLAGNIOL-VILLARD  * but WITHOUT ANY WARRANTY; without even the implied warranty of
170c698dcaSJean-Christophe PLAGNIOL-VILLARD  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
180c698dcaSJean-Christophe PLAGNIOL-VILLARD  * GNU General Public License for more details.
190c698dcaSJean-Christophe PLAGNIOL-VILLARD  *
200c698dcaSJean-Christophe PLAGNIOL-VILLARD  * You should have received a copy of the GNU General Public License
210c698dcaSJean-Christophe PLAGNIOL-VILLARD  * along with this program; if not, write to the Free Software
220c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
230c698dcaSJean-Christophe PLAGNIOL-VILLARD  * MA 02111-1307 USA
240c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
250c698dcaSJean-Christophe PLAGNIOL-VILLARD 
260c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
270c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Date & Time support for DS1306 RTC using SPI:
280c698dcaSJean-Christophe PLAGNIOL-VILLARD  *
290c698dcaSJean-Christophe PLAGNIOL-VILLARD  *    - SXNI855T:    it uses its own soft SPI here in this file
300c698dcaSJean-Christophe PLAGNIOL-VILLARD  *    - all other:   use the external spi_xfer() function
310c698dcaSJean-Christophe PLAGNIOL-VILLARD  *                   (see include/spi.h)
320c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
330c698dcaSJean-Christophe PLAGNIOL-VILLARD 
340c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <common.h>
350c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <command.h>
360c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <rtc.h>
370c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <spi.h>
380c698dcaSJean-Christophe PLAGNIOL-VILLARD 
390c698dcaSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_RTC_DS1306) && defined(CONFIG_CMD_DATE)
400c698dcaSJean-Christophe PLAGNIOL-VILLARD 
410c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_SECONDS		0x00
420c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_MINUTES		0x01
430c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_HOURS		0x02
440c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_DAY_OF_WEEK		0x03
450c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_DATE_OF_MONTH	0x04
460c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_MONTH		0x05
470c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_YEAR		0x06
480c698dcaSJean-Christophe PLAGNIOL-VILLARD 
490c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_SECONDS_ALARM0	0x07
500c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_MINUTES_ALARM0	0x08
510c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_HOURS_ALARM0	0x09
520c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_DAY_OF_WEEK_ALARM0	0x0a
530c698dcaSJean-Christophe PLAGNIOL-VILLARD 
540c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_SECONDS_ALARM1	0x0b
550c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_MINUTES_ALARM1	0x0c
560c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_HOURS_ALARM1	0x0d
570c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_DAY_OF_WEEK_ALARM1	0x0e
580c698dcaSJean-Christophe PLAGNIOL-VILLARD 
590c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_CONTROL		0x0f
600c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_STATUS		0x10
610c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_TRICKLE_CHARGER	0x11
620c698dcaSJean-Christophe PLAGNIOL-VILLARD 
630c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	RTC_USER_RAM_BASE	0x20
640c698dcaSJean-Christophe PLAGNIOL-VILLARD 
650c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned int bin2bcd (unsigned int n);
660c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned char bcd2bin (unsigned char c);
670c698dcaSJean-Christophe PLAGNIOL-VILLARD 
680c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ************************************************************************* */
690c698dcaSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SXNI855T		/* !!! SHOULD BE CHANGED TO NEW CODE !!! */
700c698dcaSJean-Christophe PLAGNIOL-VILLARD 
710c698dcaSJean-Christophe PLAGNIOL-VILLARD static void soft_spi_send (unsigned char n);
720c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned char soft_spi_read (void);
730c698dcaSJean-Christophe PLAGNIOL-VILLARD static void init_spi (void);
740c698dcaSJean-Christophe PLAGNIOL-VILLARD 
750c698dcaSJean-Christophe PLAGNIOL-VILLARD /*-----------------------------------------------------------------------
760c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Definitions
770c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
780c698dcaSJean-Christophe PLAGNIOL-VILLARD 
790c698dcaSJean-Christophe PLAGNIOL-VILLARD #define	PB_SPISCK	0x00000002	/* PB 30 */
800c698dcaSJean-Christophe PLAGNIOL-VILLARD #define PB_SPIMOSI	0x00000004	/* PB 29 */
810c698dcaSJean-Christophe PLAGNIOL-VILLARD #define PB_SPIMISO	0x00000008	/* PB 28 */
820c698dcaSJean-Christophe PLAGNIOL-VILLARD #define PB_SPI_CE	0x00010000	/* PB 15 */
830c698dcaSJean-Christophe PLAGNIOL-VILLARD 
840c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
850c698dcaSJean-Christophe PLAGNIOL-VILLARD 
860c698dcaSJean-Christophe PLAGNIOL-VILLARD /* read clock time from DS1306 and return it in *tmp */
87b73a19e1SYuri Tikhonov int rtc_get (struct rtc_time *tmp)
880c698dcaSJean-Christophe PLAGNIOL-VILLARD {
890c698dcaSJean-Christophe PLAGNIOL-VILLARD 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
900c698dcaSJean-Christophe PLAGNIOL-VILLARD 	unsigned char spi_byte;	/* Data Byte */
910c698dcaSJean-Christophe PLAGNIOL-VILLARD 
920c698dcaSJean-Christophe PLAGNIOL-VILLARD 	init_spi ();		/* set port B for software SPI */
930c698dcaSJean-Christophe PLAGNIOL-VILLARD 
940c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Now we can enable the DS1306 RTC */
950c698dcaSJean-Christophe PLAGNIOL-VILLARD 	immap->im_cpm.cp_pbdat |= PB_SPI_CE;
960c698dcaSJean-Christophe PLAGNIOL-VILLARD 	udelay (10);
970c698dcaSJean-Christophe PLAGNIOL-VILLARD 
980c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Shift out the address (0) of the time in the Clock Chip */
990c698dcaSJean-Christophe PLAGNIOL-VILLARD 	soft_spi_send (0);
1000c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1010c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Put the clock readings into the rtc_time structure */
1020c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_sec = bcd2bin (soft_spi_read ());	/* Read seconds */
1030c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_min = bcd2bin (soft_spi_read ());	/* Read minutes */
1040c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1050c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Hours are trickier */
1060c698dcaSJean-Christophe PLAGNIOL-VILLARD 	spi_byte = soft_spi_read ();	/* Read Hours into temporary value */
1070c698dcaSJean-Christophe PLAGNIOL-VILLARD 	if (spi_byte & 0x40) {
1080c698dcaSJean-Christophe PLAGNIOL-VILLARD 		/* 12 hour mode bit is set (time is in 1-12 format) */
1090c698dcaSJean-Christophe PLAGNIOL-VILLARD 		if (spi_byte & 0x20) {
1100c698dcaSJean-Christophe PLAGNIOL-VILLARD 			/* since PM we add 11 to get 0-23 for hours */
1110c698dcaSJean-Christophe PLAGNIOL-VILLARD 			tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) + 11;
1120c698dcaSJean-Christophe PLAGNIOL-VILLARD 		} else {
1130c698dcaSJean-Christophe PLAGNIOL-VILLARD 			/* since AM we subtract 1 to get 0-23 for hours */
1140c698dcaSJean-Christophe PLAGNIOL-VILLARD 			tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) - 1;
1150c698dcaSJean-Christophe PLAGNIOL-VILLARD 		}
1160c698dcaSJean-Christophe PLAGNIOL-VILLARD 	} else {
1170c698dcaSJean-Christophe PLAGNIOL-VILLARD 		/* Otherwise, 0-23 hour format */
1180c698dcaSJean-Christophe PLAGNIOL-VILLARD 		tmp->tm_hour = (bcd2bin (spi_byte & 0x3F));
1190c698dcaSJean-Christophe PLAGNIOL-VILLARD 	}
1200c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1210c698dcaSJean-Christophe PLAGNIOL-VILLARD 	soft_spi_read ();	/* Read and discard Day of week */
1220c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_mday = bcd2bin (soft_spi_read ());	/* Read Day of the Month */
1230c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_mon = bcd2bin (soft_spi_read ());	/* Read Month */
1240c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1250c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Read Year and convert to this century */
1260c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_year = bcd2bin (soft_spi_read ()) + 2000;
1270c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1280c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Now we can disable the DS1306 RTC */
1290c698dcaSJean-Christophe PLAGNIOL-VILLARD 	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;	/* Disable DS1306 Chip */
1300c698dcaSJean-Christophe PLAGNIOL-VILLARD 	udelay (10);
1310c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1320c698dcaSJean-Christophe PLAGNIOL-VILLARD 	GregorianDay (tmp);	/* Determine the day of week */
1330c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1340c698dcaSJean-Christophe PLAGNIOL-VILLARD 	debug ("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
1350c698dcaSJean-Christophe PLAGNIOL-VILLARD 	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
1360c698dcaSJean-Christophe PLAGNIOL-VILLARD 	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
137b73a19e1SYuri Tikhonov 
138b73a19e1SYuri Tikhonov 	return 0;
1390c698dcaSJean-Christophe PLAGNIOL-VILLARD }
1400c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1410c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
1420c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1430c698dcaSJean-Christophe PLAGNIOL-VILLARD /* set clock time in DS1306 RTC and in MPC8xx RTC */
1440c698dcaSJean-Christophe PLAGNIOL-VILLARD void rtc_set (struct rtc_time *tmp)
1450c698dcaSJean-Christophe PLAGNIOL-VILLARD {
1460c698dcaSJean-Christophe PLAGNIOL-VILLARD 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
1470c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1480c698dcaSJean-Christophe PLAGNIOL-VILLARD 	init_spi ();		/* set port B for software SPI */
1490c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1500c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Now we can enable the DS1306 RTC */
1510c698dcaSJean-Christophe PLAGNIOL-VILLARD 	immap->im_cpm.cp_pbdat |= PB_SPI_CE;	/* Enable DS1306 Chip */
1520c698dcaSJean-Christophe PLAGNIOL-VILLARD 	udelay (10);
1530c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1540c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* First disable write protect in the clock chip control register */
1550c698dcaSJean-Christophe PLAGNIOL-VILLARD 	soft_spi_send (0x8F);	/* send address of the control register */
1560c698dcaSJean-Christophe PLAGNIOL-VILLARD 	soft_spi_send (0x00);	/* send control register contents */
1570c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1580c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Now disable the DS1306 to terminate the write */
1590c698dcaSJean-Christophe PLAGNIOL-VILLARD 	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;
1600c698dcaSJean-Christophe PLAGNIOL-VILLARD 	udelay (10);
1610c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1620c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Now enable the DS1306 to initiate a new write */
1630c698dcaSJean-Christophe PLAGNIOL-VILLARD 	immap->im_cpm.cp_pbdat |= PB_SPI_CE;
1640c698dcaSJean-Christophe PLAGNIOL-VILLARD 	udelay (10);
1650c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1660c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Next, send the address of the clock time write registers */
1670c698dcaSJean-Christophe PLAGNIOL-VILLARD 	soft_spi_send (0x80);	/* send address of the first time register */
1680c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1690c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Use Burst Mode to send all of the time data to the clock */
1700c698dcaSJean-Christophe PLAGNIOL-VILLARD 	bin2bcd (tmp->tm_sec);
1710c698dcaSJean-Christophe PLAGNIOL-VILLARD 	soft_spi_send (bin2bcd (tmp->tm_sec));	/* Send Seconds */
1720c698dcaSJean-Christophe PLAGNIOL-VILLARD 	soft_spi_send (bin2bcd (tmp->tm_min));	/* Send Minutes */
1730c698dcaSJean-Christophe PLAGNIOL-VILLARD 	soft_spi_send (bin2bcd (tmp->tm_hour));	/* Send Hour */
1740c698dcaSJean-Christophe PLAGNIOL-VILLARD 	soft_spi_send (bin2bcd (tmp->tm_wday));	/* Send Day of the Week */
1750c698dcaSJean-Christophe PLAGNIOL-VILLARD 	soft_spi_send (bin2bcd (tmp->tm_mday));	/* Send Day of Month */
1760c698dcaSJean-Christophe PLAGNIOL-VILLARD 	soft_spi_send (bin2bcd (tmp->tm_mon));	/* Send Month */
1770c698dcaSJean-Christophe PLAGNIOL-VILLARD 	soft_spi_send (bin2bcd (tmp->tm_year - 2000));	/* Send Year */
1780c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1790c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Now we can disable the Clock chip to terminate the burst write */
1800c698dcaSJean-Christophe PLAGNIOL-VILLARD 	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;	/* Disable DS1306 Chip */
1810c698dcaSJean-Christophe PLAGNIOL-VILLARD 	udelay (10);
1820c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1830c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Now we can enable the Clock chip to initiate a new write */
1840c698dcaSJean-Christophe PLAGNIOL-VILLARD 	immap->im_cpm.cp_pbdat |= PB_SPI_CE;	/* Enable DS1306 Chip */
1850c698dcaSJean-Christophe PLAGNIOL-VILLARD 	udelay (10);
1860c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1870c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* First we Enable write protect in the clock chip control register */
1880c698dcaSJean-Christophe PLAGNIOL-VILLARD 	soft_spi_send (0x8F);	/* send address of the control register */
1890c698dcaSJean-Christophe PLAGNIOL-VILLARD 	soft_spi_send (0x40);	/* send out Control Register contents */
1900c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1910c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Now disable the DS1306 */
1920c698dcaSJean-Christophe PLAGNIOL-VILLARD 	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;	/*  Disable DS1306 Chip */
1930c698dcaSJean-Christophe PLAGNIOL-VILLARD 	udelay (10);
1940c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1950c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Set standard MPC8xx clock to the same time so Linux will
1960c698dcaSJean-Christophe PLAGNIOL-VILLARD 	 * see the time even if it doesn't have a DS1306 clock driver.
1970c698dcaSJean-Christophe PLAGNIOL-VILLARD 	 * This helps with experimenting with standard kernels.
1980c698dcaSJean-Christophe PLAGNIOL-VILLARD 	 */
1990c698dcaSJean-Christophe PLAGNIOL-VILLARD 	{
2000c698dcaSJean-Christophe PLAGNIOL-VILLARD 		ulong tim;
2010c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2020c698dcaSJean-Christophe PLAGNIOL-VILLARD 		tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
2030c698dcaSJean-Christophe PLAGNIOL-VILLARD 			      tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
2040c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2050c698dcaSJean-Christophe PLAGNIOL-VILLARD 		immap->im_sitk.sitk_rtck = KAPWR_KEY;
2060c698dcaSJean-Christophe PLAGNIOL-VILLARD 		immap->im_sit.sit_rtc = tim;
2070c698dcaSJean-Christophe PLAGNIOL-VILLARD 	}
2080c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2090c698dcaSJean-Christophe PLAGNIOL-VILLARD 	debug ("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
2100c698dcaSJean-Christophe PLAGNIOL-VILLARD 	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
2110c698dcaSJean-Christophe PLAGNIOL-VILLARD 	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
2120c698dcaSJean-Christophe PLAGNIOL-VILLARD }
2130c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2140c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
2150c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2160c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Initialize Port B for software SPI */
2170c698dcaSJean-Christophe PLAGNIOL-VILLARD static void init_spi (void)
2180c698dcaSJean-Christophe PLAGNIOL-VILLARD {
2190c698dcaSJean-Christophe PLAGNIOL-VILLARD 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
2200c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2210c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Force output pins to begin at logic 0 */
2220c698dcaSJean-Christophe PLAGNIOL-VILLARD 	immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE | PB_SPIMOSI | PB_SPISCK);
2230c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2240c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Set these 3 signals as outputs */
2250c698dcaSJean-Christophe PLAGNIOL-VILLARD 	immap->im_cpm.cp_pbdir |= (PB_SPIMOSI | PB_SPI_CE | PB_SPISCK);
2260c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2270c698dcaSJean-Christophe PLAGNIOL-VILLARD 	immap->im_cpm.cp_pbdir &= ~PB_SPIMISO;	/* Make MISO pin an input */
2280c698dcaSJean-Christophe PLAGNIOL-VILLARD 	udelay (10);
2290c698dcaSJean-Christophe PLAGNIOL-VILLARD }
2300c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2310c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
2320c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2330c698dcaSJean-Christophe PLAGNIOL-VILLARD /* NOTE: soft_spi_send() assumes that the I/O lines are configured already */
2340c698dcaSJean-Christophe PLAGNIOL-VILLARD static void soft_spi_send (unsigned char n)
2350c698dcaSJean-Christophe PLAGNIOL-VILLARD {
2360c698dcaSJean-Christophe PLAGNIOL-VILLARD 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
2370c698dcaSJean-Christophe PLAGNIOL-VILLARD 	unsigned char bitpos;	/* bit position to receive */
2380c698dcaSJean-Christophe PLAGNIOL-VILLARD 	unsigned char i;	/* Loop Control */
2390c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2400c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* bit position to send, start with most significant bit */
2410c698dcaSJean-Christophe PLAGNIOL-VILLARD 	bitpos = 0x80;
2420c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2430c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Send 8 bits to software SPI */
2440c698dcaSJean-Christophe PLAGNIOL-VILLARD 	for (i = 0; i < 8; i++) {	/* Loop for 8 bits */
2450c698dcaSJean-Christophe PLAGNIOL-VILLARD 		immap->im_cpm.cp_pbdat |= PB_SPISCK;	/* Raise SCK */
2460c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2470c698dcaSJean-Christophe PLAGNIOL-VILLARD 		if (n & bitpos)
2480c698dcaSJean-Christophe PLAGNIOL-VILLARD 			immap->im_cpm.cp_pbdat |= PB_SPIMOSI;	/* Set MOSI to 1 */
2490c698dcaSJean-Christophe PLAGNIOL-VILLARD 		else
2500c698dcaSJean-Christophe PLAGNIOL-VILLARD 			immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI;	/* Set MOSI to 0 */
2510c698dcaSJean-Christophe PLAGNIOL-VILLARD 		udelay (10);
2520c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2530c698dcaSJean-Christophe PLAGNIOL-VILLARD 		immap->im_cpm.cp_pbdat &= ~PB_SPISCK;	/* Lower SCK */
2540c698dcaSJean-Christophe PLAGNIOL-VILLARD 		udelay (10);
2550c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2560c698dcaSJean-Christophe PLAGNIOL-VILLARD 		bitpos >>= 1;	/* Shift for next bit position */
2570c698dcaSJean-Christophe PLAGNIOL-VILLARD 	}
2580c698dcaSJean-Christophe PLAGNIOL-VILLARD }
2590c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2600c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
2610c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2620c698dcaSJean-Christophe PLAGNIOL-VILLARD /* NOTE: soft_spi_read() assumes that the I/O lines are configured already */
2630c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned char soft_spi_read (void)
2640c698dcaSJean-Christophe PLAGNIOL-VILLARD {
2650c698dcaSJean-Christophe PLAGNIOL-VILLARD 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
2660c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2670c698dcaSJean-Christophe PLAGNIOL-VILLARD 	unsigned char spi_byte = 0;	/* Return value, assume success */
2680c698dcaSJean-Christophe PLAGNIOL-VILLARD 	unsigned char bitpos;	/* bit position to receive */
2690c698dcaSJean-Christophe PLAGNIOL-VILLARD 	unsigned char i;	/* Loop Control */
2700c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2710c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* bit position to receive, start with most significant bit */
2720c698dcaSJean-Christophe PLAGNIOL-VILLARD 	bitpos = 0x80;
2730c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2740c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* Read 8 bits here */
2750c698dcaSJean-Christophe PLAGNIOL-VILLARD 	for (i = 0; i < 8; i++) {	/* Do 8 bits in loop */
2760c698dcaSJean-Christophe PLAGNIOL-VILLARD 		immap->im_cpm.cp_pbdat |= PB_SPISCK;	/* Raise SCK */
2770c698dcaSJean-Christophe PLAGNIOL-VILLARD 		udelay (10);
2780c698dcaSJean-Christophe PLAGNIOL-VILLARD 		if (immap->im_cpm.cp_pbdat & PB_SPIMISO)	/* Get a bit of data */
2790c698dcaSJean-Christophe PLAGNIOL-VILLARD 			spi_byte |= bitpos;	/* Set data accordingly */
2800c698dcaSJean-Christophe PLAGNIOL-VILLARD 		immap->im_cpm.cp_pbdat &= ~PB_SPISCK;	/* Lower SCK */
2810c698dcaSJean-Christophe PLAGNIOL-VILLARD 		udelay (10);
2820c698dcaSJean-Christophe PLAGNIOL-VILLARD 		bitpos >>= 1;	/* Shift for next bit position */
2830c698dcaSJean-Christophe PLAGNIOL-VILLARD 	}
2840c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2850c698dcaSJean-Christophe PLAGNIOL-VILLARD 	return spi_byte;	/* Return the byte read */
2860c698dcaSJean-Christophe PLAGNIOL-VILLARD }
2870c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2880c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
2890c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2900c698dcaSJean-Christophe PLAGNIOL-VILLARD void rtc_reset (void)
2910c698dcaSJean-Christophe PLAGNIOL-VILLARD {
2920c698dcaSJean-Christophe PLAGNIOL-VILLARD 	return;			/* nothing to do */
2930c698dcaSJean-Christophe PLAGNIOL-VILLARD }
2940c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2950c698dcaSJean-Christophe PLAGNIOL-VILLARD #else  /* not CONFIG_SXNI855T */
2960c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ************************************************************************* */
2970c698dcaSJean-Christophe PLAGNIOL-VILLARD 
2980c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned char rtc_read (unsigned char reg);
2990c698dcaSJean-Christophe PLAGNIOL-VILLARD static void rtc_write (unsigned char reg, unsigned char val);
3000c698dcaSJean-Christophe PLAGNIOL-VILLARD 
301*d255bb0eSHaavard Skinnemoen static struct spi_slave *slave;
302*d255bb0eSHaavard Skinnemoen 
3030c698dcaSJean-Christophe PLAGNIOL-VILLARD /* read clock time from DS1306 and return it in *tmp */
304b73a19e1SYuri Tikhonov int rtc_get (struct rtc_time *tmp)
3050c698dcaSJean-Christophe PLAGNIOL-VILLARD {
3060c698dcaSJean-Christophe PLAGNIOL-VILLARD 	unsigned char sec, min, hour, mday, wday, mon, year;
3070c698dcaSJean-Christophe PLAGNIOL-VILLARD 
308*d255bb0eSHaavard Skinnemoen 	/*
309*d255bb0eSHaavard Skinnemoen 	 * Assuming Vcc = 2.0V (lowest speed)
310*d255bb0eSHaavard Skinnemoen 	 *
311*d255bb0eSHaavard Skinnemoen 	 * REVISIT: If we add an rtc_init() function we can do this
312*d255bb0eSHaavard Skinnemoen 	 * step just once.
313*d255bb0eSHaavard Skinnemoen 	 */
314*d255bb0eSHaavard Skinnemoen 	if (!slave) {
315*d255bb0eSHaavard Skinnemoen 		slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000,
316*d255bb0eSHaavard Skinnemoen 				SPI_MODE_3 | SPI_CS_HIGH);
317*d255bb0eSHaavard Skinnemoen 		if (!slave)
318*d255bb0eSHaavard Skinnemoen 			return;
319*d255bb0eSHaavard Skinnemoen 	}
320*d255bb0eSHaavard Skinnemoen 
321*d255bb0eSHaavard Skinnemoen 	if (spi_claim_bus(slave))
322*d255bb0eSHaavard Skinnemoen 		return;
323*d255bb0eSHaavard Skinnemoen 
3240c698dcaSJean-Christophe PLAGNIOL-VILLARD 	sec = rtc_read (RTC_SECONDS);
3250c698dcaSJean-Christophe PLAGNIOL-VILLARD 	min = rtc_read (RTC_MINUTES);
3260c698dcaSJean-Christophe PLAGNIOL-VILLARD 	hour = rtc_read (RTC_HOURS);
3270c698dcaSJean-Christophe PLAGNIOL-VILLARD 	mday = rtc_read (RTC_DATE_OF_MONTH);
3280c698dcaSJean-Christophe PLAGNIOL-VILLARD 	wday = rtc_read (RTC_DAY_OF_WEEK);
3290c698dcaSJean-Christophe PLAGNIOL-VILLARD 	mon = rtc_read (RTC_MONTH);
3300c698dcaSJean-Christophe PLAGNIOL-VILLARD 	year = rtc_read (RTC_YEAR);
3310c698dcaSJean-Christophe PLAGNIOL-VILLARD 
332*d255bb0eSHaavard Skinnemoen 	spi_release_bus(slave);
333*d255bb0eSHaavard Skinnemoen 
3340c698dcaSJean-Christophe PLAGNIOL-VILLARD 	debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
3350c698dcaSJean-Christophe PLAGNIOL-VILLARD 	       "hr: %02x min: %02x sec: %02x\n",
3360c698dcaSJean-Christophe PLAGNIOL-VILLARD 	       year, mon, mday, wday, hour, min, sec);
3370c698dcaSJean-Christophe PLAGNIOL-VILLARD 	debug ("Alarms[0]: wday: %02x hour: %02x min: %02x sec: %02x\n",
3380c698dcaSJean-Christophe PLAGNIOL-VILLARD 	       rtc_read (RTC_DAY_OF_WEEK_ALARM0),
3390c698dcaSJean-Christophe PLAGNIOL-VILLARD 	       rtc_read (RTC_HOURS_ALARM0),
3400c698dcaSJean-Christophe PLAGNIOL-VILLARD 	       rtc_read (RTC_MINUTES_ALARM0), rtc_read (RTC_SECONDS_ALARM0));
3410c698dcaSJean-Christophe PLAGNIOL-VILLARD 	debug ("Alarms[1]: wday: %02x hour: %02x min: %02x sec: %02x\n",
3420c698dcaSJean-Christophe PLAGNIOL-VILLARD 	       rtc_read (RTC_DAY_OF_WEEK_ALARM1),
3430c698dcaSJean-Christophe PLAGNIOL-VILLARD 	       rtc_read (RTC_HOURS_ALARM1),
3440c698dcaSJean-Christophe PLAGNIOL-VILLARD 	       rtc_read (RTC_MINUTES_ALARM1), rtc_read (RTC_SECONDS_ALARM1));
3450c698dcaSJean-Christophe PLAGNIOL-VILLARD 
3460c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_sec = bcd2bin (sec & 0x7F);	/* convert Seconds */
3470c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_min = bcd2bin (min & 0x7F);	/* convert Minutes */
3480c698dcaSJean-Christophe PLAGNIOL-VILLARD 
3490c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* convert Hours */
3500c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_hour = (hour & 0x40)
3510c698dcaSJean-Christophe PLAGNIOL-VILLARD 		? ((hour & 0x20)	/* 12 hour mode */
3520c698dcaSJean-Christophe PLAGNIOL-VILLARD 		   ? bcd2bin (hour & 0x1F) + 11	/* PM */
3530c698dcaSJean-Christophe PLAGNIOL-VILLARD 		   : bcd2bin (hour & 0x1F) - 1	/* AM */
3540c698dcaSJean-Christophe PLAGNIOL-VILLARD 		)
3550c698dcaSJean-Christophe PLAGNIOL-VILLARD 		: bcd2bin (hour & 0x3F);	/* 24 hour mode */
3560c698dcaSJean-Christophe PLAGNIOL-VILLARD 
3570c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_mday = bcd2bin (mday & 0x3F);	/* convert Day of the Month */
3580c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_mon = bcd2bin (mon & 0x1F);	/* convert Month */
3590c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_year = bcd2bin (year) + 2000;	/* convert Year */
3600c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_wday = bcd2bin (wday & 0x07) - 1;	/* convert Day of the Week */
3610c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_yday = 0;
3620c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_isdst = 0;
3630c698dcaSJean-Christophe PLAGNIOL-VILLARD 
3640c698dcaSJean-Christophe PLAGNIOL-VILLARD 	debug ("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
3650c698dcaSJean-Christophe PLAGNIOL-VILLARD 	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
3660c698dcaSJean-Christophe PLAGNIOL-VILLARD 	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
367b73a19e1SYuri Tikhonov 
368b73a19e1SYuri Tikhonov 	return 0;
3690c698dcaSJean-Christophe PLAGNIOL-VILLARD }
3700c698dcaSJean-Christophe PLAGNIOL-VILLARD 
3710c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
3720c698dcaSJean-Christophe PLAGNIOL-VILLARD 
3730c698dcaSJean-Christophe PLAGNIOL-VILLARD /* set clock time from *tmp in DS1306 RTC */
3740c698dcaSJean-Christophe PLAGNIOL-VILLARD void rtc_set (struct rtc_time *tmp)
3750c698dcaSJean-Christophe PLAGNIOL-VILLARD {
376*d255bb0eSHaavard Skinnemoen 	/* Assuming Vcc = 2.0V (lowest speed) */
377*d255bb0eSHaavard Skinnemoen 	if (!slave) {
378*d255bb0eSHaavard Skinnemoen 		slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000,
379*d255bb0eSHaavard Skinnemoen 				SPI_MODE_3 | SPI_CS_HIGH);
380*d255bb0eSHaavard Skinnemoen 		if (!slave)
381*d255bb0eSHaavard Skinnemoen 			return;
382*d255bb0eSHaavard Skinnemoen 	}
383*d255bb0eSHaavard Skinnemoen 
384*d255bb0eSHaavard Skinnemoen 	if (spi_claim_bus(slave))
385*d255bb0eSHaavard Skinnemoen 		return;
386*d255bb0eSHaavard Skinnemoen 
3870c698dcaSJean-Christophe PLAGNIOL-VILLARD 	debug ("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
3880c698dcaSJean-Christophe PLAGNIOL-VILLARD 	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
3890c698dcaSJean-Christophe PLAGNIOL-VILLARD 	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
3900c698dcaSJean-Christophe PLAGNIOL-VILLARD 
3910c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec));
3920c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min));
3930c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour));
3940c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1));
3950c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday));
3960c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon));
3970c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000));
398*d255bb0eSHaavard Skinnemoen 
399*d255bb0eSHaavard Skinnemoen 	spi_release_bus(slave);
4000c698dcaSJean-Christophe PLAGNIOL-VILLARD }
4010c698dcaSJean-Christophe PLAGNIOL-VILLARD 
4020c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
4030c698dcaSJean-Christophe PLAGNIOL-VILLARD 
4040c698dcaSJean-Christophe PLAGNIOL-VILLARD /* reset the DS1306 */
4050c698dcaSJean-Christophe PLAGNIOL-VILLARD void rtc_reset (void)
4060c698dcaSJean-Christophe PLAGNIOL-VILLARD {
407*d255bb0eSHaavard Skinnemoen 	/* Assuming Vcc = 2.0V (lowest speed) */
408*d255bb0eSHaavard Skinnemoen 	if (!slave) {
409*d255bb0eSHaavard Skinnemoen 		slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000,
410*d255bb0eSHaavard Skinnemoen 				SPI_MODE_3 | SPI_CS_HIGH);
411*d255bb0eSHaavard Skinnemoen 		if (!slave)
412*d255bb0eSHaavard Skinnemoen 			return;
413*d255bb0eSHaavard Skinnemoen 	}
414*d255bb0eSHaavard Skinnemoen 
415*d255bb0eSHaavard Skinnemoen 	if (spi_claim_bus(slave))
416*d255bb0eSHaavard Skinnemoen 		return;
417*d255bb0eSHaavard Skinnemoen 
4180c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* clear the control register */
4190c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_CONTROL, 0x00);	/* 1st step: reset WP */
4200c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_CONTROL, 0x00);	/* 2nd step: reset 1Hz, AIE1, AIE0 */
4210c698dcaSJean-Christophe PLAGNIOL-VILLARD 
4220c698dcaSJean-Christophe PLAGNIOL-VILLARD 	/* reset all alarms */
4230c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_SECONDS_ALARM0, 0x00);
4240c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_SECONDS_ALARM1, 0x00);
4250c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_MINUTES_ALARM0, 0x00);
4260c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_MINUTES_ALARM1, 0x00);
4270c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_HOURS_ALARM0, 0x00);
4280c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_HOURS_ALARM1, 0x00);
4290c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00);
4300c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00);
431*d255bb0eSHaavard Skinnemoen 
432*d255bb0eSHaavard Skinnemoen 	spi_release_bus(slave);
4330c698dcaSJean-Christophe PLAGNIOL-VILLARD }
4340c698dcaSJean-Christophe PLAGNIOL-VILLARD 
4350c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
4360c698dcaSJean-Christophe PLAGNIOL-VILLARD 
4370c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned char rtc_read (unsigned char reg)
4380c698dcaSJean-Christophe PLAGNIOL-VILLARD {
439*d255bb0eSHaavard Skinnemoen 	int ret;
4400c698dcaSJean-Christophe PLAGNIOL-VILLARD 
441*d255bb0eSHaavard Skinnemoen 	ret = spi_w8r8(slave, reg);
442*d255bb0eSHaavard Skinnemoen 	return ret < 0 ? 0 : ret;
4430c698dcaSJean-Christophe PLAGNIOL-VILLARD }
4440c698dcaSJean-Christophe PLAGNIOL-VILLARD 
4450c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
4460c698dcaSJean-Christophe PLAGNIOL-VILLARD 
4470c698dcaSJean-Christophe PLAGNIOL-VILLARD static void rtc_write (unsigned char reg, unsigned char val)
4480c698dcaSJean-Christophe PLAGNIOL-VILLARD {
4490c698dcaSJean-Christophe PLAGNIOL-VILLARD 	unsigned char dout[2];	/* SPI Output Data Bytes */
4500c698dcaSJean-Christophe PLAGNIOL-VILLARD 	unsigned char din[2];	/* SPI Input Data Bytes */
4510c698dcaSJean-Christophe PLAGNIOL-VILLARD 
4520c698dcaSJean-Christophe PLAGNIOL-VILLARD 	dout[0] = 0x80 | reg;
4530c698dcaSJean-Christophe PLAGNIOL-VILLARD 	dout[1] = val;
4540c698dcaSJean-Christophe PLAGNIOL-VILLARD 
455*d255bb0eSHaavard Skinnemoen 	spi_xfer (slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END);
4560c698dcaSJean-Christophe PLAGNIOL-VILLARD }
4570c698dcaSJean-Christophe PLAGNIOL-VILLARD 
4580c698dcaSJean-Christophe PLAGNIOL-VILLARD #endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */
4590c698dcaSJean-Christophe PLAGNIOL-VILLARD 
4600c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
4610c698dcaSJean-Christophe PLAGNIOL-VILLARD 
4620c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned char bcd2bin (unsigned char n)
4630c698dcaSJean-Christophe PLAGNIOL-VILLARD {
4640c698dcaSJean-Christophe PLAGNIOL-VILLARD 	return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
4650c698dcaSJean-Christophe PLAGNIOL-VILLARD }
4660c698dcaSJean-Christophe PLAGNIOL-VILLARD 
4670c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
4680c698dcaSJean-Christophe PLAGNIOL-VILLARD 
4690c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned int bin2bcd (unsigned int n)
4700c698dcaSJean-Christophe PLAGNIOL-VILLARD {
4710c698dcaSJean-Christophe PLAGNIOL-VILLARD 	return (((n / 10) << 4) | (n % 10));
4720c698dcaSJean-Christophe PLAGNIOL-VILLARD }
4730c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
4740c698dcaSJean-Christophe PLAGNIOL-VILLARD 
4750c698dcaSJean-Christophe PLAGNIOL-VILLARD #endif
476