10c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 20c698dcaSJean-Christophe PLAGNIOL-VILLARD * (C) Copyright 2002 SIXNET, dge@sixnetio.com. 30c698dcaSJean-Christophe PLAGNIOL-VILLARD * 40c698dcaSJean-Christophe PLAGNIOL-VILLARD * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net> 50c698dcaSJean-Christophe PLAGNIOL-VILLARD * Stephan Linz <linz@li-pro.net> 60c698dcaSJean-Christophe PLAGNIOL-VILLARD * 70c698dcaSJean-Christophe PLAGNIOL-VILLARD * See file CREDITS for list of people who contributed to this 80c698dcaSJean-Christophe PLAGNIOL-VILLARD * project. 90c698dcaSJean-Christophe PLAGNIOL-VILLARD * 100c698dcaSJean-Christophe PLAGNIOL-VILLARD * This program is free software; you can redistribute it and/or 110c698dcaSJean-Christophe PLAGNIOL-VILLARD * modify it under the terms of the GNU General Public License as 120c698dcaSJean-Christophe PLAGNIOL-VILLARD * published by the Free Software Foundation; either version 2 of 130c698dcaSJean-Christophe PLAGNIOL-VILLARD * the License, or (at your option) any later version. 140c698dcaSJean-Christophe PLAGNIOL-VILLARD * 150c698dcaSJean-Christophe PLAGNIOL-VILLARD * This program is distributed in the hope that it will be useful, 160c698dcaSJean-Christophe PLAGNIOL-VILLARD * but WITHOUT ANY WARRANTY; without even the implied warranty of 170c698dcaSJean-Christophe PLAGNIOL-VILLARD * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 180c698dcaSJean-Christophe PLAGNIOL-VILLARD * GNU General Public License for more details. 190c698dcaSJean-Christophe PLAGNIOL-VILLARD * 200c698dcaSJean-Christophe PLAGNIOL-VILLARD * You should have received a copy of the GNU General Public License 210c698dcaSJean-Christophe PLAGNIOL-VILLARD * along with this program; if not, write to the Free Software 220c698dcaSJean-Christophe PLAGNIOL-VILLARD * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 230c698dcaSJean-Christophe PLAGNIOL-VILLARD * MA 02111-1307 USA 240c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 250c698dcaSJean-Christophe PLAGNIOL-VILLARD 260c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 270c698dcaSJean-Christophe PLAGNIOL-VILLARD * Date & Time support for DS1306 RTC using SPI: 280c698dcaSJean-Christophe PLAGNIOL-VILLARD * 290c698dcaSJean-Christophe PLAGNIOL-VILLARD * - SXNI855T: it uses its own soft SPI here in this file 300c698dcaSJean-Christophe PLAGNIOL-VILLARD * - all other: use the external spi_xfer() function 310c698dcaSJean-Christophe PLAGNIOL-VILLARD * (see include/spi.h) 320c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 330c698dcaSJean-Christophe PLAGNIOL-VILLARD 340c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <common.h> 350c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <command.h> 360c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <rtc.h> 370c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <spi.h> 380c698dcaSJean-Christophe PLAGNIOL-VILLARD 390c698dcaSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_RTC_DS1306) && defined(CONFIG_CMD_DATE) 400c698dcaSJean-Christophe PLAGNIOL-VILLARD 410c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_SECONDS 0x00 420c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MINUTES 0x01 430c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_HOURS 0x02 440c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_DAY_OF_WEEK 0x03 450c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_DATE_OF_MONTH 0x04 460c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MONTH 0x05 470c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_YEAR 0x06 480c698dcaSJean-Christophe PLAGNIOL-VILLARD 490c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_SECONDS_ALARM0 0x07 500c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MINUTES_ALARM0 0x08 510c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_HOURS_ALARM0 0x09 520c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_DAY_OF_WEEK_ALARM0 0x0a 530c698dcaSJean-Christophe PLAGNIOL-VILLARD 540c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_SECONDS_ALARM1 0x0b 550c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MINUTES_ALARM1 0x0c 560c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_HOURS_ALARM1 0x0d 570c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_DAY_OF_WEEK_ALARM1 0x0e 580c698dcaSJean-Christophe PLAGNIOL-VILLARD 590c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CONTROL 0x0f 600c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_STATUS 0x10 610c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_TRICKLE_CHARGER 0x11 620c698dcaSJean-Christophe PLAGNIOL-VILLARD 630c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_USER_RAM_BASE 0x20 640c698dcaSJean-Christophe PLAGNIOL-VILLARD 650c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 660c698dcaSJean-Christophe PLAGNIOL-VILLARD * External table of chip select functions (see the appropriate board 670c698dcaSJean-Christophe PLAGNIOL-VILLARD * support for the actual definition of the table). 680c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 690c698dcaSJean-Christophe PLAGNIOL-VILLARD extern spi_chipsel_type spi_chipsel[]; 700c698dcaSJean-Christophe PLAGNIOL-VILLARD extern int spi_chipsel_cnt; 710c698dcaSJean-Christophe PLAGNIOL-VILLARD 720c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned int bin2bcd (unsigned int n); 730c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned char bcd2bin (unsigned char c); 740c698dcaSJean-Christophe PLAGNIOL-VILLARD 750c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ************************************************************************* */ 760c698dcaSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SXNI855T /* !!! SHOULD BE CHANGED TO NEW CODE !!! */ 770c698dcaSJean-Christophe PLAGNIOL-VILLARD 780c698dcaSJean-Christophe PLAGNIOL-VILLARD static void soft_spi_send (unsigned char n); 790c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned char soft_spi_read (void); 800c698dcaSJean-Christophe PLAGNIOL-VILLARD static void init_spi (void); 810c698dcaSJean-Christophe PLAGNIOL-VILLARD 820c698dcaSJean-Christophe PLAGNIOL-VILLARD /*----------------------------------------------------------------------- 830c698dcaSJean-Christophe PLAGNIOL-VILLARD * Definitions 840c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 850c698dcaSJean-Christophe PLAGNIOL-VILLARD 860c698dcaSJean-Christophe PLAGNIOL-VILLARD #define PB_SPISCK 0x00000002 /* PB 30 */ 870c698dcaSJean-Christophe PLAGNIOL-VILLARD #define PB_SPIMOSI 0x00000004 /* PB 29 */ 880c698dcaSJean-Christophe PLAGNIOL-VILLARD #define PB_SPIMISO 0x00000008 /* PB 28 */ 890c698dcaSJean-Christophe PLAGNIOL-VILLARD #define PB_SPI_CE 0x00010000 /* PB 15 */ 900c698dcaSJean-Christophe PLAGNIOL-VILLARD 910c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 920c698dcaSJean-Christophe PLAGNIOL-VILLARD 930c698dcaSJean-Christophe PLAGNIOL-VILLARD /* read clock time from DS1306 and return it in *tmp */ 94*b73a19e1SYuri Tikhonov int rtc_get (struct rtc_time *tmp) 950c698dcaSJean-Christophe PLAGNIOL-VILLARD { 960c698dcaSJean-Christophe PLAGNIOL-VILLARD volatile immap_t *immap = (immap_t *) CFG_IMMR; 970c698dcaSJean-Christophe PLAGNIOL-VILLARD unsigned char spi_byte; /* Data Byte */ 980c698dcaSJean-Christophe PLAGNIOL-VILLARD 990c698dcaSJean-Christophe PLAGNIOL-VILLARD init_spi (); /* set port B for software SPI */ 1000c698dcaSJean-Christophe PLAGNIOL-VILLARD 1010c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Now we can enable the DS1306 RTC */ 1020c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_cpm.cp_pbdat |= PB_SPI_CE; 1030c698dcaSJean-Christophe PLAGNIOL-VILLARD udelay (10); 1040c698dcaSJean-Christophe PLAGNIOL-VILLARD 1050c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Shift out the address (0) of the time in the Clock Chip */ 1060c698dcaSJean-Christophe PLAGNIOL-VILLARD soft_spi_send (0); 1070c698dcaSJean-Christophe PLAGNIOL-VILLARD 1080c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Put the clock readings into the rtc_time structure */ 1090c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_sec = bcd2bin (soft_spi_read ()); /* Read seconds */ 1100c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_min = bcd2bin (soft_spi_read ()); /* Read minutes */ 1110c698dcaSJean-Christophe PLAGNIOL-VILLARD 1120c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Hours are trickier */ 1130c698dcaSJean-Christophe PLAGNIOL-VILLARD spi_byte = soft_spi_read (); /* Read Hours into temporary value */ 1140c698dcaSJean-Christophe PLAGNIOL-VILLARD if (spi_byte & 0x40) { 1150c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 12 hour mode bit is set (time is in 1-12 format) */ 1160c698dcaSJean-Christophe PLAGNIOL-VILLARD if (spi_byte & 0x20) { 1170c698dcaSJean-Christophe PLAGNIOL-VILLARD /* since PM we add 11 to get 0-23 for hours */ 1180c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) + 11; 1190c698dcaSJean-Christophe PLAGNIOL-VILLARD } else { 1200c698dcaSJean-Christophe PLAGNIOL-VILLARD /* since AM we subtract 1 to get 0-23 for hours */ 1210c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) - 1; 1220c698dcaSJean-Christophe PLAGNIOL-VILLARD } 1230c698dcaSJean-Christophe PLAGNIOL-VILLARD } else { 1240c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Otherwise, 0-23 hour format */ 1250c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_hour = (bcd2bin (spi_byte & 0x3F)); 1260c698dcaSJean-Christophe PLAGNIOL-VILLARD } 1270c698dcaSJean-Christophe PLAGNIOL-VILLARD 1280c698dcaSJean-Christophe PLAGNIOL-VILLARD soft_spi_read (); /* Read and discard Day of week */ 1290c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_mday = bcd2bin (soft_spi_read ()); /* Read Day of the Month */ 1300c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_mon = bcd2bin (soft_spi_read ()); /* Read Month */ 1310c698dcaSJean-Christophe PLAGNIOL-VILLARD 1320c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Read Year and convert to this century */ 1330c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_year = bcd2bin (soft_spi_read ()) + 2000; 1340c698dcaSJean-Christophe PLAGNIOL-VILLARD 1350c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Now we can disable the DS1306 RTC */ 1360c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */ 1370c698dcaSJean-Christophe PLAGNIOL-VILLARD udelay (10); 1380c698dcaSJean-Christophe PLAGNIOL-VILLARD 1390c698dcaSJean-Christophe PLAGNIOL-VILLARD GregorianDay (tmp); /* Determine the day of week */ 1400c698dcaSJean-Christophe PLAGNIOL-VILLARD 1410c698dcaSJean-Christophe PLAGNIOL-VILLARD debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 1420c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 1430c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 144*b73a19e1SYuri Tikhonov 145*b73a19e1SYuri Tikhonov return 0; 1460c698dcaSJean-Christophe PLAGNIOL-VILLARD } 1470c698dcaSJean-Christophe PLAGNIOL-VILLARD 1480c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 1490c698dcaSJean-Christophe PLAGNIOL-VILLARD 1500c698dcaSJean-Christophe PLAGNIOL-VILLARD /* set clock time in DS1306 RTC and in MPC8xx RTC */ 1510c698dcaSJean-Christophe PLAGNIOL-VILLARD void rtc_set (struct rtc_time *tmp) 1520c698dcaSJean-Christophe PLAGNIOL-VILLARD { 1530c698dcaSJean-Christophe PLAGNIOL-VILLARD volatile immap_t *immap = (immap_t *) CFG_IMMR; 1540c698dcaSJean-Christophe PLAGNIOL-VILLARD 1550c698dcaSJean-Christophe PLAGNIOL-VILLARD init_spi (); /* set port B for software SPI */ 1560c698dcaSJean-Christophe PLAGNIOL-VILLARD 1570c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Now we can enable the DS1306 RTC */ 1580c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */ 1590c698dcaSJean-Christophe PLAGNIOL-VILLARD udelay (10); 1600c698dcaSJean-Christophe PLAGNIOL-VILLARD 1610c698dcaSJean-Christophe PLAGNIOL-VILLARD /* First disable write protect in the clock chip control register */ 1620c698dcaSJean-Christophe PLAGNIOL-VILLARD soft_spi_send (0x8F); /* send address of the control register */ 1630c698dcaSJean-Christophe PLAGNIOL-VILLARD soft_spi_send (0x00); /* send control register contents */ 1640c698dcaSJean-Christophe PLAGNIOL-VILLARD 1650c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Now disable the DS1306 to terminate the write */ 1660c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; 1670c698dcaSJean-Christophe PLAGNIOL-VILLARD udelay (10); 1680c698dcaSJean-Christophe PLAGNIOL-VILLARD 1690c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Now enable the DS1306 to initiate a new write */ 1700c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_cpm.cp_pbdat |= PB_SPI_CE; 1710c698dcaSJean-Christophe PLAGNIOL-VILLARD udelay (10); 1720c698dcaSJean-Christophe PLAGNIOL-VILLARD 1730c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Next, send the address of the clock time write registers */ 1740c698dcaSJean-Christophe PLAGNIOL-VILLARD soft_spi_send (0x80); /* send address of the first time register */ 1750c698dcaSJean-Christophe PLAGNIOL-VILLARD 1760c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Use Burst Mode to send all of the time data to the clock */ 1770c698dcaSJean-Christophe PLAGNIOL-VILLARD bin2bcd (tmp->tm_sec); 1780c698dcaSJean-Christophe PLAGNIOL-VILLARD soft_spi_send (bin2bcd (tmp->tm_sec)); /* Send Seconds */ 1790c698dcaSJean-Christophe PLAGNIOL-VILLARD soft_spi_send (bin2bcd (tmp->tm_min)); /* Send Minutes */ 1800c698dcaSJean-Christophe PLAGNIOL-VILLARD soft_spi_send (bin2bcd (tmp->tm_hour)); /* Send Hour */ 1810c698dcaSJean-Christophe PLAGNIOL-VILLARD soft_spi_send (bin2bcd (tmp->tm_wday)); /* Send Day of the Week */ 1820c698dcaSJean-Christophe PLAGNIOL-VILLARD soft_spi_send (bin2bcd (tmp->tm_mday)); /* Send Day of Month */ 1830c698dcaSJean-Christophe PLAGNIOL-VILLARD soft_spi_send (bin2bcd (tmp->tm_mon)); /* Send Month */ 1840c698dcaSJean-Christophe PLAGNIOL-VILLARD soft_spi_send (bin2bcd (tmp->tm_year - 2000)); /* Send Year */ 1850c698dcaSJean-Christophe PLAGNIOL-VILLARD 1860c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Now we can disable the Clock chip to terminate the burst write */ 1870c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */ 1880c698dcaSJean-Christophe PLAGNIOL-VILLARD udelay (10); 1890c698dcaSJean-Christophe PLAGNIOL-VILLARD 1900c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Now we can enable the Clock chip to initiate a new write */ 1910c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */ 1920c698dcaSJean-Christophe PLAGNIOL-VILLARD udelay (10); 1930c698dcaSJean-Christophe PLAGNIOL-VILLARD 1940c698dcaSJean-Christophe PLAGNIOL-VILLARD /* First we Enable write protect in the clock chip control register */ 1950c698dcaSJean-Christophe PLAGNIOL-VILLARD soft_spi_send (0x8F); /* send address of the control register */ 1960c698dcaSJean-Christophe PLAGNIOL-VILLARD soft_spi_send (0x40); /* send out Control Register contents */ 1970c698dcaSJean-Christophe PLAGNIOL-VILLARD 1980c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Now disable the DS1306 */ 1990c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */ 2000c698dcaSJean-Christophe PLAGNIOL-VILLARD udelay (10); 2010c698dcaSJean-Christophe PLAGNIOL-VILLARD 2020c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Set standard MPC8xx clock to the same time so Linux will 2030c698dcaSJean-Christophe PLAGNIOL-VILLARD * see the time even if it doesn't have a DS1306 clock driver. 2040c698dcaSJean-Christophe PLAGNIOL-VILLARD * This helps with experimenting with standard kernels. 2050c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 2060c698dcaSJean-Christophe PLAGNIOL-VILLARD { 2070c698dcaSJean-Christophe PLAGNIOL-VILLARD ulong tim; 2080c698dcaSJean-Christophe PLAGNIOL-VILLARD 2090c698dcaSJean-Christophe PLAGNIOL-VILLARD tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday, 2100c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 2110c698dcaSJean-Christophe PLAGNIOL-VILLARD 2120c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_sitk.sitk_rtck = KAPWR_KEY; 2130c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_sit.sit_rtc = tim; 2140c698dcaSJean-Christophe PLAGNIOL-VILLARD } 2150c698dcaSJean-Christophe PLAGNIOL-VILLARD 2160c698dcaSJean-Christophe PLAGNIOL-VILLARD debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 2170c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 2180c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 2190c698dcaSJean-Christophe PLAGNIOL-VILLARD } 2200c698dcaSJean-Christophe PLAGNIOL-VILLARD 2210c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 2220c698dcaSJean-Christophe PLAGNIOL-VILLARD 2230c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Initialize Port B for software SPI */ 2240c698dcaSJean-Christophe PLAGNIOL-VILLARD static void init_spi (void) 2250c698dcaSJean-Christophe PLAGNIOL-VILLARD { 2260c698dcaSJean-Christophe PLAGNIOL-VILLARD volatile immap_t *immap = (immap_t *) CFG_IMMR; 2270c698dcaSJean-Christophe PLAGNIOL-VILLARD 2280c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Force output pins to begin at logic 0 */ 2290c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE | PB_SPIMOSI | PB_SPISCK); 2300c698dcaSJean-Christophe PLAGNIOL-VILLARD 2310c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Set these 3 signals as outputs */ 2320c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_cpm.cp_pbdir |= (PB_SPIMOSI | PB_SPI_CE | PB_SPISCK); 2330c698dcaSJean-Christophe PLAGNIOL-VILLARD 2340c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_cpm.cp_pbdir &= ~PB_SPIMISO; /* Make MISO pin an input */ 2350c698dcaSJean-Christophe PLAGNIOL-VILLARD udelay (10); 2360c698dcaSJean-Christophe PLAGNIOL-VILLARD } 2370c698dcaSJean-Christophe PLAGNIOL-VILLARD 2380c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 2390c698dcaSJean-Christophe PLAGNIOL-VILLARD 2400c698dcaSJean-Christophe PLAGNIOL-VILLARD /* NOTE: soft_spi_send() assumes that the I/O lines are configured already */ 2410c698dcaSJean-Christophe PLAGNIOL-VILLARD static void soft_spi_send (unsigned char n) 2420c698dcaSJean-Christophe PLAGNIOL-VILLARD { 2430c698dcaSJean-Christophe PLAGNIOL-VILLARD volatile immap_t *immap = (immap_t *) CFG_IMMR; 2440c698dcaSJean-Christophe PLAGNIOL-VILLARD unsigned char bitpos; /* bit position to receive */ 2450c698dcaSJean-Christophe PLAGNIOL-VILLARD unsigned char i; /* Loop Control */ 2460c698dcaSJean-Christophe PLAGNIOL-VILLARD 2470c698dcaSJean-Christophe PLAGNIOL-VILLARD /* bit position to send, start with most significant bit */ 2480c698dcaSJean-Christophe PLAGNIOL-VILLARD bitpos = 0x80; 2490c698dcaSJean-Christophe PLAGNIOL-VILLARD 2500c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Send 8 bits to software SPI */ 2510c698dcaSJean-Christophe PLAGNIOL-VILLARD for (i = 0; i < 8; i++) { /* Loop for 8 bits */ 2520c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */ 2530c698dcaSJean-Christophe PLAGNIOL-VILLARD 2540c698dcaSJean-Christophe PLAGNIOL-VILLARD if (n & bitpos) 2550c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_cpm.cp_pbdat |= PB_SPIMOSI; /* Set MOSI to 1 */ 2560c698dcaSJean-Christophe PLAGNIOL-VILLARD else 2570c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI; /* Set MOSI to 0 */ 2580c698dcaSJean-Christophe PLAGNIOL-VILLARD udelay (10); 2590c698dcaSJean-Christophe PLAGNIOL-VILLARD 2600c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */ 2610c698dcaSJean-Christophe PLAGNIOL-VILLARD udelay (10); 2620c698dcaSJean-Christophe PLAGNIOL-VILLARD 2630c698dcaSJean-Christophe PLAGNIOL-VILLARD bitpos >>= 1; /* Shift for next bit position */ 2640c698dcaSJean-Christophe PLAGNIOL-VILLARD } 2650c698dcaSJean-Christophe PLAGNIOL-VILLARD } 2660c698dcaSJean-Christophe PLAGNIOL-VILLARD 2670c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 2680c698dcaSJean-Christophe PLAGNIOL-VILLARD 2690c698dcaSJean-Christophe PLAGNIOL-VILLARD /* NOTE: soft_spi_read() assumes that the I/O lines are configured already */ 2700c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned char soft_spi_read (void) 2710c698dcaSJean-Christophe PLAGNIOL-VILLARD { 2720c698dcaSJean-Christophe PLAGNIOL-VILLARD volatile immap_t *immap = (immap_t *) CFG_IMMR; 2730c698dcaSJean-Christophe PLAGNIOL-VILLARD 2740c698dcaSJean-Christophe PLAGNIOL-VILLARD unsigned char spi_byte = 0; /* Return value, assume success */ 2750c698dcaSJean-Christophe PLAGNIOL-VILLARD unsigned char bitpos; /* bit position to receive */ 2760c698dcaSJean-Christophe PLAGNIOL-VILLARD unsigned char i; /* Loop Control */ 2770c698dcaSJean-Christophe PLAGNIOL-VILLARD 2780c698dcaSJean-Christophe PLAGNIOL-VILLARD /* bit position to receive, start with most significant bit */ 2790c698dcaSJean-Christophe PLAGNIOL-VILLARD bitpos = 0x80; 2800c698dcaSJean-Christophe PLAGNIOL-VILLARD 2810c698dcaSJean-Christophe PLAGNIOL-VILLARD /* Read 8 bits here */ 2820c698dcaSJean-Christophe PLAGNIOL-VILLARD for (i = 0; i < 8; i++) { /* Do 8 bits in loop */ 2830c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */ 2840c698dcaSJean-Christophe PLAGNIOL-VILLARD udelay (10); 2850c698dcaSJean-Christophe PLAGNIOL-VILLARD if (immap->im_cpm.cp_pbdat & PB_SPIMISO) /* Get a bit of data */ 2860c698dcaSJean-Christophe PLAGNIOL-VILLARD spi_byte |= bitpos; /* Set data accordingly */ 2870c698dcaSJean-Christophe PLAGNIOL-VILLARD immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */ 2880c698dcaSJean-Christophe PLAGNIOL-VILLARD udelay (10); 2890c698dcaSJean-Christophe PLAGNIOL-VILLARD bitpos >>= 1; /* Shift for next bit position */ 2900c698dcaSJean-Christophe PLAGNIOL-VILLARD } 2910c698dcaSJean-Christophe PLAGNIOL-VILLARD 2920c698dcaSJean-Christophe PLAGNIOL-VILLARD return spi_byte; /* Return the byte read */ 2930c698dcaSJean-Christophe PLAGNIOL-VILLARD } 2940c698dcaSJean-Christophe PLAGNIOL-VILLARD 2950c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 2960c698dcaSJean-Christophe PLAGNIOL-VILLARD 2970c698dcaSJean-Christophe PLAGNIOL-VILLARD void rtc_reset (void) 2980c698dcaSJean-Christophe PLAGNIOL-VILLARD { 2990c698dcaSJean-Christophe PLAGNIOL-VILLARD return; /* nothing to do */ 3000c698dcaSJean-Christophe PLAGNIOL-VILLARD } 3010c698dcaSJean-Christophe PLAGNIOL-VILLARD 3020c698dcaSJean-Christophe PLAGNIOL-VILLARD #else /* not CONFIG_SXNI855T */ 3030c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ************************************************************************* */ 3040c698dcaSJean-Christophe PLAGNIOL-VILLARD 3050c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned char rtc_read (unsigned char reg); 3060c698dcaSJean-Christophe PLAGNIOL-VILLARD static void rtc_write (unsigned char reg, unsigned char val); 3070c698dcaSJean-Christophe PLAGNIOL-VILLARD 3080c698dcaSJean-Christophe PLAGNIOL-VILLARD /* read clock time from DS1306 and return it in *tmp */ 309*b73a19e1SYuri Tikhonov int rtc_get (struct rtc_time *tmp) 3100c698dcaSJean-Christophe PLAGNIOL-VILLARD { 3110c698dcaSJean-Christophe PLAGNIOL-VILLARD unsigned char sec, min, hour, mday, wday, mon, year; 3120c698dcaSJean-Christophe PLAGNIOL-VILLARD 3130c698dcaSJean-Christophe PLAGNIOL-VILLARD sec = rtc_read (RTC_SECONDS); 3140c698dcaSJean-Christophe PLAGNIOL-VILLARD min = rtc_read (RTC_MINUTES); 3150c698dcaSJean-Christophe PLAGNIOL-VILLARD hour = rtc_read (RTC_HOURS); 3160c698dcaSJean-Christophe PLAGNIOL-VILLARD mday = rtc_read (RTC_DATE_OF_MONTH); 3170c698dcaSJean-Christophe PLAGNIOL-VILLARD wday = rtc_read (RTC_DAY_OF_WEEK); 3180c698dcaSJean-Christophe PLAGNIOL-VILLARD mon = rtc_read (RTC_MONTH); 3190c698dcaSJean-Christophe PLAGNIOL-VILLARD year = rtc_read (RTC_YEAR); 3200c698dcaSJean-Christophe PLAGNIOL-VILLARD 3210c698dcaSJean-Christophe PLAGNIOL-VILLARD debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x " 3220c698dcaSJean-Christophe PLAGNIOL-VILLARD "hr: %02x min: %02x sec: %02x\n", 3230c698dcaSJean-Christophe PLAGNIOL-VILLARD year, mon, mday, wday, hour, min, sec); 3240c698dcaSJean-Christophe PLAGNIOL-VILLARD debug ("Alarms[0]: wday: %02x hour: %02x min: %02x sec: %02x\n", 3250c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_read (RTC_DAY_OF_WEEK_ALARM0), 3260c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_read (RTC_HOURS_ALARM0), 3270c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_read (RTC_MINUTES_ALARM0), rtc_read (RTC_SECONDS_ALARM0)); 3280c698dcaSJean-Christophe PLAGNIOL-VILLARD debug ("Alarms[1]: wday: %02x hour: %02x min: %02x sec: %02x\n", 3290c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_read (RTC_DAY_OF_WEEK_ALARM1), 3300c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_read (RTC_HOURS_ALARM1), 3310c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_read (RTC_MINUTES_ALARM1), rtc_read (RTC_SECONDS_ALARM1)); 3320c698dcaSJean-Christophe PLAGNIOL-VILLARD 3330c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_sec = bcd2bin (sec & 0x7F); /* convert Seconds */ 3340c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_min = bcd2bin (min & 0x7F); /* convert Minutes */ 3350c698dcaSJean-Christophe PLAGNIOL-VILLARD 3360c698dcaSJean-Christophe PLAGNIOL-VILLARD /* convert Hours */ 3370c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_hour = (hour & 0x40) 3380c698dcaSJean-Christophe PLAGNIOL-VILLARD ? ((hour & 0x20) /* 12 hour mode */ 3390c698dcaSJean-Christophe PLAGNIOL-VILLARD ? bcd2bin (hour & 0x1F) + 11 /* PM */ 3400c698dcaSJean-Christophe PLAGNIOL-VILLARD : bcd2bin (hour & 0x1F) - 1 /* AM */ 3410c698dcaSJean-Christophe PLAGNIOL-VILLARD ) 3420c698dcaSJean-Christophe PLAGNIOL-VILLARD : bcd2bin (hour & 0x3F); /* 24 hour mode */ 3430c698dcaSJean-Christophe PLAGNIOL-VILLARD 3440c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_mday = bcd2bin (mday & 0x3F); /* convert Day of the Month */ 3450c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_mon = bcd2bin (mon & 0x1F); /* convert Month */ 3460c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_year = bcd2bin (year) + 2000; /* convert Year */ 3470c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_wday = bcd2bin (wday & 0x07) - 1; /* convert Day of the Week */ 3480c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_yday = 0; 3490c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_isdst = 0; 3500c698dcaSJean-Christophe PLAGNIOL-VILLARD 3510c698dcaSJean-Christophe PLAGNIOL-VILLARD debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 3520c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 3530c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 354*b73a19e1SYuri Tikhonov 355*b73a19e1SYuri Tikhonov return 0; 3560c698dcaSJean-Christophe PLAGNIOL-VILLARD } 3570c698dcaSJean-Christophe PLAGNIOL-VILLARD 3580c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 3590c698dcaSJean-Christophe PLAGNIOL-VILLARD 3600c698dcaSJean-Christophe PLAGNIOL-VILLARD /* set clock time from *tmp in DS1306 RTC */ 3610c698dcaSJean-Christophe PLAGNIOL-VILLARD void rtc_set (struct rtc_time *tmp) 3620c698dcaSJean-Christophe PLAGNIOL-VILLARD { 3630c698dcaSJean-Christophe PLAGNIOL-VILLARD debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 3640c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 3650c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 3660c698dcaSJean-Christophe PLAGNIOL-VILLARD 3670c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec)); 3680c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min)); 3690c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour)); 3700c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1)); 3710c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday)); 3720c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon)); 3730c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000)); 3740c698dcaSJean-Christophe PLAGNIOL-VILLARD } 3750c698dcaSJean-Christophe PLAGNIOL-VILLARD 3760c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 3770c698dcaSJean-Christophe PLAGNIOL-VILLARD 3780c698dcaSJean-Christophe PLAGNIOL-VILLARD /* reset the DS1306 */ 3790c698dcaSJean-Christophe PLAGNIOL-VILLARD void rtc_reset (void) 3800c698dcaSJean-Christophe PLAGNIOL-VILLARD { 3810c698dcaSJean-Christophe PLAGNIOL-VILLARD /* clear the control register */ 3820c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_CONTROL, 0x00); /* 1st step: reset WP */ 3830c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_CONTROL, 0x00); /* 2nd step: reset 1Hz, AIE1, AIE0 */ 3840c698dcaSJean-Christophe PLAGNIOL-VILLARD 3850c698dcaSJean-Christophe PLAGNIOL-VILLARD /* reset all alarms */ 3860c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_SECONDS_ALARM0, 0x00); 3870c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_SECONDS_ALARM1, 0x00); 3880c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_MINUTES_ALARM0, 0x00); 3890c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_MINUTES_ALARM1, 0x00); 3900c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_HOURS_ALARM0, 0x00); 3910c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_HOURS_ALARM1, 0x00); 3920c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00); 3930c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00); 3940c698dcaSJean-Christophe PLAGNIOL-VILLARD } 3950c698dcaSJean-Christophe PLAGNIOL-VILLARD 3960c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 3970c698dcaSJean-Christophe PLAGNIOL-VILLARD 3980c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned char rtc_read (unsigned char reg) 3990c698dcaSJean-Christophe PLAGNIOL-VILLARD { 4000c698dcaSJean-Christophe PLAGNIOL-VILLARD unsigned char dout[2]; /* SPI Output Data Bytes */ 4010c698dcaSJean-Christophe PLAGNIOL-VILLARD unsigned char din[2]; /* SPI Input Data Bytes */ 4020c698dcaSJean-Christophe PLAGNIOL-VILLARD 4030c698dcaSJean-Christophe PLAGNIOL-VILLARD dout[0] = reg; 4040c698dcaSJean-Christophe PLAGNIOL-VILLARD 4050c698dcaSJean-Christophe PLAGNIOL-VILLARD if (spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din) != 0) { 4060c698dcaSJean-Christophe PLAGNIOL-VILLARD return 0; 4070c698dcaSJean-Christophe PLAGNIOL-VILLARD } else { 4080c698dcaSJean-Christophe PLAGNIOL-VILLARD return din[1]; 4090c698dcaSJean-Christophe PLAGNIOL-VILLARD } 4100c698dcaSJean-Christophe PLAGNIOL-VILLARD } 4110c698dcaSJean-Christophe PLAGNIOL-VILLARD 4120c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 4130c698dcaSJean-Christophe PLAGNIOL-VILLARD 4140c698dcaSJean-Christophe PLAGNIOL-VILLARD static void rtc_write (unsigned char reg, unsigned char val) 4150c698dcaSJean-Christophe PLAGNIOL-VILLARD { 4160c698dcaSJean-Christophe PLAGNIOL-VILLARD unsigned char dout[2]; /* SPI Output Data Bytes */ 4170c698dcaSJean-Christophe PLAGNIOL-VILLARD unsigned char din[2]; /* SPI Input Data Bytes */ 4180c698dcaSJean-Christophe PLAGNIOL-VILLARD 4190c698dcaSJean-Christophe PLAGNIOL-VILLARD dout[0] = 0x80 | reg; 4200c698dcaSJean-Christophe PLAGNIOL-VILLARD dout[1] = val; 4210c698dcaSJean-Christophe PLAGNIOL-VILLARD 4220c698dcaSJean-Christophe PLAGNIOL-VILLARD spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din); 4230c698dcaSJean-Christophe PLAGNIOL-VILLARD } 4240c698dcaSJean-Christophe PLAGNIOL-VILLARD 4250c698dcaSJean-Christophe PLAGNIOL-VILLARD #endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */ 4260c698dcaSJean-Christophe PLAGNIOL-VILLARD 4270c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 4280c698dcaSJean-Christophe PLAGNIOL-VILLARD 4290c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned char bcd2bin (unsigned char n) 4300c698dcaSJean-Christophe PLAGNIOL-VILLARD { 4310c698dcaSJean-Christophe PLAGNIOL-VILLARD return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F)); 4320c698dcaSJean-Christophe PLAGNIOL-VILLARD } 4330c698dcaSJean-Christophe PLAGNIOL-VILLARD 4340c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 4350c698dcaSJean-Christophe PLAGNIOL-VILLARD 4360c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned int bin2bcd (unsigned int n) 4370c698dcaSJean-Christophe PLAGNIOL-VILLARD { 4380c698dcaSJean-Christophe PLAGNIOL-VILLARD return (((n / 10) << 4) | (n % 10)); 4390c698dcaSJean-Christophe PLAGNIOL-VILLARD } 4400c698dcaSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 4410c698dcaSJean-Christophe PLAGNIOL-VILLARD 4420c698dcaSJean-Christophe PLAGNIOL-VILLARD #endif 443