183d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
223a06416SPatrice Chotard /*
33bc599c9SPatrice Chotard * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
43bc599c9SPatrice Chotard * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
523a06416SPatrice Chotard */
623a06416SPatrice Chotard
723a06416SPatrice Chotard #include <common.h>
823a06416SPatrice Chotard #include <dm.h>
923a06416SPatrice Chotard #include <errno.h>
1023a06416SPatrice Chotard #include <reset-uclass.h>
11*d090cbabSPatrick Delaunay #include <stm32_rcc.h>
1223a06416SPatrice Chotard #include <asm/io.h>
1323a06416SPatrice Chotard
14a7519b33SPatrick Delaunay /* reset clear offset for STM32MP RCC */
15a7519b33SPatrick Delaunay #define RCC_CL 0x4
16a7519b33SPatrick Delaunay
1723a06416SPatrice Chotard struct stm32_reset_priv {
1823a06416SPatrice Chotard fdt_addr_t base;
1923a06416SPatrice Chotard };
2023a06416SPatrice Chotard
stm32_reset_request(struct reset_ctl * reset_ctl)2123a06416SPatrice Chotard static int stm32_reset_request(struct reset_ctl *reset_ctl)
2223a06416SPatrice Chotard {
2323a06416SPatrice Chotard return 0;
2423a06416SPatrice Chotard }
2523a06416SPatrice Chotard
stm32_reset_free(struct reset_ctl * reset_ctl)2623a06416SPatrice Chotard static int stm32_reset_free(struct reset_ctl *reset_ctl)
2723a06416SPatrice Chotard {
2823a06416SPatrice Chotard return 0;
2923a06416SPatrice Chotard }
3023a06416SPatrice Chotard
stm32_reset_assert(struct reset_ctl * reset_ctl)3123a06416SPatrice Chotard static int stm32_reset_assert(struct reset_ctl *reset_ctl)
3223a06416SPatrice Chotard {
3323a06416SPatrice Chotard struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev);
3423a06416SPatrice Chotard int bank = (reset_ctl->id / BITS_PER_LONG) * 4;
3523a06416SPatrice Chotard int offset = reset_ctl->id % BITS_PER_LONG;
3623a06416SPatrice Chotard debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
3723a06416SPatrice Chotard reset_ctl->id, bank, offset);
3823a06416SPatrice Chotard
39*d090cbabSPatrick Delaunay if (dev_get_driver_data(reset_ctl->dev) == STM32MP1)
40a7519b33SPatrick Delaunay /* reset assert is done in rcc set register */
41a7519b33SPatrick Delaunay writel(BIT(offset), priv->base + bank);
42a7519b33SPatrick Delaunay else
4323a06416SPatrice Chotard setbits_le32(priv->base + bank, BIT(offset));
4423a06416SPatrice Chotard
4523a06416SPatrice Chotard return 0;
4623a06416SPatrice Chotard }
4723a06416SPatrice Chotard
stm32_reset_deassert(struct reset_ctl * reset_ctl)4823a06416SPatrice Chotard static int stm32_reset_deassert(struct reset_ctl *reset_ctl)
4923a06416SPatrice Chotard {
5023a06416SPatrice Chotard struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev);
5123a06416SPatrice Chotard int bank = (reset_ctl->id / BITS_PER_LONG) * 4;
5223a06416SPatrice Chotard int offset = reset_ctl->id % BITS_PER_LONG;
5323a06416SPatrice Chotard debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
5423a06416SPatrice Chotard reset_ctl->id, bank, offset);
5523a06416SPatrice Chotard
56*d090cbabSPatrick Delaunay if (dev_get_driver_data(reset_ctl->dev) == STM32MP1)
57a7519b33SPatrick Delaunay /* reset deassert is done in rcc clr register */
58a7519b33SPatrick Delaunay writel(BIT(offset), priv->base + bank + RCC_CL);
59a7519b33SPatrick Delaunay else
6023a06416SPatrice Chotard clrbits_le32(priv->base + bank, BIT(offset));
6123a06416SPatrice Chotard
6223a06416SPatrice Chotard return 0;
6323a06416SPatrice Chotard }
6423a06416SPatrice Chotard
6523a06416SPatrice Chotard static const struct reset_ops stm32_reset_ops = {
6623a06416SPatrice Chotard .request = stm32_reset_request,
6723a06416SPatrice Chotard .free = stm32_reset_free,
6823a06416SPatrice Chotard .rst_assert = stm32_reset_assert,
6923a06416SPatrice Chotard .rst_deassert = stm32_reset_deassert,
7023a06416SPatrice Chotard };
7123a06416SPatrice Chotard
stm32_reset_probe(struct udevice * dev)7223a06416SPatrice Chotard static int stm32_reset_probe(struct udevice *dev)
7323a06416SPatrice Chotard {
7423a06416SPatrice Chotard struct stm32_reset_priv *priv = dev_get_priv(dev);
7523a06416SPatrice Chotard
76a7519b33SPatrick Delaunay priv->base = dev_read_addr(dev);
77a7519b33SPatrick Delaunay if (priv->base == FDT_ADDR_T_NONE) {
78a7519b33SPatrick Delaunay /* for MFD, get address of parent */
79a7519b33SPatrick Delaunay priv->base = dev_read_addr(dev->parent);
8023a06416SPatrice Chotard if (priv->base == FDT_ADDR_T_NONE)
8123a06416SPatrice Chotard return -EINVAL;
82a7519b33SPatrick Delaunay }
8323a06416SPatrice Chotard
8423a06416SPatrice Chotard return 0;
8523a06416SPatrice Chotard }
8623a06416SPatrice Chotard
8723a06416SPatrice Chotard U_BOOT_DRIVER(stm32_rcc_reset) = {
8823a06416SPatrice Chotard .name = "stm32_rcc_reset",
8923a06416SPatrice Chotard .id = UCLASS_RESET,
9023a06416SPatrice Chotard .probe = stm32_reset_probe,
9123a06416SPatrice Chotard .priv_auto_alloc_size = sizeof(struct stm32_reset_priv),
9223a06416SPatrice Chotard .ops = &stm32_reset_ops,
9323a06416SPatrice Chotard };
94