xref: /openbmc/u-boot/drivers/power/pmic/pmic_tps65217.c (revision 7ff485c68b7e5573e5a4a877066e98398283a24f)
183d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
28b65b12aSGreg Guyotte /*
38b65b12aSGreg Guyotte  * (C) Copyright 2011-2013
48b65b12aSGreg Guyotte  * Texas Instruments, <www.ti.com>
58b65b12aSGreg Guyotte  */
68b65b12aSGreg Guyotte 
78b65b12aSGreg Guyotte #include <common.h>
88b65b12aSGreg Guyotte #include <i2c.h>
98b65b12aSGreg Guyotte #include <power/tps65217.h>
108b65b12aSGreg Guyotte 
11*fb1b7712SJean-Jacques Hiblot struct udevice *tps65217_dev __attribute__((section(".data"))) = NULL;
12*fb1b7712SJean-Jacques Hiblot 
138b65b12aSGreg Guyotte /**
148b65b12aSGreg Guyotte  * tps65217_reg_read() - Generic function that can read a TPS65217 register
158b65b12aSGreg Guyotte  * @src_reg:		 Source register address
168b65b12aSGreg Guyotte  * @src_val:		 Address of destination variable
178b65b12aSGreg Guyotte  * @return:		 0 for success, not 0 on failure.
188b65b12aSGreg Guyotte  */
tps65217_reg_read(uchar src_reg,uchar * src_val)198b65b12aSGreg Guyotte int tps65217_reg_read(uchar src_reg, uchar *src_val)
208b65b12aSGreg Guyotte {
21*fb1b7712SJean-Jacques Hiblot #ifndef CONFIG_DM_I2C
228b65b12aSGreg Guyotte 	return i2c_read(TPS65217_CHIP_PM, src_reg, 1, src_val, 1);
23*fb1b7712SJean-Jacques Hiblot #else
24*fb1b7712SJean-Jacques Hiblot 	return dm_i2c_read(tps65217_dev, src_reg,  src_val, 1);
25*fb1b7712SJean-Jacques Hiblot #endif
268b65b12aSGreg Guyotte }
278b65b12aSGreg Guyotte 
288b65b12aSGreg Guyotte /**
298b65b12aSGreg Guyotte  *  tps65217_reg_write() - Generic function that can write a TPS65217 PMIC
308b65b12aSGreg Guyotte  *			   register or bit field regardless of protection
318b65b12aSGreg Guyotte  *			   level.
328b65b12aSGreg Guyotte  *
338b65b12aSGreg Guyotte  *  @prot_level:	   Register password protection.  Use
348b65b12aSGreg Guyotte  *			   TPS65217_PROT_LEVEL_NONE,
358b65b12aSGreg Guyotte  *			   TPS65217_PROT_LEVEL_1 or TPS65217_PROT_LEVEL_2
368b65b12aSGreg Guyotte  *  @dest_reg:		   Register address to write.
378b65b12aSGreg Guyotte  *  @dest_val:		   Value to write.
388b65b12aSGreg Guyotte  *  @mask:		   Bit mask (8 bits) to be applied.  Function will only
398b65b12aSGreg Guyotte  *			   change bits that are set in the bit mask.
408b65b12aSGreg Guyotte  *
418b65b12aSGreg Guyotte  *  @return:		   0 for success, not 0 on failure, as per the i2c API
428b65b12aSGreg Guyotte  */
tps65217_reg_write(uchar prot_level,uchar dest_reg,uchar dest_val,uchar mask)438b65b12aSGreg Guyotte int tps65217_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val,
448b65b12aSGreg Guyotte 		       uchar mask)
458b65b12aSGreg Guyotte {
468b65b12aSGreg Guyotte 	uchar read_val;
478b65b12aSGreg Guyotte 	uchar xor_reg;
488b65b12aSGreg Guyotte 	int ret;
498b65b12aSGreg Guyotte 
508b65b12aSGreg Guyotte 	/*
518b65b12aSGreg Guyotte 	 * If we are affecting only a bit field, read dest_reg and apply the
528b65b12aSGreg Guyotte 	 * mask
538b65b12aSGreg Guyotte 	 */
548b65b12aSGreg Guyotte 	if (mask != TPS65217_MASK_ALL_BITS) {
55*fb1b7712SJean-Jacques Hiblot #ifndef CONFIG_DM_I2C
568b65b12aSGreg Guyotte 		ret = i2c_read(TPS65217_CHIP_PM, dest_reg, 1, &read_val, 1);
57*fb1b7712SJean-Jacques Hiblot #else
58*fb1b7712SJean-Jacques Hiblot 		ret = dm_i2c_read(tps65217_dev, dest_reg, &read_val, 1);
59*fb1b7712SJean-Jacques Hiblot #endif
608b65b12aSGreg Guyotte 		if (ret)
618b65b12aSGreg Guyotte 			return ret;
62*fb1b7712SJean-Jacques Hiblot 
638b65b12aSGreg Guyotte 		read_val &= (~mask);
648b65b12aSGreg Guyotte 		read_val |= (dest_val & mask);
658b65b12aSGreg Guyotte 		dest_val = read_val;
668b65b12aSGreg Guyotte 	}
678b65b12aSGreg Guyotte 
688b65b12aSGreg Guyotte 	if (prot_level > 0) {
698b65b12aSGreg Guyotte 		xor_reg = dest_reg ^ TPS65217_PASSWORD_UNLOCK;
70*fb1b7712SJean-Jacques Hiblot #ifndef CONFIG_DM_I2C
718b65b12aSGreg Guyotte 		ret = i2c_write(TPS65217_CHIP_PM, TPS65217_PASSWORD, 1,
728b65b12aSGreg Guyotte 				&xor_reg, 1);
73*fb1b7712SJean-Jacques Hiblot #else
74*fb1b7712SJean-Jacques Hiblot 		ret = dm_i2c_write(tps65217_dev, TPS65217_PASSWORD,
75*fb1b7712SJean-Jacques Hiblot 				   &xor_reg, 1);
76*fb1b7712SJean-Jacques Hiblot #endif
778b65b12aSGreg Guyotte 		if (ret)
788b65b12aSGreg Guyotte 			return ret;
798b65b12aSGreg Guyotte 	}
80*fb1b7712SJean-Jacques Hiblot #ifndef CONFIG_DM_I2C
818b65b12aSGreg Guyotte 	ret = i2c_write(TPS65217_CHIP_PM, dest_reg, 1, &dest_val, 1);
82*fb1b7712SJean-Jacques Hiblot #else
83*fb1b7712SJean-Jacques Hiblot 	ret = dm_i2c_write(tps65217_dev, dest_reg, &dest_val, 1);
84*fb1b7712SJean-Jacques Hiblot #endif
858b65b12aSGreg Guyotte 	if (ret)
868b65b12aSGreg Guyotte 		return ret;
878b65b12aSGreg Guyotte 
888b65b12aSGreg Guyotte 	if (prot_level == TPS65217_PROT_LEVEL_2) {
89*fb1b7712SJean-Jacques Hiblot #ifndef CONFIG_DM_I2C
908b65b12aSGreg Guyotte 		ret = i2c_write(TPS65217_CHIP_PM, TPS65217_PASSWORD, 1,
918b65b12aSGreg Guyotte 				&xor_reg, 1);
92*fb1b7712SJean-Jacques Hiblot #else
93*fb1b7712SJean-Jacques Hiblot 		ret = dm_i2c_write(tps65217_dev, TPS65217_PASSWORD,
94*fb1b7712SJean-Jacques Hiblot 				   &xor_reg, 1);
95*fb1b7712SJean-Jacques Hiblot #endif
968b65b12aSGreg Guyotte 		if (ret)
978b65b12aSGreg Guyotte 			return ret;
988b65b12aSGreg Guyotte 
99*fb1b7712SJean-Jacques Hiblot #ifndef CONFIG_DM_I2C
1008b65b12aSGreg Guyotte 		ret = i2c_write(TPS65217_CHIP_PM, dest_reg, 1, &dest_val, 1);
101*fb1b7712SJean-Jacques Hiblot #else
102*fb1b7712SJean-Jacques Hiblot 		ret = dm_i2c_write(tps65217_dev, dest_reg, &dest_val, 1);
103*fb1b7712SJean-Jacques Hiblot #endif
1048b65b12aSGreg Guyotte 		if (ret)
1058b65b12aSGreg Guyotte 			return ret;
1068b65b12aSGreg Guyotte 	}
1078b65b12aSGreg Guyotte 
1088b65b12aSGreg Guyotte 	return 0;
1098b65b12aSGreg Guyotte }
1108b65b12aSGreg Guyotte 
1118b65b12aSGreg Guyotte /**
1128b65b12aSGreg Guyotte  * tps65217_voltage_update() - Function to change a voltage level, as this
1138b65b12aSGreg Guyotte  *			       is a multi-step process.
1148b65b12aSGreg Guyotte  * @dc_cntrl_reg:	       DC voltage control register to change.
1158b65b12aSGreg Guyotte  * @volt_sel:		       New value for the voltage register
1168b65b12aSGreg Guyotte  * @return:		       0 for success, not 0 on failure.
1178b65b12aSGreg Guyotte  */
tps65217_voltage_update(uchar dc_cntrl_reg,uchar volt_sel)1188b65b12aSGreg Guyotte int tps65217_voltage_update(uchar dc_cntrl_reg, uchar volt_sel)
1198b65b12aSGreg Guyotte {
1208b65b12aSGreg Guyotte 	if ((dc_cntrl_reg != TPS65217_DEFDCDC1) &&
1218b65b12aSGreg Guyotte 	    (dc_cntrl_reg != TPS65217_DEFDCDC2) &&
1228b65b12aSGreg Guyotte 	    (dc_cntrl_reg != TPS65217_DEFDCDC3))
1238b65b12aSGreg Guyotte 		return 1;
1248b65b12aSGreg Guyotte 
1258b65b12aSGreg Guyotte 	/* set voltage level */
1268b65b12aSGreg Guyotte 	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, dc_cntrl_reg, volt_sel,
1278b65b12aSGreg Guyotte 			       TPS65217_MASK_ALL_BITS))
1288b65b12aSGreg Guyotte 		return 1;
1298b65b12aSGreg Guyotte 
1308b65b12aSGreg Guyotte 	/* set GO bit to initiate voltage transition */
1318b65b12aSGreg Guyotte 	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, TPS65217_DEFSLEW,
1328b65b12aSGreg Guyotte 			       TPS65217_DCDC_GO, TPS65217_DCDC_GO))
1338b65b12aSGreg Guyotte 		return 1;
1348b65b12aSGreg Guyotte 
1358b65b12aSGreg Guyotte 	return 0;
1368b65b12aSGreg Guyotte }
137*fb1b7712SJean-Jacques Hiblot 
power_tps65217_init(unsigned char bus)138*fb1b7712SJean-Jacques Hiblot int power_tps65217_init(unsigned char bus)
139*fb1b7712SJean-Jacques Hiblot {
140*fb1b7712SJean-Jacques Hiblot #ifdef CONFIG_DM_I2C
141*fb1b7712SJean-Jacques Hiblot 	struct udevice *dev = NULL;
142*fb1b7712SJean-Jacques Hiblot 	int rc;
143*fb1b7712SJean-Jacques Hiblot 
144*fb1b7712SJean-Jacques Hiblot 	rc = i2c_get_chip_for_busnum(bus, TPS65217_CHIP_PM, 1, &dev);
145*fb1b7712SJean-Jacques Hiblot 	if (rc)
146*fb1b7712SJean-Jacques Hiblot 		return rc;
147*fb1b7712SJean-Jacques Hiblot 	tps65217_dev = dev;
148*fb1b7712SJean-Jacques Hiblot #endif
149*fb1b7712SJean-Jacques Hiblot 	return 0;
150*fb1b7712SJean-Jacques Hiblot }
151