183d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
22838c07fSSimon Glass /*
32838c07fSSimon Glass * Copyright (C) 2014 NVIDIA Corporation
42838c07fSSimon Glass */
52838c07fSSimon Glass
62838c07fSSimon Glass #define pr_fmt(fmt) "as3722: " fmt
72838c07fSSimon Glass
82838c07fSSimon Glass #include <common.h>
92838c07fSSimon Glass #include <dm.h>
102838c07fSSimon Glass #include <errno.h>
112838c07fSSimon Glass #include <fdtdec.h>
122838c07fSSimon Glass #include <i2c.h>
13e3f44f5cSSimon Glass #include <dm/lists.h>
142838c07fSSimon Glass #include <power/as3722.h>
15e3f44f5cSSimon Glass #include <power/pmic.h>
162838c07fSSimon Glass
17e3f44f5cSSimon Glass #define AS3722_NUM_OF_REGS 0x92
182838c07fSSimon Glass
as3722_read(struct udevice * dev,uint reg,uint8_t * buff,int len)19e3f44f5cSSimon Glass static int as3722_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
202838c07fSSimon Glass {
21e3f44f5cSSimon Glass int ret;
222838c07fSSimon Glass
23e3f44f5cSSimon Glass ret = dm_i2c_read(dev, reg, buff, len);
24e3f44f5cSSimon Glass if (ret < 0)
25e3f44f5cSSimon Glass return ret;
262838c07fSSimon Glass
272838c07fSSimon Glass return 0;
282838c07fSSimon Glass }
292838c07fSSimon Glass
as3722_write(struct udevice * dev,uint reg,const uint8_t * buff,int len)30e3f44f5cSSimon Glass static int as3722_write(struct udevice *dev, uint reg, const uint8_t *buff,
31e3f44f5cSSimon Glass int len)
322838c07fSSimon Glass {
33e3f44f5cSSimon Glass int ret;
342838c07fSSimon Glass
35e3f44f5cSSimon Glass ret = dm_i2c_write(dev, reg, buff, len);
36e3f44f5cSSimon Glass if (ret < 0)
37e3f44f5cSSimon Glass return ret;
382838c07fSSimon Glass
392838c07fSSimon Glass return 0;
402838c07fSSimon Glass }
412838c07fSSimon Glass
as3722_read_id(struct udevice * dev,uint * idp,uint * revisionp)42e3f44f5cSSimon Glass static int as3722_read_id(struct udevice *dev, uint *idp, uint *revisionp)
432838c07fSSimon Glass {
44e3f44f5cSSimon Glass int ret;
452838c07fSSimon Glass
46e3f44f5cSSimon Glass ret = pmic_reg_read(dev, AS3722_ASIC_ID1);
47e3f44f5cSSimon Glass if (ret < 0) {
48*c83c436dSSimon Glass pr_err("failed to read ID1 register: %d\n", ret);
49e3f44f5cSSimon Glass return ret;
502838c07fSSimon Glass }
51e3f44f5cSSimon Glass *idp = ret;
522838c07fSSimon Glass
53e3f44f5cSSimon Glass ret = pmic_reg_read(dev, AS3722_ASIC_ID2);
54e3f44f5cSSimon Glass if (ret < 0) {
55*c83c436dSSimon Glass pr_err("failed to read ID2 register: %d\n", ret);
56e3f44f5cSSimon Glass return ret;
572838c07fSSimon Glass }
58e3f44f5cSSimon Glass *revisionp = ret;
592838c07fSSimon Glass
602838c07fSSimon Glass return 0;
612838c07fSSimon Glass }
622838c07fSSimon Glass
63e3f44f5cSSimon Glass /* TODO(treding@nvidia.com): Add proper regulator support to avoid this */
as3722_sd_set_voltage(struct udevice * dev,unsigned int sd,u8 value)64e3f44f5cSSimon Glass int as3722_sd_set_voltage(struct udevice *dev, unsigned int sd, u8 value)
652838c07fSSimon Glass {
66e3f44f5cSSimon Glass int ret;
672838c07fSSimon Glass
682838c07fSSimon Glass if (sd > 6)
692838c07fSSimon Glass return -EINVAL;
702838c07fSSimon Glass
71e3f44f5cSSimon Glass ret = pmic_reg_write(dev, AS3722_SD_VOLTAGE(sd), value);
72e3f44f5cSSimon Glass if (ret < 0) {
73*c83c436dSSimon Glass pr_err("failed to write SD%u voltage register: %d\n", sd, ret);
74e3f44f5cSSimon Glass return ret;
752838c07fSSimon Glass }
762838c07fSSimon Glass
772838c07fSSimon Glass return 0;
782838c07fSSimon Glass }
792838c07fSSimon Glass
as3722_ldo_set_voltage(struct udevice * dev,unsigned int ldo,u8 value)80e3f44f5cSSimon Glass int as3722_ldo_set_voltage(struct udevice *dev, unsigned int ldo, u8 value)
812838c07fSSimon Glass {
82e3f44f5cSSimon Glass int ret;
832838c07fSSimon Glass
842838c07fSSimon Glass if (ldo > 11)
852838c07fSSimon Glass return -EINVAL;
862838c07fSSimon Glass
87e3f44f5cSSimon Glass ret = pmic_reg_write(dev, AS3722_LDO_VOLTAGE(ldo), value);
88e3f44f5cSSimon Glass if (ret < 0) {
89*c83c436dSSimon Glass pr_err("failed to write LDO%u voltage register: %d\n", ldo,
90e3f44f5cSSimon Glass ret);
91e3f44f5cSSimon Glass return ret;
922838c07fSSimon Glass }
932838c07fSSimon Glass
942838c07fSSimon Glass return 0;
952838c07fSSimon Glass }
962838c07fSSimon Glass
as3722_probe(struct udevice * dev)97e3f44f5cSSimon Glass static int as3722_probe(struct udevice *dev)
982838c07fSSimon Glass {
99e3f44f5cSSimon Glass uint id, revision;
100e3f44f5cSSimon Glass int ret;
1012838c07fSSimon Glass
102e3f44f5cSSimon Glass ret = as3722_read_id(dev, &id, &revision);
103e3f44f5cSSimon Glass if (ret < 0) {
104*c83c436dSSimon Glass pr_err("failed to read ID: %d\n", ret);
105e3f44f5cSSimon Glass return ret;
1062838c07fSSimon Glass }
1072838c07fSSimon Glass
1082838c07fSSimon Glass if (id != AS3722_DEVICE_ID) {
109*c83c436dSSimon Glass pr_err("unknown device\n");
1102838c07fSSimon Glass return -ENOENT;
1112838c07fSSimon Glass }
1122838c07fSSimon Glass
113e3f44f5cSSimon Glass debug("AS3722 revision %#x found on I2C bus %s\n", revision, dev->name);
1142838c07fSSimon Glass
1152838c07fSSimon Glass return 0;
1162838c07fSSimon Glass }
117e3f44f5cSSimon Glass
118e3f44f5cSSimon Glass #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
119e3f44f5cSSimon Glass static const struct pmic_child_info pmic_children_info[] = {
120e3f44f5cSSimon Glass { .prefix = "sd", .driver = "as3722_stepdown"},
121e3f44f5cSSimon Glass { .prefix = "ldo", .driver = "as3722_ldo"},
122e3f44f5cSSimon Glass { },
123e3f44f5cSSimon Glass };
124e3f44f5cSSimon Glass
as3722_bind(struct udevice * dev)125e3f44f5cSSimon Glass static int as3722_bind(struct udevice *dev)
126e3f44f5cSSimon Glass {
127e3f44f5cSSimon Glass struct udevice *gpio_dev;
128e3f44f5cSSimon Glass ofnode regulators_node;
129e3f44f5cSSimon Glass int children;
130e3f44f5cSSimon Glass int ret;
131e3f44f5cSSimon Glass
132e3f44f5cSSimon Glass regulators_node = dev_read_subnode(dev, "regulators");
133e3f44f5cSSimon Glass if (!ofnode_valid(regulators_node)) {
134e3f44f5cSSimon Glass debug("%s: %s regulators subnode not found\n", __func__,
135e3f44f5cSSimon Glass dev->name);
136e3f44f5cSSimon Glass return -ENXIO;
137e3f44f5cSSimon Glass }
138e3f44f5cSSimon Glass
139e3f44f5cSSimon Glass children = pmic_bind_children(dev, regulators_node, pmic_children_info);
140e3f44f5cSSimon Glass if (!children)
141e3f44f5cSSimon Glass debug("%s: %s - no child found\n", __func__, dev->name);
142e3f44f5cSSimon Glass ret = device_bind_driver(dev, "gpio_as3722", "gpio_as3722", &gpio_dev);
143e3f44f5cSSimon Glass if (ret) {
144e3f44f5cSSimon Glass debug("%s: Cannot bind GPIOs (ret=%d)\n", __func__, ret);
145e3f44f5cSSimon Glass return ret;
146e3f44f5cSSimon Glass }
147e3f44f5cSSimon Glass
148e3f44f5cSSimon Glass return 0;
149e3f44f5cSSimon Glass }
150e3f44f5cSSimon Glass #endif
151e3f44f5cSSimon Glass
as3722_reg_count(struct udevice * dev)152e3f44f5cSSimon Glass static int as3722_reg_count(struct udevice *dev)
153e3f44f5cSSimon Glass {
154e3f44f5cSSimon Glass return AS3722_NUM_OF_REGS;
155e3f44f5cSSimon Glass }
156e3f44f5cSSimon Glass
157e3f44f5cSSimon Glass static struct dm_pmic_ops as3722_ops = {
158e3f44f5cSSimon Glass .reg_count = as3722_reg_count,
159e3f44f5cSSimon Glass .read = as3722_read,
160e3f44f5cSSimon Glass .write = as3722_write,
161e3f44f5cSSimon Glass };
162e3f44f5cSSimon Glass
163e3f44f5cSSimon Glass static const struct udevice_id as3722_ids[] = {
164e3f44f5cSSimon Glass { .compatible = "ams,as3722" },
165e3f44f5cSSimon Glass { }
166e3f44f5cSSimon Glass };
167e3f44f5cSSimon Glass
168e3f44f5cSSimon Glass U_BOOT_DRIVER(pmic_as3722) = {
169e3f44f5cSSimon Glass .name = "as3722_pmic",
170e3f44f5cSSimon Glass .id = UCLASS_PMIC,
171e3f44f5cSSimon Glass .of_match = as3722_ids,
172e3f44f5cSSimon Glass #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
173e3f44f5cSSimon Glass .bind = as3722_bind,
174e3f44f5cSSimon Glass #endif
175e3f44f5cSSimon Glass .probe = as3722_probe,
176e3f44f5cSSimon Glass .ops = &as3722_ops,
177e3f44f5cSSimon Glass };
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