xref: /openbmc/u-boot/drivers/pci/pci_sandbox.c (revision dee37fc99d945eb96f0f501d17833cbb05798ad3)
183d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2537849aaSSimon Glass /*
3537849aaSSimon Glass  * Copyright (c) 2014 Google, Inc
4537849aaSSimon Glass  * Written by Simon Glass <sjg@chromium.org>
5537849aaSSimon Glass  */
6537849aaSSimon Glass 
7537849aaSSimon Glass #include <common.h>
8537849aaSSimon Glass #include <dm.h>
9537849aaSSimon Glass #include <fdtdec.h>
10537849aaSSimon Glass #include <pci.h>
11537849aaSSimon Glass 
12*4345998aSBin Meng #define FDT_DEV_INFO_CELLS	4
13*4345998aSBin Meng #define FDT_DEV_INFO_SIZE	(FDT_DEV_INFO_CELLS * sizeof(u32))
14*4345998aSBin Meng 
15*4345998aSBin Meng #define SANDBOX_PCI_DEVFN(d, f)	((d << 3) | f)
16*4345998aSBin Meng 
17*4345998aSBin Meng struct sandbox_pci_priv {
18*4345998aSBin Meng 	struct {
19*4345998aSBin Meng 		u16 vendor;
20*4345998aSBin Meng 		u16 device;
21*4345998aSBin Meng 	} vendev[256];
22*4345998aSBin Meng };
23*4345998aSBin Meng 
sandbox_pci_write_config(struct udevice * bus,pci_dev_t devfn,uint offset,ulong value,enum pci_size_t size)24537849aaSSimon Glass static int sandbox_pci_write_config(struct udevice *bus, pci_dev_t devfn,
25537849aaSSimon Glass 				    uint offset, ulong value,
26537849aaSSimon Glass 				    enum pci_size_t size)
27537849aaSSimon Glass {
28537849aaSSimon Glass 	struct dm_pci_emul_ops *ops;
29*4345998aSBin Meng 	struct udevice *container, *emul;
30537849aaSSimon Glass 	int ret;
31537849aaSSimon Glass 
32*4345998aSBin Meng 	ret = sandbox_pci_get_emul(bus, devfn, &container, &emul);
33537849aaSSimon Glass 	if (ret)
34537849aaSSimon Glass 		return ret == -ENODEV ? 0 : ret;
35537849aaSSimon Glass 	ops = pci_get_emul_ops(emul);
36537849aaSSimon Glass 	if (!ops || !ops->write_config)
37537849aaSSimon Glass 		return -ENOSYS;
38537849aaSSimon Glass 
39537849aaSSimon Glass 	return ops->write_config(emul, offset, value, size);
40537849aaSSimon Glass }
41537849aaSSimon Glass 
sandbox_pci_read_config(struct udevice * bus,pci_dev_t devfn,uint offset,ulong * valuep,enum pci_size_t size)42537849aaSSimon Glass static int sandbox_pci_read_config(struct udevice *bus, pci_dev_t devfn,
43537849aaSSimon Glass 				   uint offset, ulong *valuep,
44537849aaSSimon Glass 				   enum pci_size_t size)
45537849aaSSimon Glass {
46537849aaSSimon Glass 	struct dm_pci_emul_ops *ops;
47*4345998aSBin Meng 	struct udevice *container, *emul;
48*4345998aSBin Meng 	struct sandbox_pci_priv *priv = dev_get_priv(bus);
49537849aaSSimon Glass 	int ret;
50537849aaSSimon Glass 
51537849aaSSimon Glass 	/* Prepare the default response */
52537849aaSSimon Glass 	*valuep = pci_get_ff(size);
53*4345998aSBin Meng 	ret = sandbox_pci_get_emul(bus, devfn, &container, &emul);
54*4345998aSBin Meng 	if (ret) {
55*4345998aSBin Meng 		if (!container) {
56*4345998aSBin Meng 			u16 vendor, device;
57*4345998aSBin Meng 
58*4345998aSBin Meng 			devfn = SANDBOX_PCI_DEVFN(PCI_DEV(devfn),
59*4345998aSBin Meng 						  PCI_FUNC(devfn));
60*4345998aSBin Meng 			vendor = priv->vendev[devfn].vendor;
61*4345998aSBin Meng 			device = priv->vendev[devfn].device;
62*4345998aSBin Meng 			if (offset == PCI_VENDOR_ID && vendor)
63*4345998aSBin Meng 				*valuep = vendor;
64*4345998aSBin Meng 			else if (offset == PCI_DEVICE_ID && device)
65*4345998aSBin Meng 				*valuep = device;
66*4345998aSBin Meng 
67*4345998aSBin Meng 			return 0;
68*4345998aSBin Meng 		} else {
69537849aaSSimon Glass 			return ret == -ENODEV ? 0 : ret;
70*4345998aSBin Meng 		}
71*4345998aSBin Meng 	}
72537849aaSSimon Glass 	ops = pci_get_emul_ops(emul);
73537849aaSSimon Glass 	if (!ops || !ops->read_config)
74537849aaSSimon Glass 		return -ENOSYS;
75537849aaSSimon Glass 
76537849aaSSimon Glass 	return ops->read_config(emul, offset, valuep, size);
77537849aaSSimon Glass }
78537849aaSSimon Glass 
sandbox_pci_probe(struct udevice * dev)79*4345998aSBin Meng static int sandbox_pci_probe(struct udevice *dev)
80*4345998aSBin Meng {
81*4345998aSBin Meng 	struct sandbox_pci_priv *priv = dev_get_priv(dev);
82*4345998aSBin Meng 	const fdt32_t *cell;
83*4345998aSBin Meng 	u8 pdev, pfn, devfn;
84*4345998aSBin Meng 	int len;
85*4345998aSBin Meng 
86*4345998aSBin Meng 	cell = ofnode_get_property(dev_ofnode(dev), "sandbox,dev-info", &len);
87*4345998aSBin Meng 	if (!cell)
88*4345998aSBin Meng 		return 0;
89*4345998aSBin Meng 
90*4345998aSBin Meng 	if ((len % FDT_DEV_INFO_SIZE) == 0) {
91*4345998aSBin Meng 		int num = len / FDT_DEV_INFO_SIZE;
92*4345998aSBin Meng 		int i;
93*4345998aSBin Meng 
94*4345998aSBin Meng 		for (i = 0; i < num; i++) {
95*4345998aSBin Meng 			debug("dev info #%d: %02x %02x %04x %04x\n", i,
96*4345998aSBin Meng 			      fdt32_to_cpu(cell[0]), fdt32_to_cpu(cell[1]),
97*4345998aSBin Meng 			      fdt32_to_cpu(cell[2]), fdt32_to_cpu(cell[3]));
98*4345998aSBin Meng 
99*4345998aSBin Meng 			pdev = fdt32_to_cpu(cell[0]);
100*4345998aSBin Meng 			pfn = fdt32_to_cpu(cell[1]);
101*4345998aSBin Meng 			if (pdev > 31 || pfn > 7)
102*4345998aSBin Meng 				continue;
103*4345998aSBin Meng 			devfn = SANDBOX_PCI_DEVFN(pdev, pfn);
104*4345998aSBin Meng 			priv->vendev[devfn].vendor = fdt32_to_cpu(cell[2]);
105*4345998aSBin Meng 			priv->vendev[devfn].device = fdt32_to_cpu(cell[3]);
106*4345998aSBin Meng 
107*4345998aSBin Meng 			cell += FDT_DEV_INFO_CELLS;
108*4345998aSBin Meng 		}
109*4345998aSBin Meng 	}
110*4345998aSBin Meng 
111*4345998aSBin Meng 	return 0;
112*4345998aSBin Meng }
113*4345998aSBin Meng 
114537849aaSSimon Glass static const struct dm_pci_ops sandbox_pci_ops = {
115537849aaSSimon Glass 	.read_config = sandbox_pci_read_config,
116537849aaSSimon Glass 	.write_config = sandbox_pci_write_config,
117537849aaSSimon Glass };
118537849aaSSimon Glass 
119537849aaSSimon Glass static const struct udevice_id sandbox_pci_ids[] = {
120537849aaSSimon Glass 	{ .compatible = "sandbox,pci" },
121537849aaSSimon Glass 	{ }
122537849aaSSimon Glass };
123537849aaSSimon Glass 
124537849aaSSimon Glass U_BOOT_DRIVER(pci_sandbox) = {
125537849aaSSimon Glass 	.name	= "pci_sandbox",
126537849aaSSimon Glass 	.id	= UCLASS_PCI,
127537849aaSSimon Glass 	.of_match = sandbox_pci_ids,
128537849aaSSimon Glass 	.ops	= &sandbox_pci_ops,
129*4345998aSBin Meng 	.probe	= sandbox_pci_probe,
130*4345998aSBin Meng 	.priv_auto_alloc_size = sizeof(struct sandbox_pci_priv),
13191195485SSimon Glass 
13291195485SSimon Glass 	/* Attach an emulator if we can */
13391195485SSimon Glass 	.child_post_bind = dm_scan_fdt_dev,
134537849aaSSimon Glass 	.per_child_platdata_auto_alloc_size =
135537849aaSSimon Glass 			sizeof(struct pci_child_platdata),
136537849aaSSimon Glass };
137