19082eeacSAndy Fleming /* 29082eeacSAndy Fleming * Atheros PHY drivers 39082eeacSAndy Fleming * 41a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 59082eeacSAndy Fleming * 66027384aSXie Xiaobo * Copyright 2011, 2013 Freescale Semiconductor, Inc. 79082eeacSAndy Fleming * author Andy Fleming 89082eeacSAndy Fleming */ 99082eeacSAndy Fleming #include <phy.h> 109082eeacSAndy Fleming 11ce412b79SMugunthan V N #define AR803x_PHY_DEBUG_ADDR_REG 0x1d 12ce412b79SMugunthan V N #define AR803x_PHY_DEBUG_DATA_REG 0x1e 13ce412b79SMugunthan V N 14ce412b79SMugunthan V N #define AR803x_DEBUG_REG_5 0x5 15ce412b79SMugunthan V N #define AR803x_RGMII_TX_CLK_DLY 0x100 16ce412b79SMugunthan V N 17ce412b79SMugunthan V N #define AR803x_DEBUG_REG_0 0x0 18ce412b79SMugunthan V N #define AR803x_RGMII_RX_CLK_DLY 0x8000 19ce412b79SMugunthan V N 209082eeacSAndy Fleming static int ar8021_config(struct phy_device *phydev) 219082eeacSAndy Fleming { 22*1e2d2597SZhao Qiang phy_write(phydev, MDIO_DEVAD_NONE, 0x00, 0x1200); 239082eeacSAndy Fleming phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); 249082eeacSAndy Fleming phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47); 259082eeacSAndy Fleming 26e0d80964SZhao Qiang phydev->supported = phydev->drv->features; 279082eeacSAndy Fleming return 0; 289082eeacSAndy Fleming } 299082eeacSAndy Fleming 30ce412b79SMugunthan V N static int ar8031_config(struct phy_device *phydev) 31ce412b79SMugunthan V N { 32ce412b79SMugunthan V N if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID || 33ce412b79SMugunthan V N phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 34ce412b79SMugunthan V N phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG, 35ce412b79SMugunthan V N AR803x_DEBUG_REG_5); 36ce412b79SMugunthan V N phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG, 37ce412b79SMugunthan V N AR803x_RGMII_TX_CLK_DLY); 38ce412b79SMugunthan V N } 39ce412b79SMugunthan V N 40ce412b79SMugunthan V N if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID || 41ce412b79SMugunthan V N phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 42ce412b79SMugunthan V N phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG, 43ce412b79SMugunthan V N AR803x_DEBUG_REG_0); 44ce412b79SMugunthan V N phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG, 45ce412b79SMugunthan V N AR803x_RGMII_RX_CLK_DLY); 46ce412b79SMugunthan V N } 47ce412b79SMugunthan V N 48ce412b79SMugunthan V N phydev->supported = phydev->drv->features; 49ce412b79SMugunthan V N 50ce412b79SMugunthan V N genphy_config_aneg(phydev); 51ce412b79SMugunthan V N genphy_restart_aneg(phydev); 52ce412b79SMugunthan V N 53ce412b79SMugunthan V N return 0; 54ce412b79SMugunthan V N } 55ce412b79SMugunthan V N 566027384aSXie Xiaobo static int ar8035_config(struct phy_device *phydev) 576027384aSXie Xiaobo { 586027384aSXie Xiaobo int regval; 596027384aSXie Xiaobo 606027384aSXie Xiaobo phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x0007); 616027384aSXie Xiaobo phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); 626027384aSXie Xiaobo phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); 636027384aSXie Xiaobo regval = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); 646027384aSXie Xiaobo phy_write(phydev, MDIO_DEVAD_NONE, 0xe, (regval|0x0018)); 656027384aSXie Xiaobo 666027384aSXie Xiaobo phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); 676027384aSXie Xiaobo regval = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); 686027384aSXie Xiaobo phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, (regval|0x0100)); 696027384aSXie Xiaobo 702ec4d10bSAndrea Merello if ((phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) || 712ec4d10bSAndrea Merello (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) { 722ec4d10bSAndrea Merello /* select debug reg 5 */ 732ec4d10bSAndrea Merello phy_write(phydev, MDIO_DEVAD_NONE, 0x1D, 0x5); 742ec4d10bSAndrea Merello /* enable tx delay */ 752ec4d10bSAndrea Merello phy_write(phydev, MDIO_DEVAD_NONE, 0x1E, 0x0100); 762ec4d10bSAndrea Merello } 772ec4d10bSAndrea Merello 782ec4d10bSAndrea Merello if ((phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) || 792ec4d10bSAndrea Merello (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)) { 802ec4d10bSAndrea Merello /* select debug reg 0 */ 812ec4d10bSAndrea Merello phy_write(phydev, MDIO_DEVAD_NONE, 0x1D, 0x0); 822ec4d10bSAndrea Merello /* enable rx delay */ 832ec4d10bSAndrea Merello phy_write(phydev, MDIO_DEVAD_NONE, 0x1E, 0x8000); 842ec4d10bSAndrea Merello } 852ec4d10bSAndrea Merello 8602aa4c53SXiaobo Xie phydev->supported = phydev->drv->features; 876027384aSXie Xiaobo 88903d384dSAlison Wang genphy_config_aneg(phydev); 89903d384dSAlison Wang genphy_restart_aneg(phydev); 90903d384dSAlison Wang 916027384aSXie Xiaobo return 0; 926027384aSXie Xiaobo } 936027384aSXie Xiaobo 9406370590SKim Phillips static struct phy_driver AR8021_driver = { 959082eeacSAndy Fleming .name = "AR8021", 969082eeacSAndy Fleming .uid = 0x4dd040, 97dc116bd6SHaijun.Zhang .mask = 0x4ffff0, 989082eeacSAndy Fleming .features = PHY_GBIT_FEATURES, 999082eeacSAndy Fleming .config = ar8021_config, 1009082eeacSAndy Fleming .startup = genphy_startup, 1019082eeacSAndy Fleming .shutdown = genphy_shutdown, 1029082eeacSAndy Fleming }; 1039082eeacSAndy Fleming 104433a2c53SHeiko Schocher static struct phy_driver AR8031_driver = { 105626ee1e3SShengzhou Liu .name = "AR8031/AR8033", 106433a2c53SHeiko Schocher .uid = 0x4dd074, 107f66e3dedSFabio Estevam .mask = 0xffffffef, 108433a2c53SHeiko Schocher .features = PHY_GBIT_FEATURES, 109ce412b79SMugunthan V N .config = ar8031_config, 110433a2c53SHeiko Schocher .startup = genphy_startup, 111433a2c53SHeiko Schocher .shutdown = genphy_shutdown, 112433a2c53SHeiko Schocher }; 113433a2c53SHeiko Schocher 114433a2c53SHeiko Schocher static struct phy_driver AR8035_driver = { 1156027384aSXie Xiaobo .name = "AR8035", 1166027384aSXie Xiaobo .uid = 0x4dd072, 117f66e3dedSFabio Estevam .mask = 0xffffffef, 1186027384aSXie Xiaobo .features = PHY_GBIT_FEATURES, 1196027384aSXie Xiaobo .config = ar8035_config, 1206027384aSXie Xiaobo .startup = genphy_startup, 1216027384aSXie Xiaobo .shutdown = genphy_shutdown, 1226027384aSXie Xiaobo }; 1236027384aSXie Xiaobo 1249082eeacSAndy Fleming int phy_atheros_init(void) 1259082eeacSAndy Fleming { 1269082eeacSAndy Fleming phy_register(&AR8021_driver); 127433a2c53SHeiko Schocher phy_register(&AR8031_driver); 1286027384aSXie Xiaobo phy_register(&AR8035_driver); 1299082eeacSAndy Fleming 1309082eeacSAndy Fleming return 0; 1319082eeacSAndy Fleming } 132