1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2629d6b32SShengzhou Liu /*
3629d6b32SShengzhou Liu * Copyright 2012 Freescale Semiconductor, Inc.
4629d6b32SShengzhou Liu *
5629d6b32SShengzhou Liu * Shengzhou Liu <Shengzhou.Liu@freescale.com>
6629d6b32SShengzhou Liu */
7629d6b32SShengzhou Liu
8629d6b32SShengzhou Liu #include <common.h>
9629d6b32SShengzhou Liu #include <phy.h>
10629d6b32SShengzhou Liu #include <fm_eth.h>
11629d6b32SShengzhou Liu #include <asm/immap_85xx.h>
12629d6b32SShengzhou Liu #include <asm/fsl_serdes.h>
13629d6b32SShengzhou Liu
14629d6b32SShengzhou Liu u32 port_to_devdisr[] = {
15629d6b32SShengzhou Liu [FM1_DTSEC1] = FSL_CORENET_DEVDISR2_DTSEC1_1,
16629d6b32SShengzhou Liu [FM1_DTSEC2] = FSL_CORENET_DEVDISR2_DTSEC1_2,
17629d6b32SShengzhou Liu [FM1_DTSEC3] = FSL_CORENET_DEVDISR2_DTSEC1_3,
18629d6b32SShengzhou Liu [FM1_DTSEC4] = FSL_CORENET_DEVDISR2_DTSEC1_4,
19629d6b32SShengzhou Liu [FM1_DTSEC5] = FSL_CORENET_DEVDISR2_DTSEC1_5,
20629d6b32SShengzhou Liu [FM1_DTSEC6] = FSL_CORENET_DEVDISR2_DTSEC1_6,
21629d6b32SShengzhou Liu [FM1_DTSEC9] = FSL_CORENET_DEVDISR2_DTSEC1_9,
22629d6b32SShengzhou Liu [FM1_DTSEC10] = FSL_CORENET_DEVDISR2_DTSEC1_10,
23629d6b32SShengzhou Liu [FM1_10GEC1] = FSL_CORENET_DEVDISR2_10GEC1_1,
24629d6b32SShengzhou Liu [FM1_10GEC2] = FSL_CORENET_DEVDISR2_10GEC1_2,
25629d6b32SShengzhou Liu [FM1_10GEC3] = FSL_CORENET_DEVDISR2_10GEC1_3,
26629d6b32SShengzhou Liu [FM1_10GEC4] = FSL_CORENET_DEVDISR2_10GEC1_4,
27629d6b32SShengzhou Liu };
28629d6b32SShengzhou Liu
is_device_disabled(enum fm_port port)29629d6b32SShengzhou Liu static int is_device_disabled(enum fm_port port)
30629d6b32SShengzhou Liu {
31629d6b32SShengzhou Liu ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
32629d6b32SShengzhou Liu u32 devdisr2 = in_be32(&gur->devdisr2);
33629d6b32SShengzhou Liu
34629d6b32SShengzhou Liu return port_to_devdisr[port] & devdisr2;
35629d6b32SShengzhou Liu }
36629d6b32SShengzhou Liu
fman_disable_port(enum fm_port port)37629d6b32SShengzhou Liu void fman_disable_port(enum fm_port port)
38629d6b32SShengzhou Liu {
39629d6b32SShengzhou Liu ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
40629d6b32SShengzhou Liu
41629d6b32SShengzhou Liu setbits_be32(&gur->devdisr2, port_to_devdisr[port]);
42629d6b32SShengzhou Liu }
43629d6b32SShengzhou Liu
fman_port_enet_if(enum fm_port port)44629d6b32SShengzhou Liu phy_interface_t fman_port_enet_if(enum fm_port port)
45629d6b32SShengzhou Liu {
46629d6b32SShengzhou Liu ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
47629d6b32SShengzhou Liu u32 rcwsr13 = in_be32(&gur->rcwsr[13]);
48629d6b32SShengzhou Liu
49629d6b32SShengzhou Liu if (is_device_disabled(port))
50629d6b32SShengzhou Liu return PHY_INTERFACE_MODE_NONE;
51629d6b32SShengzhou Liu
521576b558SShengzhou Liu if ((port == FM1_10GEC1 || port == FM1_10GEC2) &&
53629d6b32SShengzhou Liu ((is_serdes_configured(XAUI_FM1_MAC9)) ||
54629d6b32SShengzhou Liu (is_serdes_configured(XFI_FM1_MAC9)) ||
55629d6b32SShengzhou Liu (is_serdes_configured(XFI_FM1_MAC10))))
56629d6b32SShengzhou Liu return PHY_INTERFACE_MODE_XGMII;
57629d6b32SShengzhou Liu
581576b558SShengzhou Liu if ((port == FM1_10GEC3 || port == FM1_10GEC4) &&
591576b558SShengzhou Liu ((is_serdes_configured(XFI_FM1_MAC1)) ||
601576b558SShengzhou Liu (is_serdes_configured(XFI_FM1_MAC2))))
611576b558SShengzhou Liu return PHY_INTERFACE_MODE_XGMII;
621576b558SShengzhou Liu
63629d6b32SShengzhou Liu if ((port == FM1_DTSEC3) && ((rcwsr13 & FSL_CORENET_RCWSR13_EC1) ==
64629d6b32SShengzhou Liu FSL_CORENET_RCWSR13_EC1_DTSEC3_RGMII))
65629d6b32SShengzhou Liu return PHY_INTERFACE_MODE_RGMII;
66629d6b32SShengzhou Liu
67629d6b32SShengzhou Liu if ((port == FM1_DTSEC4) && ((rcwsr13 & FSL_CORENET_RCWSR13_EC2) ==
68629d6b32SShengzhou Liu FSL_CORENET_RCWSR13_EC2_DTSEC4_RGMII))
69629d6b32SShengzhou Liu return PHY_INTERFACE_MODE_RGMII;
70629d6b32SShengzhou Liu
71629d6b32SShengzhou Liu if ((port == FM1_DTSEC10) && ((rcwsr13 & FSL_CORENET_RCWSR13_EC2) ==
72629d6b32SShengzhou Liu FSL_CORENET_RCWSR13_EC2_DTSEC10_RGMII))
73629d6b32SShengzhou Liu return PHY_INTERFACE_MODE_RGMII;
74629d6b32SShengzhou Liu
75629d6b32SShengzhou Liu switch (port) {
76629d6b32SShengzhou Liu case FM1_DTSEC1:
77629d6b32SShengzhou Liu case FM1_DTSEC2:
78629d6b32SShengzhou Liu case FM1_DTSEC3:
79629d6b32SShengzhou Liu case FM1_DTSEC4:
80629d6b32SShengzhou Liu case FM1_DTSEC5:
81629d6b32SShengzhou Liu case FM1_DTSEC6:
82629d6b32SShengzhou Liu case FM1_DTSEC9:
83629d6b32SShengzhou Liu case FM1_DTSEC10:
84629d6b32SShengzhou Liu if (is_serdes_configured(SGMII_FM1_DTSEC1 + port - FM1_DTSEC1))
85629d6b32SShengzhou Liu return PHY_INTERFACE_MODE_SGMII;
86629d6b32SShengzhou Liu break;
87629d6b32SShengzhou Liu default:
88629d6b32SShengzhou Liu return PHY_INTERFACE_MODE_NONE;
89629d6b32SShengzhou Liu }
90629d6b32SShengzhou Liu
91629d6b32SShengzhou Liu return PHY_INTERFACE_MODE_NONE;
92629d6b32SShengzhou Liu }
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