1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
254cd51bfSMarek Vasut /*
354cd51bfSMarek Vasut * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
454cd51bfSMarek Vasut *
554cd51bfSMarek Vasut * Based on code:
654cd51bfSMarek Vasut * Copyright (C) 2005-2009 Samsung Electronics
754cd51bfSMarek Vasut * Kyungmin Park <kyungmin.park@samsung.com>
854cd51bfSMarek Vasut */
954cd51bfSMarek Vasut
1054cd51bfSMarek Vasut #include <common.h>
1154cd51bfSMarek Vasut #include <asm/io.h>
1254cd51bfSMarek Vasut #include <linux/mtd/onenand_regs.h>
1354cd51bfSMarek Vasut #include <onenand_uboot.h>
1454cd51bfSMarek Vasut
1554cd51bfSMarek Vasut /*
1654cd51bfSMarek Vasut * Device geometry:
1754cd51bfSMarek Vasut * - 2048b page, 128k erase block.
1854cd51bfSMarek Vasut * - 4096b page, 256k erase block.
1954cd51bfSMarek Vasut */
2054cd51bfSMarek Vasut enum onenand_spl_pagesize {
2154cd51bfSMarek Vasut PAGE_2K = 2048,
2254cd51bfSMarek Vasut PAGE_4K = 4096,
2354cd51bfSMarek Vasut };
2454cd51bfSMarek Vasut
25b51ced8eSLadislav Michl static unsigned int density_mask;
26b51ced8eSLadislav Michl
2754cd51bfSMarek Vasut #define ONENAND_PAGES_PER_BLOCK 64
2854cd51bfSMarek Vasut #define onenand_sector_address(page) (page << 2)
2954cd51bfSMarek Vasut #define onenand_buffer_address() ((1 << 3) << 8)
30b51ced8eSLadislav Michl
onenand_block_address(int block)31b51ced8eSLadislav Michl static inline int onenand_block_address(int block)
32b51ced8eSLadislav Michl {
33b51ced8eSLadislav Michl /* Device Flash Core select, NAND Flash Block Address */
34b51ced8eSLadislav Michl if (block & density_mask)
35b51ced8eSLadislav Michl return ONENAND_DDP_CHIP1 | (block ^ density_mask);
36b51ced8eSLadislav Michl
37b51ced8eSLadislav Michl return block;
38b51ced8eSLadislav Michl }
39b51ced8eSLadislav Michl
onenand_bufferram_address(int block)40b51ced8eSLadislav Michl static inline int onenand_bufferram_address(int block)
41b51ced8eSLadislav Michl {
42b51ced8eSLadislav Michl /* Device BufferRAM Select */
43b51ced8eSLadislav Michl if (block & density_mask)
44b51ced8eSLadislav Michl return ONENAND_DDP_CHIP1;
45b51ced8eSLadislav Michl
46b51ced8eSLadislav Michl return ONENAND_DDP_CHIP0;
47b51ced8eSLadislav Michl }
4854cd51bfSMarek Vasut
onenand_readw(uint32_t addr)4954cd51bfSMarek Vasut static inline uint16_t onenand_readw(uint32_t addr)
5054cd51bfSMarek Vasut {
5154cd51bfSMarek Vasut return readw(CONFIG_SYS_ONENAND_BASE + addr);
5254cd51bfSMarek Vasut }
5354cd51bfSMarek Vasut
onenand_writew(uint16_t value,uint32_t addr)5454cd51bfSMarek Vasut static inline void onenand_writew(uint16_t value, uint32_t addr)
5554cd51bfSMarek Vasut {
5654cd51bfSMarek Vasut writew(value, CONFIG_SYS_ONENAND_BASE + addr);
5754cd51bfSMarek Vasut }
5854cd51bfSMarek Vasut
onenand_spl_get_geometry(void)5954cd51bfSMarek Vasut static enum onenand_spl_pagesize onenand_spl_get_geometry(void)
6054cd51bfSMarek Vasut {
61b51ced8eSLadislav Michl unsigned int dev_id, density, size;
6254cd51bfSMarek Vasut
6354cd51bfSMarek Vasut if (!onenand_readw(ONENAND_REG_TECHNOLOGY)) {
6454cd51bfSMarek Vasut dev_id = onenand_readw(ONENAND_REG_DEVICE_ID);
6554cd51bfSMarek Vasut density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
6654cd51bfSMarek Vasut density &= ONENAND_DEVICE_DENSITY_MASK;
6754cd51bfSMarek Vasut
6854cd51bfSMarek Vasut if (density < ONENAND_DEVICE_DENSITY_4Gb)
6954cd51bfSMarek Vasut return PAGE_2K;
7054cd51bfSMarek Vasut
71b51ced8eSLadislav Michl if (dev_id & ONENAND_DEVICE_IS_DDP) {
72b51ced8eSLadislav Michl size = onenand_readw(ONENAND_REG_DATA_BUFFER_SIZE);
73b51ced8eSLadislav Michl density_mask = 1 << (18 + density - ffs(size));
7454cd51bfSMarek Vasut return PAGE_2K;
7554cd51bfSMarek Vasut }
76b51ced8eSLadislav Michl }
7754cd51bfSMarek Vasut
7854cd51bfSMarek Vasut return PAGE_4K;
7954cd51bfSMarek Vasut }
8054cd51bfSMarek Vasut
onenand_spl_read_page(uint32_t block,uint32_t page,uint32_t * buf,enum onenand_spl_pagesize pagesize)8154cd51bfSMarek Vasut static int onenand_spl_read_page(uint32_t block, uint32_t page, uint32_t *buf,
8254cd51bfSMarek Vasut enum onenand_spl_pagesize pagesize)
8354cd51bfSMarek Vasut {
8454cd51bfSMarek Vasut const uint32_t addr = CONFIG_SYS_ONENAND_BASE + ONENAND_DATARAM;
8554cd51bfSMarek Vasut uint32_t offset;
8654cd51bfSMarek Vasut
8754cd51bfSMarek Vasut onenand_writew(onenand_block_address(block),
8854cd51bfSMarek Vasut ONENAND_REG_START_ADDRESS1);
8954cd51bfSMarek Vasut
9054cd51bfSMarek Vasut onenand_writew(onenand_bufferram_address(block),
9154cd51bfSMarek Vasut ONENAND_REG_START_ADDRESS2);
9254cd51bfSMarek Vasut
9354cd51bfSMarek Vasut onenand_writew(onenand_sector_address(page),
9454cd51bfSMarek Vasut ONENAND_REG_START_ADDRESS8);
9554cd51bfSMarek Vasut
9654cd51bfSMarek Vasut onenand_writew(onenand_buffer_address(),
9754cd51bfSMarek Vasut ONENAND_REG_START_BUFFER);
9854cd51bfSMarek Vasut
9954cd51bfSMarek Vasut onenand_writew(ONENAND_INT_CLEAR, ONENAND_REG_INTERRUPT);
10054cd51bfSMarek Vasut
10154cd51bfSMarek Vasut onenand_writew(ONENAND_CMD_READ, ONENAND_REG_COMMAND);
10254cd51bfSMarek Vasut
10354cd51bfSMarek Vasut while (!(onenand_readw(ONENAND_REG_INTERRUPT) & ONENAND_INT_READ))
10454cd51bfSMarek Vasut continue;
10554cd51bfSMarek Vasut
10654cd51bfSMarek Vasut /* Check for invalid block mark */
10754cd51bfSMarek Vasut if (page < 2 && (onenand_readw(ONENAND_SPARERAM) != 0xffff))
10854cd51bfSMarek Vasut return 1;
10954cd51bfSMarek Vasut
11054cd51bfSMarek Vasut for (offset = 0; offset < pagesize; offset += 4)
11154cd51bfSMarek Vasut buf[offset / 4] = readl(addr + offset);
11254cd51bfSMarek Vasut
11354cd51bfSMarek Vasut return 0;
11454cd51bfSMarek Vasut }
11554cd51bfSMarek Vasut
116735717d1SLadislav Michl #ifdef CONFIG_SPL_UBI
117735717d1SLadislav Michl /* Temporary storage for non page aligned and non page sized reads. */
118735717d1SLadislav Michl static u8 scratch_buf[PAGE_4K];
119735717d1SLadislav Michl
120735717d1SLadislav Michl /**
121735717d1SLadislav Michl * onenand_spl_read_block - Read data from physical eraseblock into a buffer
122735717d1SLadislav Michl * @block: Number of the physical eraseblock
123735717d1SLadislav Michl * @offset: Data offset from the start of @peb
124735717d1SLadislav Michl * @len: Data size to read
125735717d1SLadislav Michl * @dst: Address of the destination buffer
126735717d1SLadislav Michl *
127735717d1SLadislav Michl * Notes:
128735717d1SLadislav Michl * @offset + @len are not allowed to be larger than a physical
129735717d1SLadislav Michl * erase block. No sanity check done for simplicity reasons.
130735717d1SLadislav Michl */
onenand_spl_read_block(int block,int offset,int len,void * dst)131735717d1SLadislav Michl int onenand_spl_read_block(int block, int offset, int len, void *dst)
132735717d1SLadislav Michl {
1330da008efSLadislav Michl int page, read;
1340da008efSLadislav Michl static int psize;
135735717d1SLadislav Michl
1360da008efSLadislav Michl if (!psize)
137735717d1SLadislav Michl psize = onenand_spl_get_geometry();
1380da008efSLadislav Michl
139735717d1SLadislav Michl /* Calculate the page number */
140735717d1SLadislav Michl page = offset / psize;
141735717d1SLadislav Michl /* Offset to the start of a flash page */
142735717d1SLadislav Michl offset = offset % psize;
143735717d1SLadislav Michl
144735717d1SLadislav Michl while (len) {
145735717d1SLadislav Michl /*
146735717d1SLadislav Michl * Non page aligned reads go to the scratch buffer.
147735717d1SLadislav Michl * Page aligned reads go directly to the destination.
148735717d1SLadislav Michl */
149735717d1SLadislav Michl if (offset || len < psize) {
150735717d1SLadislav Michl onenand_spl_read_page(block, page,
151735717d1SLadislav Michl (uint32_t *)scratch_buf, psize);
152735717d1SLadislav Michl read = min(len, psize - offset);
153735717d1SLadislav Michl memcpy(dst, scratch_buf + offset, read);
154735717d1SLadislav Michl offset = 0;
155735717d1SLadislav Michl } else {
156735717d1SLadislav Michl onenand_spl_read_page(block, page, dst, psize);
157735717d1SLadislav Michl read = psize;
158735717d1SLadislav Michl }
159735717d1SLadislav Michl page++;
160735717d1SLadislav Michl len -= read;
161735717d1SLadislav Michl dst += read;
162735717d1SLadislav Michl }
163735717d1SLadislav Michl return 0;
164735717d1SLadislav Michl }
165735717d1SLadislav Michl #endif
166735717d1SLadislav Michl
onenand_spl_load_image(uint32_t offs,uint32_t size,void * dst)16754cd51bfSMarek Vasut void onenand_spl_load_image(uint32_t offs, uint32_t size, void *dst)
16854cd51bfSMarek Vasut {
16954cd51bfSMarek Vasut uint32_t *addr = (uint32_t *)dst;
170f9961378SEnric Balletbo i Serra uint32_t to_page;
17154cd51bfSMarek Vasut uint32_t block;
17254cd51bfSMarek Vasut uint32_t page, rpage;
17354cd51bfSMarek Vasut enum onenand_spl_pagesize pagesize;
17454cd51bfSMarek Vasut int ret;
17554cd51bfSMarek Vasut
17654cd51bfSMarek Vasut pagesize = onenand_spl_get_geometry();
17754cd51bfSMarek Vasut
17854cd51bfSMarek Vasut /*
17954cd51bfSMarek Vasut * The page can be either 2k or 4k, avoid using DIV_ROUND_UP to avoid
18054cd51bfSMarek Vasut * pulling further unwanted functions into the SPL.
18154cd51bfSMarek Vasut */
18254cd51bfSMarek Vasut if (pagesize == 2048) {
18354cd51bfSMarek Vasut page = offs / 2048;
184f9961378SEnric Balletbo i Serra to_page = page + DIV_ROUND_UP(size, 2048);
18554cd51bfSMarek Vasut } else {
18654cd51bfSMarek Vasut page = offs / 4096;
187f9961378SEnric Balletbo i Serra to_page = page + DIV_ROUND_UP(size, 4096);
18854cd51bfSMarek Vasut }
18954cd51bfSMarek Vasut
190f9961378SEnric Balletbo i Serra for (; page <= to_page; page++) {
19154cd51bfSMarek Vasut block = page / ONENAND_PAGES_PER_BLOCK;
19254cd51bfSMarek Vasut rpage = page & (ONENAND_PAGES_PER_BLOCK - 1);
19354cd51bfSMarek Vasut ret = onenand_spl_read_page(block, rpage, addr, pagesize);
194f9961378SEnric Balletbo i Serra if (ret)
19554cd51bfSMarek Vasut page += ONENAND_PAGES_PER_BLOCK - 1;
196f9961378SEnric Balletbo i Serra else
19754cd51bfSMarek Vasut addr += pagesize / 4;
19854cd51bfSMarek Vasut }
19954cd51bfSMarek Vasut }
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