1 /* 2 * (C) Copyright 2002-2004 3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com 4 * 5 * Copyright (C) 2003 Arabella Software Ltd. 6 * Yuli Barcohen <yuli@arabellasw.com> 7 * 8 * Copyright (C) 2004 9 * Ed Okerson 10 * 11 * Copyright (C) 2006 12 * Tolunay Orkun <listmember@orkun.us> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 * 32 */ 33 34 /* The DEBUG define must be before common to enable debugging */ 35 /* #define DEBUG */ 36 37 #include <common.h> 38 #include <asm/processor.h> 39 #include <asm/io.h> 40 #include <asm/byteorder.h> 41 #include <environment.h> 42 #ifdef CFG_FLASH_CFI_DRIVER 43 44 /* 45 * This file implements a Common Flash Interface (CFI) driver for U-Boot. 46 * The width of the port and the width of the chips are determined at initialization. 47 * These widths are used to calculate the address for access CFI data structures. 48 * 49 * References 50 * JEDEC Standard JESD68 - Common Flash Interface (CFI) 51 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes 52 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets 53 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet 54 * AMD CFI Specification, Release 2.0 December 1, 2001 55 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte 56 * Device IDs, Publication Number 25538 Revision A, November 8, 2001 57 * 58 * define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between 59 * reading and writing ... (yes there is such a Hardware). 60 */ 61 62 #ifndef CFG_FLASH_BANKS_LIST 63 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } 64 #endif 65 66 #define FLASH_CMD_CFI 0x98 67 #define FLASH_CMD_READ_ID 0x90 68 #define FLASH_CMD_RESET 0xff 69 #define FLASH_CMD_BLOCK_ERASE 0x20 70 #define FLASH_CMD_ERASE_CONFIRM 0xD0 71 #define FLASH_CMD_WRITE 0x40 72 #define FLASH_CMD_PROTECT 0x60 73 #define FLASH_CMD_PROTECT_SET 0x01 74 #define FLASH_CMD_PROTECT_CLEAR 0xD0 75 #define FLASH_CMD_CLEAR_STATUS 0x50 76 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8 77 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0 78 79 #define FLASH_STATUS_DONE 0x80 80 #define FLASH_STATUS_ESS 0x40 81 #define FLASH_STATUS_ECLBS 0x20 82 #define FLASH_STATUS_PSLBS 0x10 83 #define FLASH_STATUS_VPENS 0x08 84 #define FLASH_STATUS_PSS 0x04 85 #define FLASH_STATUS_DPS 0x02 86 #define FLASH_STATUS_R 0x01 87 #define FLASH_STATUS_PROTECT 0x01 88 89 #define AMD_CMD_RESET 0xF0 90 #define AMD_CMD_WRITE 0xA0 91 #define AMD_CMD_ERASE_START 0x80 92 #define AMD_CMD_ERASE_SECTOR 0x30 93 #define AMD_CMD_UNLOCK_START 0xAA 94 #define AMD_CMD_UNLOCK_ACK 0x55 95 #define AMD_CMD_WRITE_TO_BUFFER 0x25 96 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29 97 98 #define AMD_STATUS_TOGGLE 0x40 99 #define AMD_STATUS_ERROR 0x20 100 101 #define FLASH_OFFSET_MANUFACTURER_ID 0x00 102 #define FLASH_OFFSET_DEVICE_ID 0x01 103 #define FLASH_OFFSET_DEVICE_ID2 0x0E 104 #define FLASH_OFFSET_DEVICE_ID3 0x0F 105 #define FLASH_OFFSET_CFI 0x55 106 #define FLASH_OFFSET_CFI_ALT 0x555 107 #define FLASH_OFFSET_CFI_RESP 0x10 108 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13 109 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 /* extended query table primary addr */ 110 #define FLASH_OFFSET_WTOUT 0x1F 111 #define FLASH_OFFSET_WBTOUT 0x20 112 #define FLASH_OFFSET_ETOUT 0x21 113 #define FLASH_OFFSET_CETOUT 0x22 114 #define FLASH_OFFSET_WMAX_TOUT 0x23 115 #define FLASH_OFFSET_WBMAX_TOUT 0x24 116 #define FLASH_OFFSET_EMAX_TOUT 0x25 117 #define FLASH_OFFSET_CEMAX_TOUT 0x26 118 #define FLASH_OFFSET_SIZE 0x27 119 #define FLASH_OFFSET_INTERFACE 0x28 120 #define FLASH_OFFSET_BUFFER_SIZE 0x2A 121 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C 122 #define FLASH_OFFSET_ERASE_REGIONS 0x2D 123 #define FLASH_OFFSET_PROTECT 0x02 124 #define FLASH_OFFSET_USER_PROTECTION 0x85 125 #define FLASH_OFFSET_INTEL_PROTECTION 0x81 126 127 #define CFI_CMDSET_NONE 0 128 #define CFI_CMDSET_INTEL_EXTENDED 1 129 #define CFI_CMDSET_AMD_STANDARD 2 130 #define CFI_CMDSET_INTEL_STANDARD 3 131 #define CFI_CMDSET_AMD_EXTENDED 4 132 #define CFI_CMDSET_MITSU_STANDARD 256 133 #define CFI_CMDSET_MITSU_EXTENDED 257 134 #define CFI_CMDSET_SST 258 135 136 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */ 137 # undef FLASH_CMD_RESET 138 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */ 139 #endif 140 141 typedef union { 142 unsigned char c; 143 unsigned short w; 144 unsigned long l; 145 unsigned long long ll; 146 } cfiword_t; 147 148 typedef union { 149 volatile unsigned char *cp; 150 volatile unsigned short *wp; 151 volatile unsigned long *lp; 152 volatile unsigned long long *llp; 153 } cfiptr_t; 154 155 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */ 156 157 static uint flash_offset_cfi[2]={FLASH_OFFSET_CFI,FLASH_OFFSET_CFI_ALT}; 158 159 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */ 160 #ifdef CFG_MAX_FLASH_BANKS_DETECT 161 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST; 162 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */ 163 #else 164 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST; 165 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */ 166 #endif 167 168 /* 169 * Check if chip width is defined. If not, start detecting with 8bit. 170 */ 171 #ifndef CFG_FLASH_CFI_WIDTH 172 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT 173 #endif 174 175 176 /*----------------------------------------------------------------------- 177 * Functions 178 */ 179 180 typedef unsigned long flash_sect_t; 181 182 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c); 183 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf); 184 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); 185 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect); 186 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); 187 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); 188 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); 189 static void flash_read_jedec_ids (flash_info_t * info); 190 static int flash_detect_cfi (flash_info_t * info); 191 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword); 192 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, 193 ulong tout, char *prompt); 194 ulong flash_get_size (ulong base, int banknum); 195 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE) 196 static flash_info_t *flash_get_info(ulong base); 197 #endif 198 #ifdef CFG_FLASH_USE_BUFFER_WRITE 199 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len); 200 #endif 201 202 /*----------------------------------------------------------------------- 203 * create an address based on the offset and the port width 204 */ 205 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset) 206 { 207 return ((uchar *) (info->start[sect] + (offset * info->portwidth))); 208 } 209 210 #ifdef DEBUG 211 /*----------------------------------------------------------------------- 212 * Debug support 213 */ 214 void print_longlong (char *str, unsigned long long data) 215 { 216 int i; 217 char *cp; 218 219 cp = (unsigned char *) &data; 220 for (i = 0; i < 8; i++) 221 sprintf (&str[i * 2], "%2.2x", *cp++); 222 } 223 static void flash_printqry (flash_info_t * info, flash_sect_t sect) 224 { 225 cfiptr_t cptr; 226 int x, y; 227 228 for (x = 0; x < 0x40; x += 16U / info->portwidth) { 229 cptr.cp = 230 flash_make_addr (info, sect, 231 x + FLASH_OFFSET_CFI_RESP); 232 debug ("%p : ", cptr.cp); 233 for (y = 0; y < 16; y++) { 234 debug ("%2.2x ", cptr.cp[y]); 235 } 236 debug (" "); 237 for (y = 0; y < 16; y++) { 238 if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) { 239 debug ("%c", cptr.cp[y]); 240 } else { 241 debug ("."); 242 } 243 } 244 debug ("\n"); 245 } 246 } 247 #endif 248 249 250 /*----------------------------------------------------------------------- 251 * read a character at a port width address 252 */ 253 inline uchar flash_read_uchar (flash_info_t * info, uint offset) 254 { 255 uchar *cp; 256 257 cp = flash_make_addr (info, 0, offset); 258 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) 259 return (cp[0]); 260 #else 261 return (cp[info->portwidth - 1]); 262 #endif 263 } 264 265 /*----------------------------------------------------------------------- 266 * read a short word by swapping for ppc format. 267 */ 268 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset) 269 { 270 uchar *addr; 271 ushort retval; 272 273 #ifdef DEBUG 274 int x; 275 #endif 276 addr = flash_make_addr (info, sect, offset); 277 278 #ifdef DEBUG 279 debug ("ushort addr is at %p info->portwidth = %d\n", addr, 280 info->portwidth); 281 for (x = 0; x < 2 * info->portwidth; x++) { 282 debug ("addr[%x] = 0x%x\n", x, addr[x]); 283 } 284 #endif 285 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) 286 retval = ((addr[(info->portwidth)] << 8) | addr[0]); 287 #else 288 retval = ((addr[(2 * info->portwidth) - 1] << 8) | 289 addr[info->portwidth - 1]); 290 #endif 291 292 debug ("retval = 0x%x\n", retval); 293 return retval; 294 } 295 296 /*----------------------------------------------------------------------- 297 * read a long word by picking the least significant byte of each maximum 298 * port size word. Swap for ppc format. 299 */ 300 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset) 301 { 302 uchar *addr; 303 ulong retval; 304 305 #ifdef DEBUG 306 int x; 307 #endif 308 addr = flash_make_addr (info, sect, offset); 309 310 #ifdef DEBUG 311 debug ("long addr is at %p info->portwidth = %d\n", addr, 312 info->portwidth); 313 for (x = 0; x < 4 * info->portwidth; x++) { 314 debug ("addr[%x] = 0x%x\n", x, addr[x]); 315 } 316 #endif 317 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) 318 retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) | 319 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8); 320 #else 321 retval = (addr[(2 * info->portwidth) - 1] << 24) | 322 (addr[(info->portwidth) - 1] << 16) | 323 (addr[(4 * info->portwidth) - 1] << 8) | 324 addr[(3 * info->portwidth) - 1]; 325 #endif 326 return retval; 327 } 328 329 330 #ifdef CONFIG_FLASH_CFI_LEGACY 331 /*----------------------------------------------------------------------- 332 * Call board code to request info about non-CFI flash. 333 * board_flash_get_legacy needs to fill in at least: 334 * info->portwidth, info->chipwidth and info->interface for Jedec probing. 335 */ 336 int flash_detect_legacy(ulong base, int banknum) 337 { 338 flash_info_t *info = &flash_info[banknum]; 339 if (board_flash_get_legacy(base, banknum, info)) { 340 /* board code may have filled info completely. If not, we 341 use JEDEC ID probing. */ 342 if (!info->vendor) { 343 int modes[] = { CFI_CMDSET_AMD_STANDARD, CFI_CMDSET_INTEL_STANDARD }; 344 int i; 345 346 for(i=0; i<sizeof(modes)/sizeof(modes[0]); i++) { 347 info->vendor = modes[i]; 348 info->start[0] = base; 349 if (info->portwidth == FLASH_CFI_8BIT && info->interface == FLASH_CFI_X8X16) { 350 info->addr_unlock1 = 0x2AAA; 351 info->addr_unlock2 = 0x5555; 352 } else { 353 info->addr_unlock1 = 0x5555; 354 info->addr_unlock2 = 0x2AAA; 355 } 356 flash_read_jedec_ids(info); 357 debug("JEDEC PROBE: ID %x %x %x\n", info->manufacturer_id, info->device_id, info->device_id2); 358 if (jedec_flash_match(info, base)) 359 break; 360 } 361 } 362 switch(info->vendor) { 363 case CFI_CMDSET_INTEL_STANDARD: 364 case CFI_CMDSET_INTEL_EXTENDED: 365 info->cmd_reset = FLASH_CMD_RESET; 366 break; 367 case CFI_CMDSET_AMD_STANDARD: 368 case CFI_CMDSET_AMD_EXTENDED: 369 case CFI_CMDSET_AMD_LEGACY: 370 info->cmd_reset = AMD_CMD_RESET; 371 break; 372 } 373 info->flash_id = FLASH_MAN_CFI; 374 return 1; 375 } 376 return 0; /* use CFI */ 377 } 378 #else 379 int inline flash_detect_legacy(ulong base, int banknum) 380 { 381 return 0; /* use CFI */ 382 } 383 #endif 384 385 386 /*----------------------------------------------------------------------- 387 */ 388 unsigned long flash_init (void) 389 { 390 unsigned long size = 0; 391 int i; 392 393 #ifdef CFG_FLASH_PROTECTION 394 char *s = getenv("unlock"); 395 #endif 396 397 /* Init: no FLASHes known */ 398 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { 399 flash_info[i].flash_id = FLASH_UNKNOWN; 400 401 if (!flash_detect_legacy (bank_base[i], i)) 402 flash_get_size (bank_base[i], i); 403 size += flash_info[i].size; 404 if (flash_info[i].flash_id == FLASH_UNKNOWN) { 405 #ifndef CFG_FLASH_QUIET_TEST 406 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", 407 i+1, flash_info[i].size, flash_info[i].size << 20); 408 #endif /* CFG_FLASH_QUIET_TEST */ 409 } 410 #ifdef CFG_FLASH_PROTECTION 411 else if ((s != NULL) && (strcmp(s, "yes") == 0)) { 412 /* 413 * Only the U-Boot image and it's environment is protected, 414 * all other sectors are unprotected (unlocked) if flash 415 * hardware protection is used (CFG_FLASH_PROTECTION) and 416 * the environment variable "unlock" is set to "yes". 417 */ 418 if (flash_info[i].legacy_unlock) { 419 int k; 420 421 /* 422 * Disable legacy_unlock temporarily, since 423 * flash_real_protect would relock all other sectors 424 * again otherwise. 425 */ 426 flash_info[i].legacy_unlock = 0; 427 428 /* 429 * Legacy unlocking (e.g. Intel J3) -> unlock only one 430 * sector. This will unlock all sectors. 431 */ 432 flash_real_protect (&flash_info[i], 0, 0); 433 434 flash_info[i].legacy_unlock = 1; 435 436 /* 437 * Manually mark other sectors as unlocked (unprotected) 438 */ 439 for (k = 1; k < flash_info[i].sector_count; k++) 440 flash_info[i].protect[k] = 0; 441 } else { 442 /* 443 * No legancy unlocking -> unlock all sectors 444 */ 445 flash_protect (FLAG_PROTECT_CLEAR, 446 flash_info[i].start[0], 447 flash_info[i].start[0] + flash_info[i].size - 1, 448 &flash_info[i]); 449 } 450 } 451 #endif /* CFG_FLASH_PROTECTION */ 452 } 453 454 /* Monitor protection ON by default */ 455 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE) 456 flash_protect (FLAG_PROTECT_SET, 457 CFG_MONITOR_BASE, 458 CFG_MONITOR_BASE + monitor_flash_len - 1, 459 flash_get_info(CFG_MONITOR_BASE)); 460 #endif 461 462 /* Environment protection ON by default */ 463 #ifdef CFG_ENV_IS_IN_FLASH 464 flash_protect (FLAG_PROTECT_SET, 465 CFG_ENV_ADDR, 466 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1, 467 flash_get_info(CFG_ENV_ADDR)); 468 #endif 469 470 /* Redundant environment protection ON by default */ 471 #ifdef CFG_ENV_ADDR_REDUND 472 flash_protect (FLAG_PROTECT_SET, 473 CFG_ENV_ADDR_REDUND, 474 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1, 475 flash_get_info(CFG_ENV_ADDR_REDUND)); 476 #endif 477 return (size); 478 } 479 480 /*----------------------------------------------------------------------- 481 */ 482 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE) 483 static flash_info_t *flash_get_info(ulong base) 484 { 485 int i; 486 flash_info_t * info = 0; 487 488 for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) { 489 info = & flash_info[i]; 490 if (info->size && info->start[0] <= base && 491 base <= info->start[0] + info->size - 1) 492 break; 493 } 494 495 return i == CFG_MAX_FLASH_BANKS ? 0 : info; 496 } 497 #endif 498 499 /*----------------------------------------------------------------------- 500 */ 501 int flash_erase (flash_info_t * info, int s_first, int s_last) 502 { 503 int rcode = 0; 504 int prot; 505 flash_sect_t sect; 506 507 if (info->flash_id != FLASH_MAN_CFI) { 508 puts ("Can't erase unknown flash type - aborted\n"); 509 return 1; 510 } 511 if ((s_first < 0) || (s_first > s_last)) { 512 puts ("- no sectors to erase\n"); 513 return 1; 514 } 515 516 prot = 0; 517 for (sect = s_first; sect <= s_last; ++sect) { 518 if (info->protect[sect]) { 519 prot++; 520 } 521 } 522 if (prot) { 523 printf ("- Warning: %d protected sectors will not be erased!\n", prot); 524 } else { 525 putc ('\n'); 526 } 527 528 529 for (sect = s_first; sect <= s_last; sect++) { 530 if (info->protect[sect] == 0) { /* not protected */ 531 switch (info->vendor) { 532 case CFI_CMDSET_INTEL_STANDARD: 533 case CFI_CMDSET_INTEL_EXTENDED: 534 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS); 535 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE); 536 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM); 537 break; 538 case CFI_CMDSET_AMD_STANDARD: 539 case CFI_CMDSET_AMD_EXTENDED: 540 flash_unlock_seq (info, sect); 541 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_ERASE_START); 542 flash_unlock_seq (info, sect); 543 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR); 544 break; 545 #ifdef CONFIG_FLASH_CFI_LEGACY 546 case CFI_CMDSET_AMD_LEGACY: 547 flash_unlock_seq (info, 0); 548 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_ERASE_START); 549 flash_unlock_seq (info, 0); 550 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR); 551 break; 552 #endif 553 default: 554 debug ("Unkown flash vendor %d\n", 555 info->vendor); 556 break; 557 } 558 559 if (flash_full_status_check 560 (info, sect, info->erase_blk_tout, "erase")) { 561 rcode = 1; 562 } else 563 putc ('.'); 564 } 565 } 566 puts (" done\n"); 567 return rcode; 568 } 569 570 /*----------------------------------------------------------------------- 571 */ 572 void flash_print_info (flash_info_t * info) 573 { 574 int i; 575 576 if (info->flash_id != FLASH_MAN_CFI) { 577 puts ("missing or unknown FLASH type\n"); 578 return; 579 } 580 581 printf ("%s FLASH (%d x %d)", 582 info->name, 583 (info->portwidth << 3), (info->chipwidth << 3)); 584 if (info->size < 1024*1024) 585 printf (" Size: %ld kB in %d Sectors\n", 586 info->size >> 10, info->sector_count); 587 else 588 printf (" Size: %ld MB in %d Sectors\n", 589 info->size >> 20, info->sector_count); 590 printf (" "); 591 switch (info->vendor) { 592 case CFI_CMDSET_INTEL_STANDARD: 593 printf ("Intel Standard"); 594 break; 595 case CFI_CMDSET_INTEL_EXTENDED: 596 printf ("Intel Extended"); 597 break; 598 case CFI_CMDSET_AMD_STANDARD: 599 printf ("AMD Standard"); 600 break; 601 case CFI_CMDSET_AMD_EXTENDED: 602 printf ("AMD Extended"); 603 break; 604 #ifdef CONFIG_FLASH_CFI_LEGACY 605 case CFI_CMDSET_AMD_LEGACY: 606 printf ("AMD Legacy"); 607 break; 608 #endif 609 default: 610 printf ("Unknown (%d)", info->vendor); 611 break; 612 } 613 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X", 614 info->manufacturer_id, info->device_id); 615 if (info->device_id == 0x7E) { 616 printf("%04X", info->device_id2); 617 } 618 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n", 619 info->erase_blk_tout, 620 info->write_tout); 621 if (info->buffer_size > 1) { 622 printf (" Buffer write timeout: %ld ms, buffer size: %d bytes\n", 623 info->buffer_write_tout, 624 info->buffer_size); 625 } 626 627 puts ("\n Sector Start Addresses:"); 628 for (i = 0; i < info->sector_count; ++i) { 629 if ((i % 5) == 0) 630 printf ("\n"); 631 #ifdef CFG_FLASH_EMPTY_INFO 632 int k; 633 int size; 634 int erased; 635 volatile unsigned long *flash; 636 637 /* 638 * Check if whole sector is erased 639 */ 640 if (i != (info->sector_count - 1)) 641 size = info->start[i + 1] - info->start[i]; 642 else 643 size = info->start[0] + info->size - info->start[i]; 644 erased = 1; 645 flash = (volatile unsigned long *) info->start[i]; 646 size = size >> 2; /* divide by 4 for longword access */ 647 for (k = 0; k < size; k++) { 648 if (*flash++ != 0xffffffff) { 649 erased = 0; 650 break; 651 } 652 } 653 654 /* print empty and read-only info */ 655 printf (" %08lX %c %s ", 656 info->start[i], 657 erased ? 'E' : ' ', 658 info->protect[i] ? "RO" : " "); 659 #else /* ! CFG_FLASH_EMPTY_INFO */ 660 printf (" %08lX %s ", 661 info->start[i], 662 info->protect[i] ? "RO" : " "); 663 #endif 664 } 665 putc ('\n'); 666 return; 667 } 668 669 /*----------------------------------------------------------------------- 670 * Copy memory to flash, returns: 671 * 0 - OK 672 * 1 - write timeout 673 * 2 - Flash not erased 674 */ 675 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) 676 { 677 ulong wp; 678 ulong cp; 679 int aln; 680 cfiword_t cword; 681 int i, rc; 682 683 #ifdef CFG_FLASH_USE_BUFFER_WRITE 684 int buffered_size; 685 #endif 686 /* get lower aligned address */ 687 /* get lower aligned address */ 688 wp = (addr & ~(info->portwidth - 1)); 689 690 /* handle unaligned start */ 691 if ((aln = addr - wp) != 0) { 692 cword.l = 0; 693 cp = wp; 694 for (i = 0; i < aln; ++i, ++cp) 695 flash_add_byte (info, &cword, (*(uchar *) cp)); 696 697 for (; (i < info->portwidth) && (cnt > 0); i++) { 698 flash_add_byte (info, &cword, *src++); 699 cnt--; 700 cp++; 701 } 702 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp) 703 flash_add_byte (info, &cword, (*(uchar *) cp)); 704 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 705 return rc; 706 wp = cp; 707 } 708 709 /* handle the aligned part */ 710 #ifdef CFG_FLASH_USE_BUFFER_WRITE 711 buffered_size = (info->portwidth / info->chipwidth); 712 buffered_size *= info->buffer_size; 713 while (cnt >= info->portwidth) { 714 /* prohibit buffer write when buffer_size is 1 */ 715 if (info->buffer_size == 1) { 716 cword.l = 0; 717 for (i = 0; i < info->portwidth; i++) 718 flash_add_byte (info, &cword, *src++); 719 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 720 return rc; 721 wp += info->portwidth; 722 cnt -= info->portwidth; 723 continue; 724 } 725 726 /* write buffer until next buffered_size aligned boundary */ 727 i = buffered_size - (wp % buffered_size); 728 if (i > cnt) 729 i = cnt; 730 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) 731 return rc; 732 i -= i & (info->portwidth - 1); 733 wp += i; 734 src += i; 735 cnt -= i; 736 } 737 #else 738 while (cnt >= info->portwidth) { 739 cword.l = 0; 740 for (i = 0; i < info->portwidth; i++) { 741 flash_add_byte (info, &cword, *src++); 742 } 743 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 744 return rc; 745 wp += info->portwidth; 746 cnt -= info->portwidth; 747 } 748 #endif /* CFG_FLASH_USE_BUFFER_WRITE */ 749 if (cnt == 0) { 750 return (0); 751 } 752 753 /* 754 * handle unaligned tail bytes 755 */ 756 cword.l = 0; 757 for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) { 758 flash_add_byte (info, &cword, *src++); 759 --cnt; 760 } 761 for (; i < info->portwidth; ++i, ++cp) { 762 flash_add_byte (info, &cword, (*(uchar *) cp)); 763 } 764 765 return flash_write_cfiword (info, wp, cword); 766 } 767 768 /*----------------------------------------------------------------------- 769 */ 770 #ifdef CFG_FLASH_PROTECTION 771 772 int flash_real_protect (flash_info_t * info, long sector, int prot) 773 { 774 int retcode = 0; 775 776 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 777 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 778 if (prot) 779 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); 780 else 781 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); 782 783 if ((retcode = 784 flash_full_status_check (info, sector, info->erase_blk_tout, 785 prot ? "protect" : "unprotect")) == 0) { 786 787 info->protect[sector] = prot; 788 789 /* 790 * On some of Intel's flash chips (marked via legacy_unlock) 791 * unprotect unprotects all locking. 792 */ 793 if ((prot == 0) && (info->legacy_unlock)) { 794 flash_sect_t i; 795 796 for (i = 0; i < info->sector_count; i++) { 797 if (info->protect[i]) 798 flash_real_protect (info, i, 1); 799 } 800 } 801 } 802 return retcode; 803 } 804 805 /*----------------------------------------------------------------------- 806 * flash_read_user_serial - read the OneTimeProgramming cells 807 */ 808 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, 809 int len) 810 { 811 uchar *src; 812 uchar *dst; 813 814 dst = buffer; 815 src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION); 816 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 817 memcpy (dst, src + offset, len); 818 flash_write_cmd (info, 0, 0, info->cmd_reset); 819 } 820 821 /* 822 * flash_read_factory_serial - read the device Id from the protection area 823 */ 824 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, 825 int len) 826 { 827 uchar *src; 828 829 src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION); 830 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 831 memcpy (buffer, src + offset, len); 832 flash_write_cmd (info, 0, 0, info->cmd_reset); 833 } 834 835 #endif /* CFG_FLASH_PROTECTION */ 836 837 /* 838 * flash_is_busy - check to see if the flash is busy 839 * This routine checks the status of the chip and returns true if the chip is busy 840 */ 841 static int flash_is_busy (flash_info_t * info, flash_sect_t sect) 842 { 843 int retval; 844 845 switch (info->vendor) { 846 case CFI_CMDSET_INTEL_STANDARD: 847 case CFI_CMDSET_INTEL_EXTENDED: 848 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE); 849 break; 850 case CFI_CMDSET_AMD_STANDARD: 851 case CFI_CMDSET_AMD_EXTENDED: 852 #ifdef CONFIG_FLASH_CFI_LEGACY 853 case CFI_CMDSET_AMD_LEGACY: 854 #endif 855 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE); 856 break; 857 default: 858 retval = 0; 859 } 860 debug ("flash_is_busy: %d\n", retval); 861 return retval; 862 } 863 864 /*----------------------------------------------------------------------- 865 * wait for XSR.7 to be set. Time out with an error if it does not. 866 * This routine does not set the flash to read-array mode. 867 */ 868 static int flash_status_check (flash_info_t * info, flash_sect_t sector, 869 ulong tout, char *prompt) 870 { 871 ulong start; 872 873 #if CFG_HZ != 1000 874 tout *= CFG_HZ/1000; 875 #endif 876 877 /* Wait for command completion */ 878 start = get_timer (0); 879 while (flash_is_busy (info, sector)) { 880 if (get_timer (start) > tout) { 881 printf ("Flash %s timeout at address %lx data %lx\n", 882 prompt, info->start[sector], 883 flash_read_long (info, sector, 0)); 884 flash_write_cmd (info, sector, 0, info->cmd_reset); 885 return ERR_TIMOUT; 886 } 887 udelay (1); /* also triggers watchdog */ 888 } 889 return ERR_OK; 890 } 891 892 /*----------------------------------------------------------------------- 893 * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check. 894 * This routine sets the flash to read-array mode. 895 */ 896 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, 897 ulong tout, char *prompt) 898 { 899 int retcode; 900 901 retcode = flash_status_check (info, sector, tout, prompt); 902 switch (info->vendor) { 903 case CFI_CMDSET_INTEL_EXTENDED: 904 case CFI_CMDSET_INTEL_STANDARD: 905 if ((retcode == ERR_OK) 906 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { 907 retcode = ERR_INVAL; 908 printf ("Flash %s error at address %lx\n", prompt, 909 info->start[sector]); 910 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) { 911 puts ("Command Sequence Error.\n"); 912 } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) { 913 puts ("Block Erase Error.\n"); 914 retcode = ERR_NOT_ERASED; 915 } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) { 916 puts ("Locking Error\n"); 917 } 918 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) { 919 puts ("Block locked.\n"); 920 retcode = ERR_PROTECTED; 921 } 922 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) 923 puts ("Vpp Low Error.\n"); 924 } 925 flash_write_cmd (info, sector, 0, info->cmd_reset); 926 break; 927 default: 928 break; 929 } 930 return retcode; 931 } 932 933 /*----------------------------------------------------------------------- 934 */ 935 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) 936 { 937 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) 938 unsigned short w; 939 unsigned int l; 940 unsigned long long ll; 941 #endif 942 943 switch (info->portwidth) { 944 case FLASH_CFI_8BIT: 945 cword->c = c; 946 break; 947 case FLASH_CFI_16BIT: 948 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) 949 w = c; 950 w <<= 8; 951 cword->w = (cword->w >> 8) | w; 952 #else 953 cword->w = (cword->w << 8) | c; 954 #endif 955 break; 956 case FLASH_CFI_32BIT: 957 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) 958 l = c; 959 l <<= 24; 960 cword->l = (cword->l >> 8) | l; 961 #else 962 cword->l = (cword->l << 8) | c; 963 #endif 964 break; 965 case FLASH_CFI_64BIT: 966 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) 967 ll = c; 968 ll <<= 56; 969 cword->ll = (cword->ll >> 8) | ll; 970 #else 971 cword->ll = (cword->ll << 8) | c; 972 #endif 973 break; 974 } 975 } 976 977 978 /*----------------------------------------------------------------------- 979 * make a proper sized command based on the port and chip widths 980 */ 981 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf) 982 { 983 int i; 984 uchar *cp = (uchar *) cmdbuf; 985 986 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) 987 for (i = info->portwidth; i > 0; i--) 988 #else 989 for (i = 1; i <= info->portwidth; i++) 990 #endif 991 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd; 992 } 993 994 /* 995 * Write a proper sized command to the correct address 996 */ 997 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd) 998 { 999 1000 volatile cfiptr_t addr; 1001 cfiword_t cword; 1002 1003 addr.cp = flash_make_addr (info, sect, offset); 1004 flash_make_cmd (info, cmd, &cword); 1005 switch (info->portwidth) { 1006 case FLASH_CFI_8BIT: 1007 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd, 1008 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1009 *addr.cp = cword.c; 1010 break; 1011 case FLASH_CFI_16BIT: 1012 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp, 1013 cmd, cword.w, 1014 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1015 *addr.wp = cword.w; 1016 break; 1017 case FLASH_CFI_32BIT: 1018 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp, 1019 cmd, cword.l, 1020 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1021 *addr.lp = cword.l; 1022 break; 1023 case FLASH_CFI_64BIT: 1024 #ifdef DEBUG 1025 { 1026 char str[20]; 1027 1028 print_longlong (str, cword.ll); 1029 1030 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n", 1031 addr.llp, cmd, str, 1032 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1033 } 1034 #endif 1035 *addr.llp = cword.ll; 1036 break; 1037 } 1038 1039 /* Ensure all the instructions are fully finished */ 1040 sync(); 1041 } 1042 1043 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) 1044 { 1045 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START); 1046 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK); 1047 } 1048 1049 /*----------------------------------------------------------------------- 1050 */ 1051 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd) 1052 { 1053 cfiptr_t cptr; 1054 cfiword_t cword; 1055 int retval; 1056 1057 cptr.cp = flash_make_addr (info, sect, offset); 1058 flash_make_cmd (info, cmd, &cword); 1059 1060 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp); 1061 switch (info->portwidth) { 1062 case FLASH_CFI_8BIT: 1063 debug ("is= %x %x\n", cptr.cp[0], cword.c); 1064 retval = (cptr.cp[0] == cword.c); 1065 break; 1066 case FLASH_CFI_16BIT: 1067 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w); 1068 retval = (cptr.wp[0] == cword.w); 1069 break; 1070 case FLASH_CFI_32BIT: 1071 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l); 1072 retval = (cptr.lp[0] == cword.l); 1073 break; 1074 case FLASH_CFI_64BIT: 1075 #ifdef DEBUG 1076 { 1077 char str1[20]; 1078 char str2[20]; 1079 1080 print_longlong (str1, cptr.llp[0]); 1081 print_longlong (str2, cword.ll); 1082 debug ("is= %s %s\n", str1, str2); 1083 } 1084 #endif 1085 retval = (cptr.llp[0] == cword.ll); 1086 break; 1087 default: 1088 retval = 0; 1089 break; 1090 } 1091 return retval; 1092 } 1093 1094 /*----------------------------------------------------------------------- 1095 */ 1096 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd) 1097 { 1098 cfiptr_t cptr; 1099 cfiword_t cword; 1100 int retval; 1101 1102 cptr.cp = flash_make_addr (info, sect, offset); 1103 flash_make_cmd (info, cmd, &cword); 1104 switch (info->portwidth) { 1105 case FLASH_CFI_8BIT: 1106 retval = ((cptr.cp[0] & cword.c) == cword.c); 1107 break; 1108 case FLASH_CFI_16BIT: 1109 retval = ((cptr.wp[0] & cword.w) == cword.w); 1110 break; 1111 case FLASH_CFI_32BIT: 1112 retval = ((cptr.lp[0] & cword.l) == cword.l); 1113 break; 1114 case FLASH_CFI_64BIT: 1115 retval = ((cptr.llp[0] & cword.ll) == cword.ll); 1116 break; 1117 default: 1118 retval = 0; 1119 break; 1120 } 1121 return retval; 1122 } 1123 1124 /*----------------------------------------------------------------------- 1125 */ 1126 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd) 1127 { 1128 cfiptr_t cptr; 1129 cfiword_t cword; 1130 int retval; 1131 1132 cptr.cp = flash_make_addr (info, sect, offset); 1133 flash_make_cmd (info, cmd, &cword); 1134 switch (info->portwidth) { 1135 case FLASH_CFI_8BIT: 1136 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c)); 1137 break; 1138 case FLASH_CFI_16BIT: 1139 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w)); 1140 break; 1141 case FLASH_CFI_32BIT: 1142 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l)); 1143 break; 1144 case FLASH_CFI_64BIT: 1145 retval = ((cptr.llp[0] & cword.ll) != 1146 (cptr.llp[0] & cword.ll)); 1147 break; 1148 default: 1149 retval = 0; 1150 break; 1151 } 1152 return retval; 1153 } 1154 1155 /*----------------------------------------------------------------------- 1156 * read jedec ids from device and set corresponding fields in info struct 1157 * 1158 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct 1159 * 1160 */ 1161 static void flash_read_jedec_ids (flash_info_t * info) 1162 { 1163 info->manufacturer_id = 0; 1164 info->device_id = 0; 1165 info->device_id2 = 0; 1166 1167 switch (info->vendor) { 1168 case CFI_CMDSET_INTEL_STANDARD: 1169 case CFI_CMDSET_INTEL_EXTENDED: 1170 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1171 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); 1172 udelay(1000); /* some flash are slow to respond */ 1173 info->manufacturer_id = flash_read_uchar (info, 1174 FLASH_OFFSET_MANUFACTURER_ID); 1175 info->device_id = flash_read_uchar (info, 1176 FLASH_OFFSET_DEVICE_ID); 1177 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1178 break; 1179 case CFI_CMDSET_AMD_STANDARD: 1180 case CFI_CMDSET_AMD_EXTENDED: 1181 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1182 flash_unlock_seq(info, 0); 1183 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); 1184 udelay(1000); /* some flash are slow to respond */ 1185 info->manufacturer_id = flash_read_uchar (info, 1186 FLASH_OFFSET_MANUFACTURER_ID); 1187 info->device_id = flash_read_uchar (info, 1188 FLASH_OFFSET_DEVICE_ID); 1189 if (info->device_id == 0x7E) { 1190 /* AMD 3-byte (expanded) device ids */ 1191 info->device_id2 = flash_read_uchar (info, 1192 FLASH_OFFSET_DEVICE_ID2); 1193 info->device_id2 <<= 8; 1194 info->device_id2 |= flash_read_uchar (info, 1195 FLASH_OFFSET_DEVICE_ID3); 1196 } 1197 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1198 break; 1199 default: 1200 break; 1201 } 1202 } 1203 1204 /*----------------------------------------------------------------------- 1205 * detect if flash is compatible with the Common Flash Interface (CFI) 1206 * http://www.jedec.org/download/search/jesd68.pdf 1207 * 1208 */ 1209 static int flash_detect_cfi (flash_info_t * info) 1210 { 1211 int cfi_offset; 1212 debug ("flash detect cfi\n"); 1213 1214 for (info->portwidth = CFG_FLASH_CFI_WIDTH; 1215 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { 1216 for (info->chipwidth = FLASH_CFI_BY8; 1217 info->chipwidth <= info->portwidth; 1218 info->chipwidth <<= 1) { 1219 flash_write_cmd (info, 0, 0, info->cmd_reset); 1220 for (cfi_offset=0; cfi_offset < sizeof(flash_offset_cfi)/sizeof(uint); cfi_offset++) { 1221 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], FLASH_CMD_CFI); 1222 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') 1223 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') 1224 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { 1225 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE); 1226 info->cfi_offset=flash_offset_cfi[cfi_offset]; 1227 debug ("device interface is %d\n", 1228 info->interface); 1229 debug ("found port %d chip %d ", 1230 info->portwidth, info->chipwidth); 1231 debug ("port %d bits chip %d bits\n", 1232 info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1233 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1234 1235 /* calculate command offsets as in the Linux driver */ 1236 info->addr_unlock1 = 0x555; 1237 info->addr_unlock2 = 0x2aa; 1238 1239 /* 1240 * modify the unlock address if we are 1241 * in compatibility mode 1242 */ 1243 if ( /* x8/x16 in x8 mode */ 1244 ((info->chipwidth == FLASH_CFI_BY8) && 1245 (info->interface == FLASH_CFI_X8X16)) || 1246 /* x16/x32 in x16 mode */ 1247 ((info->chipwidth == FLASH_CFI_BY16) && 1248 (info->interface == FLASH_CFI_X16X32))) 1249 { 1250 info->addr_unlock1 = 0xaaa; 1251 info->addr_unlock2 = 0x555; 1252 } 1253 1254 info->name = "CFI conformant"; 1255 return 1; 1256 } 1257 } 1258 } 1259 } 1260 debug ("not found\n"); 1261 return 0; 1262 } 1263 1264 /* 1265 * The following code cannot be run from FLASH! 1266 * 1267 */ 1268 ulong flash_get_size (ulong base, int banknum) 1269 { 1270 flash_info_t *info = &flash_info[banknum]; 1271 int i, j; 1272 flash_sect_t sect_cnt; 1273 unsigned long sector; 1274 unsigned long tmp; 1275 int size_ratio; 1276 uchar num_erase_regions; 1277 int erase_region_size; 1278 int erase_region_count; 1279 int geometry_reversed = 0; 1280 1281 info->ext_addr = 0; 1282 info->cfi_version = 0; 1283 #ifdef CFG_FLASH_PROTECTION 1284 info->legacy_unlock = 0; 1285 #endif 1286 1287 info->start[0] = base; 1288 1289 if (flash_detect_cfi (info)) { 1290 info->vendor = flash_read_ushort (info, 0, 1291 FLASH_OFFSET_PRIMARY_VENDOR); 1292 flash_read_jedec_ids (info); 1293 flash_write_cmd (info, 0, info->cfi_offset, FLASH_CMD_CFI); 1294 num_erase_regions = flash_read_uchar (info, 1295 FLASH_OFFSET_NUM_ERASE_REGIONS); 1296 info->ext_addr = flash_read_ushort (info, 0, 1297 FLASH_OFFSET_EXT_QUERY_T_P_ADDR); 1298 if (info->ext_addr) { 1299 info->cfi_version = (ushort) flash_read_uchar (info, 1300 info->ext_addr + 3) << 8; 1301 info->cfi_version |= (ushort) flash_read_uchar (info, 1302 info->ext_addr + 4); 1303 } 1304 #ifdef DEBUG 1305 flash_printqry (info, 0); 1306 #endif 1307 switch (info->vendor) { 1308 case CFI_CMDSET_INTEL_STANDARD: 1309 case CFI_CMDSET_INTEL_EXTENDED: 1310 default: 1311 info->cmd_reset = FLASH_CMD_RESET; 1312 #ifdef CFG_FLASH_PROTECTION 1313 /* read legacy lock/unlock bit from intel flash */ 1314 if (info->ext_addr) { 1315 info->legacy_unlock = flash_read_uchar (info, 1316 info->ext_addr + 5) & 0x08; 1317 } 1318 #endif 1319 break; 1320 case CFI_CMDSET_AMD_STANDARD: 1321 case CFI_CMDSET_AMD_EXTENDED: 1322 info->cmd_reset = AMD_CMD_RESET; 1323 /* check if flash geometry needs reversal */ 1324 if (num_erase_regions <= 1) 1325 break; 1326 /* reverse geometry if top boot part */ 1327 if (info->cfi_version < 0x3131) { 1328 /* CFI < 1.1, try to guess from device id */ 1329 if ((info->device_id & 0x80) != 0) { 1330 geometry_reversed = 1; 1331 } 1332 break; 1333 } 1334 /* CFI >= 1.1, deduct from top/bottom flag */ 1335 /* note: ext_addr is valid since cfi_version > 0 */ 1336 if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { 1337 geometry_reversed = 1; 1338 } 1339 break; 1340 } 1341 1342 debug ("manufacturer is %d\n", info->vendor); 1343 debug ("manufacturer id is 0x%x\n", info->manufacturer_id); 1344 debug ("device id is 0x%x\n", info->device_id); 1345 debug ("device id2 is 0x%x\n", info->device_id2); 1346 debug ("cfi version is 0x%04x\n", info->cfi_version); 1347 1348 size_ratio = info->portwidth / info->chipwidth; 1349 /* if the chip is x8/x16 reduce the ratio by half */ 1350 if ((info->interface == FLASH_CFI_X8X16) 1351 && (info->chipwidth == FLASH_CFI_BY8)) { 1352 size_ratio >>= 1; 1353 } 1354 debug ("size_ratio %d port %d bits chip %d bits\n", 1355 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1356 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1357 debug ("found %d erase regions\n", num_erase_regions); 1358 sect_cnt = 0; 1359 sector = base; 1360 for (i = 0; i < num_erase_regions; i++) { 1361 if (i > NUM_ERASE_REGIONS) { 1362 printf ("%d erase regions found, only %d used\n", 1363 num_erase_regions, NUM_ERASE_REGIONS); 1364 break; 1365 } 1366 if (geometry_reversed) 1367 tmp = flash_read_long (info, 0, 1368 FLASH_OFFSET_ERASE_REGIONS + 1369 (num_erase_regions - 1 - i) * 4); 1370 else 1371 tmp = flash_read_long (info, 0, 1372 FLASH_OFFSET_ERASE_REGIONS + 1373 i * 4); 1374 erase_region_size = 1375 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; 1376 tmp >>= 16; 1377 erase_region_count = (tmp & 0xffff) + 1; 1378 debug ("erase_region_count = %d erase_region_size = %d\n", 1379 erase_region_count, erase_region_size); 1380 for (j = 0; j < erase_region_count; j++) { 1381 if (sect_cnt >= CFG_MAX_FLASH_SECT) { 1382 printf("ERROR: too many flash sectors\n"); 1383 break; 1384 } 1385 info->start[sect_cnt] = sector; 1386 sector += (erase_region_size * size_ratio); 1387 1388 /* 1389 * Only read protection status from supported devices (intel...) 1390 */ 1391 switch (info->vendor) { 1392 case CFI_CMDSET_INTEL_EXTENDED: 1393 case CFI_CMDSET_INTEL_STANDARD: 1394 info->protect[sect_cnt] = 1395 flash_isset (info, sect_cnt, 1396 FLASH_OFFSET_PROTECT, 1397 FLASH_STATUS_PROTECT); 1398 break; 1399 default: 1400 info->protect[sect_cnt] = 0; /* default: not protected */ 1401 } 1402 1403 sect_cnt++; 1404 } 1405 } 1406 1407 info->sector_count = sect_cnt; 1408 /* multiply the size by the number of chips */ 1409 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio; 1410 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE)); 1411 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT); 1412 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT))); 1413 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) * 1414 (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)); 1415 info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */ 1416 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) * 1417 (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT)); 1418 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */ 1419 info->flash_id = FLASH_MAN_CFI; 1420 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) { 1421 info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */ 1422 } 1423 } 1424 1425 flash_write_cmd (info, 0, 0, info->cmd_reset); 1426 return (info->size); 1427 } 1428 1429 /* loop through the sectors from the highest address 1430 * when the passed address is greater or equal to the sector address 1431 * we have a match 1432 */ 1433 static flash_sect_t find_sector (flash_info_t * info, ulong addr) 1434 { 1435 flash_sect_t sector; 1436 1437 for (sector = info->sector_count - 1; sector >= 0; sector--) { 1438 if (addr >= info->start[sector]) 1439 break; 1440 } 1441 return sector; 1442 } 1443 1444 /*----------------------------------------------------------------------- 1445 */ 1446 static int flash_write_cfiword (flash_info_t * info, ulong dest, 1447 cfiword_t cword) 1448 { 1449 cfiptr_t ctladdr; 1450 cfiptr_t cptr; 1451 int flag; 1452 1453 ctladdr.cp = flash_make_addr (info, 0, 0); 1454 cptr.cp = (uchar *) dest; 1455 1456 /* Check if Flash is (sufficiently) erased */ 1457 switch (info->portwidth) { 1458 case FLASH_CFI_8BIT: 1459 flag = ((cptr.cp[0] & cword.c) == cword.c); 1460 break; 1461 case FLASH_CFI_16BIT: 1462 flag = ((cptr.wp[0] & cword.w) == cword.w); 1463 break; 1464 case FLASH_CFI_32BIT: 1465 flag = ((cptr.lp[0] & cword.l) == cword.l); 1466 break; 1467 case FLASH_CFI_64BIT: 1468 flag = ((cptr.llp[0] & cword.ll) == cword.ll); 1469 break; 1470 default: 1471 return 2; 1472 } 1473 if (!flag) 1474 return 2; 1475 1476 /* Disable interrupts which might cause a timeout here */ 1477 flag = disable_interrupts (); 1478 1479 switch (info->vendor) { 1480 case CFI_CMDSET_INTEL_EXTENDED: 1481 case CFI_CMDSET_INTEL_STANDARD: 1482 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS); 1483 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE); 1484 break; 1485 case CFI_CMDSET_AMD_EXTENDED: 1486 case CFI_CMDSET_AMD_STANDARD: 1487 #ifdef CONFIG_FLASH_CFI_LEGACY 1488 case CFI_CMDSET_AMD_LEGACY: 1489 #endif 1490 flash_unlock_seq (info, 0); 1491 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE); 1492 break; 1493 } 1494 1495 switch (info->portwidth) { 1496 case FLASH_CFI_8BIT: 1497 cptr.cp[0] = cword.c; 1498 break; 1499 case FLASH_CFI_16BIT: 1500 cptr.wp[0] = cword.w; 1501 break; 1502 case FLASH_CFI_32BIT: 1503 cptr.lp[0] = cword.l; 1504 break; 1505 case FLASH_CFI_64BIT: 1506 cptr.llp[0] = cword.ll; 1507 break; 1508 } 1509 1510 /* re-enable interrupts if necessary */ 1511 if (flag) 1512 enable_interrupts (); 1513 1514 return flash_full_status_check (info, find_sector (info, dest), 1515 info->write_tout, "write"); 1516 } 1517 1518 #ifdef CFG_FLASH_USE_BUFFER_WRITE 1519 1520 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, 1521 int len) 1522 { 1523 flash_sect_t sector; 1524 int cnt; 1525 int retcode; 1526 volatile cfiptr_t src; 1527 volatile cfiptr_t dst; 1528 1529 switch (info->vendor) { 1530 case CFI_CMDSET_INTEL_STANDARD: 1531 case CFI_CMDSET_INTEL_EXTENDED: 1532 src.cp = cp; 1533 dst.cp = (uchar *) dest; 1534 sector = find_sector (info, dest); 1535 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 1536 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER); 1537 if ((retcode = flash_status_check (info, sector, info->buffer_write_tout, 1538 "write to buffer")) == ERR_OK) { 1539 /* reduce the number of loops by the width of the port */ 1540 switch (info->portwidth) { 1541 case FLASH_CFI_8BIT: 1542 cnt = len; 1543 break; 1544 case FLASH_CFI_16BIT: 1545 cnt = len >> 1; 1546 break; 1547 case FLASH_CFI_32BIT: 1548 cnt = len >> 2; 1549 break; 1550 case FLASH_CFI_64BIT: 1551 cnt = len >> 3; 1552 break; 1553 default: 1554 return ERR_INVAL; 1555 break; 1556 } 1557 flash_write_cmd (info, sector, 0, (uchar) cnt - 1); 1558 while (cnt-- > 0) { 1559 switch (info->portwidth) { 1560 case FLASH_CFI_8BIT: 1561 *dst.cp++ = *src.cp++; 1562 break; 1563 case FLASH_CFI_16BIT: 1564 *dst.wp++ = *src.wp++; 1565 break; 1566 case FLASH_CFI_32BIT: 1567 *dst.lp++ = *src.lp++; 1568 break; 1569 case FLASH_CFI_64BIT: 1570 *dst.llp++ = *src.llp++; 1571 break; 1572 default: 1573 return ERR_INVAL; 1574 break; 1575 } 1576 } 1577 flash_write_cmd (info, sector, 0, 1578 FLASH_CMD_WRITE_BUFFER_CONFIRM); 1579 retcode = flash_full_status_check (info, sector, 1580 info->buffer_write_tout, 1581 "buffer write"); 1582 } 1583 return retcode; 1584 1585 case CFI_CMDSET_AMD_STANDARD: 1586 case CFI_CMDSET_AMD_EXTENDED: 1587 src.cp = cp; 1588 dst.cp = (uchar *) dest; 1589 sector = find_sector (info, dest); 1590 1591 flash_unlock_seq(info,0); 1592 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER); 1593 1594 switch (info->portwidth) { 1595 case FLASH_CFI_8BIT: 1596 cnt = len; 1597 flash_write_cmd (info, sector, 0, (uchar) cnt - 1); 1598 while (cnt-- > 0) *dst.cp++ = *src.cp++; 1599 break; 1600 case FLASH_CFI_16BIT: 1601 cnt = len >> 1; 1602 flash_write_cmd (info, sector, 0, (uchar) cnt - 1); 1603 while (cnt-- > 0) *dst.wp++ = *src.wp++; 1604 break; 1605 case FLASH_CFI_32BIT: 1606 cnt = len >> 2; 1607 flash_write_cmd (info, sector, 0, (uchar) cnt - 1); 1608 while (cnt-- > 0) *dst.lp++ = *src.lp++; 1609 break; 1610 case FLASH_CFI_64BIT: 1611 cnt = len >> 3; 1612 flash_write_cmd (info, sector, 0, (uchar) cnt - 1); 1613 while (cnt-- > 0) *dst.llp++ = *src.llp++; 1614 break; 1615 default: 1616 return ERR_INVAL; 1617 } 1618 1619 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); 1620 retcode = flash_full_status_check (info, sector, info->buffer_write_tout, 1621 "buffer write"); 1622 return retcode; 1623 1624 default: 1625 debug ("Unknown Command Set\n"); 1626 return ERR_INVAL; 1627 } 1628 } 1629 #endif /* CFG_FLASH_USE_BUFFER_WRITE */ 1630 1631 #endif /* CFG_FLASH_CFI */ 1632