xref: /openbmc/u-boot/drivers/mmc/k3_arsan_sdhci.c (revision aaa449fb27737aea9694881a51ba7f078724d8d1)
1*aaa449fbSLokesh Vutla // SPDX-License-Identifier: GPL-2.0+
2*aaa449fbSLokesh Vutla /*
3*aaa449fbSLokesh Vutla  * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
4*aaa449fbSLokesh Vutla  *
5*aaa449fbSLokesh Vutla  * Texas Instruments' K3 SD Host Controller Interface
6*aaa449fbSLokesh Vutla  */
7*aaa449fbSLokesh Vutla 
8*aaa449fbSLokesh Vutla #include <clk.h>
9*aaa449fbSLokesh Vutla #include <common.h>
10*aaa449fbSLokesh Vutla #include <dm.h>
11*aaa449fbSLokesh Vutla #include <malloc.h>
12*aaa449fbSLokesh Vutla #include <power-domain.h>
13*aaa449fbSLokesh Vutla #include <sdhci.h>
14*aaa449fbSLokesh Vutla 
15*aaa449fbSLokesh Vutla #define K3_ARASAN_SDHCI_MIN_FREQ	0
16*aaa449fbSLokesh Vutla 
17*aaa449fbSLokesh Vutla struct k3_arasan_sdhci_plat {
18*aaa449fbSLokesh Vutla 	struct mmc_config cfg;
19*aaa449fbSLokesh Vutla 	struct mmc mmc;
20*aaa449fbSLokesh Vutla 	unsigned int f_max;
21*aaa449fbSLokesh Vutla };
22*aaa449fbSLokesh Vutla 
k3_arasan_sdhci_probe(struct udevice * dev)23*aaa449fbSLokesh Vutla static int k3_arasan_sdhci_probe(struct udevice *dev)
24*aaa449fbSLokesh Vutla {
25*aaa449fbSLokesh Vutla 	struct k3_arasan_sdhci_plat *plat = dev_get_platdata(dev);
26*aaa449fbSLokesh Vutla 	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
27*aaa449fbSLokesh Vutla 	struct sdhci_host *host = dev_get_priv(dev);
28*aaa449fbSLokesh Vutla 	struct power_domain sdhci_pwrdmn;
29*aaa449fbSLokesh Vutla 	struct clk clk;
30*aaa449fbSLokesh Vutla 	unsigned long clock;
31*aaa449fbSLokesh Vutla 	int ret;
32*aaa449fbSLokesh Vutla 
33*aaa449fbSLokesh Vutla 	ret = power_domain_get_by_index(dev, &sdhci_pwrdmn, 0);
34*aaa449fbSLokesh Vutla 	if (ret) {
35*aaa449fbSLokesh Vutla 		dev_err(dev, "failed to get power domain\n");
36*aaa449fbSLokesh Vutla 		return ret;
37*aaa449fbSLokesh Vutla 	}
38*aaa449fbSLokesh Vutla 
39*aaa449fbSLokesh Vutla 	ret = power_domain_on(&sdhci_pwrdmn);
40*aaa449fbSLokesh Vutla 	if (ret) {
41*aaa449fbSLokesh Vutla 		dev_err(dev, "Power domain on failed\n");
42*aaa449fbSLokesh Vutla 		return ret;
43*aaa449fbSLokesh Vutla 	}
44*aaa449fbSLokesh Vutla 
45*aaa449fbSLokesh Vutla 	ret = clk_get_by_index(dev, 0, &clk);
46*aaa449fbSLokesh Vutla 	if (ret) {
47*aaa449fbSLokesh Vutla 		dev_err(dev, "failed to get clock\n");
48*aaa449fbSLokesh Vutla 		return ret;
49*aaa449fbSLokesh Vutla 	}
50*aaa449fbSLokesh Vutla 
51*aaa449fbSLokesh Vutla 	clock = clk_get_rate(&clk);
52*aaa449fbSLokesh Vutla 	if (IS_ERR_VALUE(clock)) {
53*aaa449fbSLokesh Vutla 		dev_err(dev, "failed to get rate\n");
54*aaa449fbSLokesh Vutla 		return clock;
55*aaa449fbSLokesh Vutla 	}
56*aaa449fbSLokesh Vutla 
57*aaa449fbSLokesh Vutla 	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD |
58*aaa449fbSLokesh Vutla 		       SDHCI_QUIRK_BROKEN_R1B;
59*aaa449fbSLokesh Vutla 
60*aaa449fbSLokesh Vutla 	host->max_clk = clock;
61*aaa449fbSLokesh Vutla 
62*aaa449fbSLokesh Vutla 	ret = sdhci_setup_cfg(&plat->cfg, host, plat->f_max,
63*aaa449fbSLokesh Vutla 			      K3_ARASAN_SDHCI_MIN_FREQ);
64*aaa449fbSLokesh Vutla 	host->mmc = &plat->mmc;
65*aaa449fbSLokesh Vutla 	if (ret)
66*aaa449fbSLokesh Vutla 		return ret;
67*aaa449fbSLokesh Vutla 	host->mmc->priv = host;
68*aaa449fbSLokesh Vutla 	host->mmc->dev = dev;
69*aaa449fbSLokesh Vutla 	upriv->mmc = host->mmc;
70*aaa449fbSLokesh Vutla 
71*aaa449fbSLokesh Vutla 	return sdhci_probe(dev);
72*aaa449fbSLokesh Vutla }
73*aaa449fbSLokesh Vutla 
k3_arasan_sdhci_ofdata_to_platdata(struct udevice * dev)74*aaa449fbSLokesh Vutla static int k3_arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
75*aaa449fbSLokesh Vutla {
76*aaa449fbSLokesh Vutla 	struct k3_arasan_sdhci_plat *plat = dev_get_platdata(dev);
77*aaa449fbSLokesh Vutla 	struct sdhci_host *host = dev_get_priv(dev);
78*aaa449fbSLokesh Vutla 
79*aaa449fbSLokesh Vutla 	host->name = dev->name;
80*aaa449fbSLokesh Vutla 	host->ioaddr = (void *)dev_read_addr(dev);
81*aaa449fbSLokesh Vutla 	host->bus_width = dev_read_u32_default(dev, "bus-width", 4);
82*aaa449fbSLokesh Vutla 	plat->f_max = dev_read_u32_default(dev, "max-frequency", 0);
83*aaa449fbSLokesh Vutla 
84*aaa449fbSLokesh Vutla 	return 0;
85*aaa449fbSLokesh Vutla }
86*aaa449fbSLokesh Vutla 
k3_arasan_sdhci_bind(struct udevice * dev)87*aaa449fbSLokesh Vutla static int k3_arasan_sdhci_bind(struct udevice *dev)
88*aaa449fbSLokesh Vutla {
89*aaa449fbSLokesh Vutla 	struct k3_arasan_sdhci_plat *plat = dev_get_platdata(dev);
90*aaa449fbSLokesh Vutla 
91*aaa449fbSLokesh Vutla 	return sdhci_bind(dev, &plat->mmc, &plat->cfg);
92*aaa449fbSLokesh Vutla }
93*aaa449fbSLokesh Vutla 
94*aaa449fbSLokesh Vutla static const struct udevice_id k3_arasan_sdhci_ids[] = {
95*aaa449fbSLokesh Vutla 	{ .compatible = "arasan,sdhci-5.1" },
96*aaa449fbSLokesh Vutla 	{ }
97*aaa449fbSLokesh Vutla };
98*aaa449fbSLokesh Vutla 
99*aaa449fbSLokesh Vutla U_BOOT_DRIVER(k3_arasan_sdhci_drv) = {
100*aaa449fbSLokesh Vutla 	.name		= "k3_arasan_sdhci",
101*aaa449fbSLokesh Vutla 	.id		= UCLASS_MMC,
102*aaa449fbSLokesh Vutla 	.of_match	= k3_arasan_sdhci_ids,
103*aaa449fbSLokesh Vutla 	.ofdata_to_platdata = k3_arasan_sdhci_ofdata_to_platdata,
104*aaa449fbSLokesh Vutla 	.ops		= &sdhci_ops,
105*aaa449fbSLokesh Vutla 	.bind		= k3_arasan_sdhci_bind,
106*aaa449fbSLokesh Vutla 	.probe		= k3_arasan_sdhci_probe,
107*aaa449fbSLokesh Vutla 	.priv_auto_alloc_size = sizeof(struct sdhci_host),
108*aaa449fbSLokesh Vutla 	.platdata_auto_alloc_size = sizeof(struct k3_arasan_sdhci_plat),
109*aaa449fbSLokesh Vutla };
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