1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2a2927e09SBin Meng /*
3a2927e09SBin Meng * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
4a2927e09SBin Meng */
5a2927e09SBin Meng
6a2927e09SBin Meng #include <common.h>
7a2927e09SBin Meng #include <asm/io.h>
8a2927e09SBin Meng #include <asm/pnp_def.h>
9a2927e09SBin Meng
pnp_enter_conf_state(u16 dev)10a2927e09SBin Meng static void pnp_enter_conf_state(u16 dev)
11a2927e09SBin Meng {
12a2927e09SBin Meng u16 port = dev >> 8;
13a2927e09SBin Meng
14a2927e09SBin Meng outb(0x55, port);
15a2927e09SBin Meng }
16a2927e09SBin Meng
pnp_exit_conf_state(u16 dev)17a2927e09SBin Meng static void pnp_exit_conf_state(u16 dev)
18a2927e09SBin Meng {
19a2927e09SBin Meng u16 port = dev >> 8;
20a2927e09SBin Meng
21a2927e09SBin Meng outb(0xaa, port);
22a2927e09SBin Meng }
23a2927e09SBin Meng
lpc47m_enable_serial(uint dev,uint iobase,uint irq)24c78dfb4fSBin Meng void lpc47m_enable_serial(uint dev, uint iobase, uint irq)
25a2927e09SBin Meng {
26a2927e09SBin Meng pnp_enter_conf_state(dev);
27a2927e09SBin Meng pnp_set_logical_device(dev);
28a2927e09SBin Meng pnp_set_enable(dev, 0);
29a2927e09SBin Meng pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
3019268834SBin Meng pnp_set_irq(dev, PNP_IDX_IRQ0, irq);
31a2927e09SBin Meng pnp_set_enable(dev, 1);
32a2927e09SBin Meng pnp_exit_conf_state(dev);
33a2927e09SBin Meng }
34c78dfb4fSBin Meng
lpc47m_enable_kbc(uint dev,uint irq0,uint irq1)35c78dfb4fSBin Meng void lpc47m_enable_kbc(uint dev, uint irq0, uint irq1)
36c78dfb4fSBin Meng {
37c78dfb4fSBin Meng pnp_enter_conf_state(dev);
38c78dfb4fSBin Meng pnp_set_logical_device(dev);
39c78dfb4fSBin Meng pnp_set_enable(dev, 0);
40c78dfb4fSBin Meng pnp_set_irq(dev, PNP_IDX_IRQ0, irq0);
41c78dfb4fSBin Meng pnp_set_irq(dev, PNP_IDX_IRQ1, irq1);
42c78dfb4fSBin Meng pnp_set_enable(dev, 1);
43c78dfb4fSBin Meng pnp_exit_conf_state(dev);
44c78dfb4fSBin Meng }
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