1 /* 2 * (C) Copyright 2001, 2002 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 * 7 * This has been changed substantially by Gerald Van Baren, Custom IDEAS, 8 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by 9 * Neil Russell. 10 */ 11 12 #include <common.h> 13 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */ 14 #include <ioports.h> 15 #include <asm/io.h> 16 #endif 17 #if defined(CONFIG_AVR32) 18 #include <asm/arch/portmux.h> 19 #endif 20 #if defined(CONFIG_AT91FAMILY) 21 #include <asm/io.h> 22 #include <asm/arch/hardware.h> 23 #include <asm/arch/at91_pio.h> 24 #ifdef CONFIG_AT91_LEGACY 25 #include <asm/arch/gpio.h> 26 #endif 27 #endif 28 #ifdef CONFIG_IXP425 /* only valid for IXP425 */ 29 #include <asm/arch/ixp425.h> 30 #endif 31 #if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866) 32 #include <asm/io.h> 33 #endif 34 #include <i2c.h> 35 36 #if defined(CONFIG_SOFT_I2C_GPIO_SCL) 37 # include <asm/gpio.h> 38 39 # ifndef I2C_GPIO_SYNC 40 # define I2C_GPIO_SYNC 41 # endif 42 43 # ifndef I2C_INIT 44 # define I2C_INIT \ 45 do { \ 46 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \ 47 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \ 48 } while (0) 49 # endif 50 51 # ifndef I2C_ACTIVE 52 # define I2C_ACTIVE do { } while (0) 53 # endif 54 55 # ifndef I2C_TRISTATE 56 # define I2C_TRISTATE do { } while (0) 57 # endif 58 59 # ifndef I2C_READ 60 # define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA) 61 # endif 62 63 # ifndef I2C_SDA 64 # define I2C_SDA(bit) \ 65 do { \ 66 if (bit) \ 67 gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \ 68 else \ 69 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \ 70 I2C_GPIO_SYNC; \ 71 } while (0) 72 # endif 73 74 # ifndef I2C_SCL 75 # define I2C_SCL(bit) \ 76 do { \ 77 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \ 78 I2C_GPIO_SYNC; \ 79 } while (0) 80 # endif 81 82 # ifndef I2C_DELAY 83 # define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ 84 # endif 85 86 #endif 87 88 /* #define DEBUG_I2C */ 89 90 #ifdef DEBUG_I2C 91 DECLARE_GLOBAL_DATA_PTR; 92 #endif 93 94 /*----------------------------------------------------------------------- 95 * Definitions 96 */ 97 98 #define RETRIES 0 99 100 #define I2C_ACK 0 /* PD_SDA level to ack a byte */ 101 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */ 102 103 104 #ifdef DEBUG_I2C 105 #define PRINTD(fmt,args...) do { \ 106 printf (fmt ,##args); \ 107 } while (0) 108 #else 109 #define PRINTD(fmt,args...) 110 #endif 111 112 #if defined(CONFIG_I2C_MULTI_BUS) 113 static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0; 114 #endif /* CONFIG_I2C_MULTI_BUS */ 115 116 /*----------------------------------------------------------------------- 117 * Local functions 118 */ 119 #if !defined(CONFIG_SYS_I2C_INIT_BOARD) 120 static void send_reset (void); 121 #endif 122 static void send_start (void); 123 static void send_stop (void); 124 static void send_ack (int); 125 static int write_byte (uchar byte); 126 static uchar read_byte (int); 127 128 #if !defined(CONFIG_SYS_I2C_INIT_BOARD) 129 /*----------------------------------------------------------------------- 130 * Send a reset sequence consisting of 9 clocks with the data signal high 131 * to clock any confused device back into an idle state. Also send a 132 * <stop> at the end of the sequence for belts & suspenders. 133 */ 134 static void send_reset(void) 135 { 136 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 137 int j; 138 139 I2C_SCL(1); 140 I2C_SDA(1); 141 #ifdef I2C_INIT 142 I2C_INIT; 143 #endif 144 I2C_TRISTATE; 145 for(j = 0; j < 9; j++) { 146 I2C_SCL(0); 147 I2C_DELAY; 148 I2C_DELAY; 149 I2C_SCL(1); 150 I2C_DELAY; 151 I2C_DELAY; 152 } 153 send_stop(); 154 I2C_TRISTATE; 155 } 156 #endif 157 158 /*----------------------------------------------------------------------- 159 * START: High -> Low on SDA while SCL is High 160 */ 161 static void send_start(void) 162 { 163 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 164 165 I2C_DELAY; 166 I2C_SDA(1); 167 I2C_ACTIVE; 168 I2C_DELAY; 169 I2C_SCL(1); 170 I2C_DELAY; 171 I2C_SDA(0); 172 I2C_DELAY; 173 } 174 175 /*----------------------------------------------------------------------- 176 * STOP: Low -> High on SDA while SCL is High 177 */ 178 static void send_stop(void) 179 { 180 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 181 182 I2C_SCL(0); 183 I2C_DELAY; 184 I2C_SDA(0); 185 I2C_ACTIVE; 186 I2C_DELAY; 187 I2C_SCL(1); 188 I2C_DELAY; 189 I2C_SDA(1); 190 I2C_DELAY; 191 I2C_TRISTATE; 192 } 193 194 /*----------------------------------------------------------------------- 195 * ack should be I2C_ACK or I2C_NOACK 196 */ 197 static void send_ack(int ack) 198 { 199 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 200 201 I2C_SCL(0); 202 I2C_DELAY; 203 I2C_ACTIVE; 204 I2C_SDA(ack); 205 I2C_DELAY; 206 I2C_SCL(1); 207 I2C_DELAY; 208 I2C_DELAY; 209 I2C_SCL(0); 210 I2C_DELAY; 211 } 212 213 /*----------------------------------------------------------------------- 214 * Send 8 bits and look for an acknowledgement. 215 */ 216 static int write_byte(uchar data) 217 { 218 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 219 int j; 220 int nack; 221 222 I2C_ACTIVE; 223 for(j = 0; j < 8; j++) { 224 I2C_SCL(0); 225 I2C_DELAY; 226 I2C_SDA(data & 0x80); 227 I2C_DELAY; 228 I2C_SCL(1); 229 I2C_DELAY; 230 I2C_DELAY; 231 232 data <<= 1; 233 } 234 235 /* 236 * Look for an <ACK>(negative logic) and return it. 237 */ 238 I2C_SCL(0); 239 I2C_DELAY; 240 I2C_SDA(1); 241 I2C_TRISTATE; 242 I2C_DELAY; 243 I2C_SCL(1); 244 I2C_DELAY; 245 I2C_DELAY; 246 nack = I2C_READ; 247 I2C_SCL(0); 248 I2C_DELAY; 249 I2C_ACTIVE; 250 251 return(nack); /* not a nack is an ack */ 252 } 253 254 #if defined(CONFIG_I2C_MULTI_BUS) 255 /* 256 * Functions for multiple I2C bus handling 257 */ 258 unsigned int i2c_get_bus_num(void) 259 { 260 return i2c_bus_num; 261 } 262 263 int i2c_set_bus_num(unsigned int bus) 264 { 265 #if defined(CONFIG_I2C_MUX) 266 if (bus < CONFIG_SYS_MAX_I2C_BUS) { 267 i2c_bus_num = bus; 268 } else { 269 int ret; 270 271 ret = i2x_mux_select_mux(bus); 272 i2c_init_board(); 273 if (ret == 0) 274 i2c_bus_num = bus; 275 else 276 return ret; 277 } 278 #else 279 if (bus >= CONFIG_SYS_MAX_I2C_BUS) 280 return -1; 281 i2c_bus_num = bus; 282 #endif 283 return 0; 284 } 285 #endif 286 287 /*----------------------------------------------------------------------- 288 * if ack == I2C_ACK, ACK the byte so can continue reading, else 289 * send I2C_NOACK to end the read. 290 */ 291 static uchar read_byte(int ack) 292 { 293 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 294 int data; 295 int j; 296 297 /* 298 * Read 8 bits, MSB first. 299 */ 300 I2C_TRISTATE; 301 I2C_SDA(1); 302 data = 0; 303 for(j = 0; j < 8; j++) { 304 I2C_SCL(0); 305 I2C_DELAY; 306 I2C_SCL(1); 307 I2C_DELAY; 308 data <<= 1; 309 data |= I2C_READ; 310 I2C_DELAY; 311 } 312 send_ack(ack); 313 314 return(data); 315 } 316 317 /*=====================================================================*/ 318 /* Public Functions */ 319 /*=====================================================================*/ 320 321 /*----------------------------------------------------------------------- 322 * Initialization 323 */ 324 void i2c_init (int speed, int slaveaddr) 325 { 326 #if defined(CONFIG_SYS_I2C_INIT_BOARD) 327 /* call board specific i2c bus reset routine before accessing the */ 328 /* environment, which might be in a chip on that bus. For details */ 329 /* about this problem see doc/I2C_Edge_Conditions. */ 330 i2c_init_board(); 331 #else 332 /* 333 * WARNING: Do NOT save speed in a static variable: if the 334 * I2C routines are called before RAM is initialized (to read 335 * the DIMM SPD, for instance), RAM won't be usable and your 336 * system will crash. 337 */ 338 send_reset (); 339 #endif 340 } 341 342 /*----------------------------------------------------------------------- 343 * Probe to see if a chip is present. Also good for checking for the 344 * completion of EEPROM writes since the chip stops responding until 345 * the write completes (typically 10mSec). 346 */ 347 int i2c_probe(uchar addr) 348 { 349 int rc; 350 351 /* 352 * perform 1 byte write transaction with just address byte 353 * (fake write) 354 */ 355 send_start(); 356 rc = write_byte ((addr << 1) | 0); 357 send_stop(); 358 359 return (rc ? 1 : 0); 360 } 361 362 /*----------------------------------------------------------------------- 363 * Read bytes 364 */ 365 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) 366 { 367 int shift; 368 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n", 369 chip, addr, alen, buffer, len); 370 371 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 372 /* 373 * EEPROM chips that implement "address overflow" are ones 374 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of 375 * address and the extra bits end up in the "chip address" 376 * bit slots. This makes a 24WC08 (1Kbyte) chip look like 377 * four 256 byte chips. 378 * 379 * Note that we consider the length of the address field to 380 * still be one byte because the extra address bits are 381 * hidden in the chip address. 382 */ 383 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); 384 385 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n", 386 chip, addr); 387 #endif 388 389 /* 390 * Do the addressing portion of a write cycle to set the 391 * chip's address pointer. If the address length is zero, 392 * don't do the normal write cycle to set the address pointer, 393 * there is no address pointer in this chip. 394 */ 395 send_start(); 396 if(alen > 0) { 397 if(write_byte(chip << 1)) { /* write cycle */ 398 send_stop(); 399 PRINTD("i2c_read, no chip responded %02X\n", chip); 400 return(1); 401 } 402 shift = (alen-1) * 8; 403 while(alen-- > 0) { 404 if(write_byte(addr >> shift)) { 405 PRINTD("i2c_read, address not <ACK>ed\n"); 406 return(1); 407 } 408 shift -= 8; 409 } 410 411 /* Some I2C chips need a stop/start sequence here, 412 * other chips don't work with a full stop and need 413 * only a start. Default behaviour is to send the 414 * stop/start sequence. 415 */ 416 #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START 417 send_start(); 418 #else 419 send_stop(); 420 send_start(); 421 #endif 422 } 423 /* 424 * Send the chip address again, this time for a read cycle. 425 * Then read the data. On the last byte, we do a NACK instead 426 * of an ACK(len == 0) to terminate the read. 427 */ 428 write_byte((chip << 1) | 1); /* read cycle */ 429 while(len-- > 0) { 430 *buffer++ = read_byte(len == 0); 431 } 432 send_stop(); 433 return(0); 434 } 435 436 /*----------------------------------------------------------------------- 437 * Write bytes 438 */ 439 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) 440 { 441 int shift, failures = 0; 442 443 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n", 444 chip, addr, alen, buffer, len); 445 446 send_start(); 447 if(write_byte(chip << 1)) { /* write cycle */ 448 send_stop(); 449 PRINTD("i2c_write, no chip responded %02X\n", chip); 450 return(1); 451 } 452 shift = (alen-1) * 8; 453 while(alen-- > 0) { 454 if(write_byte(addr >> shift)) { 455 PRINTD("i2c_write, address not <ACK>ed\n"); 456 return(1); 457 } 458 shift -= 8; 459 } 460 461 while(len-- > 0) { 462 if(write_byte(*buffer++)) { 463 failures++; 464 } 465 } 466 send_stop(); 467 return(failures); 468 } 469